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1. 发明申请

US20090316716A1 SCHEDULING SYSTEM AND SCHEDULING METHOD FOR THE SAME 失效
标题翻译：调度系统及其调度方法
公开(公告)号：US20090316716A1
公开(公告)日：2009-12-24
申请号：US12551376
申请日：2009-08-31
申请人： Kenji TANAKA
发明人： Kenji TANAKA
IPC分类号： H04L12/43
CPC分类号： H04L12/5601 , H04L47/10 , H04L49/107 , H04L2012/565 , H04L2012/5672 , H04L2012/5679 , H04Q11/0478
摘要： A schedule management table is additionally provided in a scheduling system comprising: a time slot for specifying, in slots, the cell transfer sequence of individual lines in one turn; a cell read sequence management table having elements to which the lines are set as cell transfer objects; schedule computation means for controlling the setting of the lines to the cell read sequence management table; and allocation processing means for converting the elements of the cell read sequence management table to specified positions of the slots in the time slot. The schedule management table indicates positions, within the cell read sequence management table, to which transfer object lines are newly set, for each PCR (peak cell rate) value. The scheduling system can reduce the necessity of update of the cell read sequence management table and can execute data transfer which assures the rate of each ATM line.
摘要翻译：在调度系统中另外提供调度管理表，该调度系统包括：一个时隙中用于指定各个线路的小区传送顺序的时隙; 单元读取序列管理表，其具有将行设置为单元传送对象的元素; 调度计算装置，用于控制对单元读取序列管理表的行的设置; 以及分配处理装置，用于将小区读取序列管理表的元素转换成时隙中的时隙的指定位置。时间表管理表针对每个PCR（峰值信元速率）值指示在单元读取序列管理表中对于新设置传输对象行的位置。调度系统可以减少更新小区读取序列管理表的必要性，并且可以执行保证每条ATM线路速率的数据传输。

2. 发明授权

US07415022B2 Network switching architecture with multiple table synchronization, and forwarding of both IP and IPX packets 失效
标题翻译：具有多表同步的网络交换架构，以及IP和IPX数据包的转发
公开(公告)号：US07415022B2
公开(公告)日：2008-08-19
申请号：US11495739
申请日：2006-07-31
申请人： Shiri Kadambi , Shekhar Ambe
发明人： Shiri Kadambi , Shekhar Ambe
IPC分类号： H04L12/66 , H04L12/28 , H04J3/16
CPC分类号： H04L12/5601 , H04L12/18 , H04L12/42 , H04L12/46 , H04L12/4625 , H04L12/4641 , H04L12/4645 , H04L12/467 , H04L12/56 , H04L12/5602 , H04L29/06 , H04L45/00 , H04L45/24 , H04L45/245 , H04L45/742 , H04L47/10 , H04L47/125 , H04L47/2408 , H04L47/2441 , H04L47/2458 , H04L47/30 , H04L47/50 , H04L47/522 , H04L47/525 , H04L47/6205 , H04L47/6215 , H04L47/6225 , H04L47/623 , H04L49/102 , H04L49/103 , H04L49/107 , H04L49/108 , H04L49/109 , H04L49/201 , H04L49/205 , H04L49/254 , H04L49/3009 , H04L49/3036 , H04L49/3072 , H04L49/3081 , H04L49/309 , H04L49/351 , H04L49/352 , H04L49/354 , H04L49/602 , H04L49/606 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9057 , H04L49/9073 , H04L67/10 , H04L69/14 , H04L69/16 , H04L69/161 , H04L69/323 , H04L69/329 , H04L2012/5651 , H04L2012/5665 , H04L2012/5667 , H04L2012/5679 , H04L2012/568 , H04L2012/5682 , H04L2012/5683 , Y02D50/30 , Y10S707/99931 , Y10S707/99945
摘要： A network switch for network communications includes a protocol determining means for determining whether an incoming packet is an IP packet or an IPX packet. L3 lookup tables, IP router tables, and IPX router tables are provided. A concurrent lookup is performed of the L3 lookup table, and either the IP router table or the IPX router table, depending upon the determination of the packet type. If a match is found on the L3 table, the packet is forwarded based on the L3 match. If no match is found on the L3 lookup, then a longest prefix cache lookup is performed on the appropriate IP or IPX router table, and the packet is forwarded based upon the match of the longest prefix cache lookup. If no match is provided, then the packet is forwarded to the CPU interface.
摘要翻译：用于网络通信的网络交换机包括用于确定输入分组是IP分组还是IPX分组的协议确定装置。提供L3查找表，IP路由器表和IPX路由器表。根据分组类型的确定，执行L3查找表以及IP路由器表或IPX路由器表的并发查找。如果在L3表中找到匹配项，则根据L3匹配转发数据包。如果在L3查找中找不到匹配项，则在适当的IP或IPX路由器表上执行最长的前缀高速缓存查找，并且根据最长前缀高速缓存查找的匹配来转发数据包。如果没有提供匹配，则将数据包转发到CPU接口。

3. 发明申请

US20060127943A1 Scheduling system and scheduling method for the same 有权
公开(公告)号：US20060127943A1
公开(公告)日：2006-06-15
申请号：US11350101
申请日：2006-02-09
申请人： Kenji Tanaka
发明人： Kenji Tanaka
IPC分类号： C12Q1/68 , G06F19/00 , G06K7/00
CPC分类号： H04L12/5601 , H04L47/10 , H04L49/107 , H04L2012/565 , H04L2012/5672 , H04L2012/5679 , H04Q11/0478
摘要： A schedule management table is additionally provided in a scheduling system comprising: a time slot for specifying, in slots, the cell transfer sequence of individual lines in one turn; a cell read sequence management table having elements to which the lines are set as cell transfer objects; schedule computation means for controlling the setting of the lines to the cell read sequence management table; and allocation processing means for converting the elements of the cell read sequence management table to specified positions of the slots in the time slot. The schedule management table indicates positions, within the cell read sequence management table, to which transfer object lines are newly set, for each PCR (peak cell rate) value. The scheduling system can reduce the necessity of update of the cell read sequence management table and can execute data transfer which assures the rate of each ATM line.

4. 发明授权

US06804194B1 Network switching architecture utilizing cell based and packet based per class-of-service head-of-line blocking prevention 有权
标题翻译：网络交换架构利用基于单元和分组的每类服务头线阻止预防
公开(公告)号：US06804194B1
公开(公告)日：2004-10-12
申请号：US09642104
申请日：2000-08-21
申请人： Shiri Kadambi , Shekhar Ambe
发明人： Shiri Kadambi , Shekhar Ambe
IPC分类号： H04L1228
CPC分类号： H04L12/5601 , H04L12/18 , H04L12/42 , H04L12/46 , H04L12/4625 , H04L12/4641 , H04L12/4645 , H04L12/467 , H04L12/56 , H04L12/5602 , H04L29/06 , H04L45/00 , H04L45/24 , H04L45/245 , H04L45/742 , H04L47/10 , H04L47/125 , H04L47/2408 , H04L47/2441 , H04L47/2458 , H04L47/30 , H04L47/50 , H04L47/522 , H04L47/525 , H04L47/6205 , H04L47/6215 , H04L47/6225 , H04L47/623 , H04L49/102 , H04L49/103 , H04L49/107 , H04L49/108 , H04L49/109 , H04L49/201 , H04L49/205 , H04L49/254 , H04L49/3009 , H04L49/3036 , H04L49/3072 , H04L49/3081 , H04L49/309 , H04L49/351 , H04L49/352 , H04L49/354 , H04L49/602 , H04L49/606 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9057 , H04L49/9073 , H04L67/10 , H04L69/14 , H04L69/16 , H04L69/161 , H04L69/323 , H04L69/329 , H04L2012/5651 , H04L2012/5665 , H04L2012/5667 , H04L2012/5679 , H04L2012/568 , H04L2012/5682 , H04L2012/5683 , Y02D50/30 , Y10S707/99931 , Y10S707/99945
摘要： A network switch for network communications includes a first data port interface which supports a plurality of data ports which transmit and receive data at a first data rate. A second data port interface is provided; the second data port interface supports a plurality of data ports transmitting and receiving data at a second data rate. A CPU interface is provided, with the CPU interface configured to communicate with a CPU. An internal memory is provided, and communicates with the first data port interface and the second data port interface. A memory management unit is provided, and includes an external memory interface for communicating data from at least one of the first data port interface and the second data port interface and an external memory. A communication channel is provided, with the communication channel communicating data and messaging information between the at least one first data port interface, the at least one second data port interface, the internal memory, and the memory management unit. One data port interface of the first data port interface and the second data port interface includes a head-of-line blocking prevention mechanism. The head-of-line blocking prevention mechanism includes a determination unit for determining when head-of-line blocking is occurring based upon cell based and packet based thresholds.
摘要翻译：用于网络通信的网络交换机包括支持以第一数据速率发送和接收数据的多个数据端口的第一数据端口接口。提供第二个数据端口接口; 第二数据端口接口支持以第二数据速率发送和接收数据的多个数据端口。提供了CPU接口，CPU接口配置为与CPU进行通信。提供内部存储器，并与第一数据端口接口和第二数据端口接口通信。提供存储器管理单元，并且包括用于从第一数据端口接口和第二数据端口接口中的至少一个传送数据的外部存储器接口和外部存储器。提供通信信道，通信信道在至少一个第一数据端口接口，至少一个第二数据端口接口，内部存储器和存储器管理单元之间传送数据和消息传递信息。第一数据端口接口和第二数据端口接口的一个数据端口接口包括行前阻止防止机制。线路阻止阻止机制包括：确定单元，用于基于基于小区和基于分组的阈值来确定何时发生线路阻塞发生。

5. 发明授权

US06763022B1 Switching network for a broadband communication system 失效
标题翻译：宽带通信系统的交换网络
公开(公告)号：US06763022B1
公开(公告)日：2004-07-13
申请号：US09297314
申请日：1999-04-28
申请人： Uwe Brand , Hartmut Burghardt , Jochen Kessler , Thomas Neuner , Karl-August Steinhauser , Thomas Zellerhoff
发明人： Uwe Brand , Hartmut Burghardt , Jochen Kessler , Thomas Neuner , Karl-August Steinhauser , Thomas Zellerhoff
IPC分类号： H04Q1100
CPC分类号： H04L49/107 , H04L49/1515 , H04L49/1584 , H04L49/30 , H04L2012/5672 , H04Q11/0001
摘要： The switching network serves for the transmission of digital data signals within a broadband communication system. This switching network is thereby constructed of individual switching elements (KE) that form at least one multi-stage funnel due to a connection to one another. The section for the assemblies of the switching network is selected such that at least one complete funnel is accommodated on the respective assembly. The respective assembly thereby has its external data inputs provided with unidirectionally designed optical/electrical transducers (OML-E) and has its external data outputs provided with unidirectionally designed electrical/optical transducers (OML-S).
摘要翻译：交换网络用于在宽带通信系统内传输数字数据信号。因此，该交换网络由由彼此连接形成至少一个多级漏斗的各个开关元件（KE）构成。选择交换网络的组件的部分，使得至少一个完整的漏斗容纳在相应的组件上。相应的组件由此具有单向设计的光/电换能器（OML-E）提供的外部数据输入，并且其外部数据输出具有单向设计的电/光换能器（OML-S）。

6. 发明授权

US06542506B1 Method of transferring data between networks 失效
标题翻译：在网络之间传输数据的方法
公开(公告)号：US06542506B1
公开(公告)日：2003-04-01
申请号：US09375566
申请日：1999-08-17
申请人： Hee-Jin Lee
发明人： Hee-Jin Lee
IPC分类号： H04L1256
CPC分类号： H04L12/40058 , H04L12/40065 , H04L12/40071 , H04L12/40097 , H04L12/46 , H04L45/00 , H04L49/107 , H04L69/16 , H04L69/161 , H04L69/166 , H04L69/168 , H04L69/169 , H04L2012/5618 , H04L2012/5621 , H04L2012/5626 , H04L2012/5667 , H04Q11/0478
摘要： A method of transferring data between networks includes storing a connection path set between predetermined data from a first network and a predetermined address in a second network during initial connection between the first and second networks, and transferring the predetermined data from the first network along the stored path. Accordingly, data transmission speed is faster by pre-mapping a data path between networks, and hardware and software loads on the gateway for repeating data between networks can be reduced.
摘要翻译：在网络之间传送数据的方法包括在第一和第二网络之间的初始连接期间存储在第一网络的预定数据与第二网络中的预定地址之间设置的连接路径，以及沿着存储的第一网络从第一网络传送预定数据路径。因此，通过预先映射网络之间的数据路径，数据传输速度更快，并且可以减少网关上用于在网络之间重复数据的硬件和软件负载。

7. 发明授权

US06393024B1 Asynchronous transfer mode (ATM) switch network with expansible optical ring 失效
标题翻译：具有可扩展光环的异步传输模式（ATM）交换网络
公开(公告)号：US06393024B1
公开(公告)日：2002-05-21
申请号：US09139544
申请日：1998-08-25
申请人： Seung Kyun Park , Jun Kyun Choi
发明人： Seung Kyun Park , Jun Kyun Choi
IPC分类号： H04L1228
CPC分类号： H04L49/107 , H04L12/42 , H04Q11/0005 , H04Q11/0066 , H04Q2011/0016 , H04Q2011/0073
摘要： An ATM switch network with an expansible optical ring, in which each switch forms several paths with a vertical ring, a horizontal ring and an expansible ring. The network has a large-capacity and a small switching interval, minimizing cell delay deviation and rendering the network suitable for high-speed multimedia service. A group switch node is formed by grouping the switches forming the vertical and horizontal rings, thereby enhancing reliability within a transmission interval by bisecting the wavelength division multiplexed logical paths and by using two optical lines. The network discriminates between I/O terminals for matching data having a low-speed small capacity and wavelength division I/O terminals for matching data having a high-speed large capacity. By using a node's I/O terminals, the network interconnects nodes via wavelength division multiplexing optical lines, thereby forming an automatic adaptive network. The network increases switching capacity, thereby improving communications in densely built-in areas.
摘要翻译：具有可扩展光环的ATM交换机网络，其中每个交换机形成具有垂直环，水平环和可扩展环的若干路径。该网络具有大容量和小的切换间隔，最小化信元延迟偏差并使网络适合于高速多媒体业务。通过对形成垂直和水平环的开关进行分组而形成组交换节点，从而通过将波分复用的逻辑路径平分并通过使用两条光线来提高发送间隔内的可靠性。网络鉴别用于匹配具有低速小容量的数据的I / O端子和用于匹配具有高速大容量的数据的波分区I / O端子。通过使用节点的I / O终端，网络通过波分复用光线路互连节点，从而形成自动适应网络。网络增加了交换容量，从而改善了密集内置区域的通信。

8. 发明申请

US20020044554A1 Scheduling system and scheduling method for the same 失效
标题翻译：调度系统和调度方法相同
公开(公告)号：US20020044554A1
公开(公告)日：2002-04-18
申请号：US09974793
申请日：2001-10-12
发明人： Kenji Tanaka
IPC分类号： H04L012/56
CPC分类号： H04L12/5601 , H04L47/10 , H04L49/107 , H04L2012/565 , H04L2012/5672 , H04L2012/5679 , H04Q11/0478
摘要： A schedule management table is additionally provided in a scheduling system comprising: a time slot for specifying, in slots, the cell transfer sequence of individual lines in one turn; a cell read sequence management table having elements to which the lines are set as cell transfer objects; schedule computation means for controlling the setting of the lines to the cell read sequence management table; and allocation processing means for converting the elements of the cell read sequence management table to specified positions of the slots in the time slot. The schedule management table indicates positions, within the cell read sequence management table, to which transfer object lines are newly set, for each PCR (peak cell rate) value. The scheduling system can reduce the necessity of update of the cell read sequence management table and can execute data transfer which assures the rate of each ATM line.
摘要翻译：在调度系统中另外提供调度管理表，该调度系统包括：一个时隙中用于指定各个线路的小区传送顺序的时隙; 单元读取序列管理表，其具有将行设置为单元传送对象的元素; 调度计算装置，用于控制对单元读取序列管理表的行的设置; 以及分配处理装置，用于将小区读取序列管理表的元素转换成时隙中的时隙的指定位置。时间表管理表针对每个PCR（峰值信元速率）值指示在单元读取序列管理表中对新设置了传输对象行的位置。调度系统可以减少更新小区读取序列管理表的必要性，并且可以执行保证每条ATM线路速率的数据传输。

9. 发明授权

US06278711B1 Method and apparatus for manipulating an ATM cell 失效
标题翻译：用于操纵ATM信元的方法和装置
公开(公告)号：US06278711B1
公开(公告)日：2001-08-21
申请号：US08687888
申请日：1996-07-26
申请人： Mahesh N. Ganmukhi , Brian L. Jordan
发明人： Mahesh N. Ganmukhi , Brian L. Jordan
IPC分类号： H04L1256
CPC分类号： H04L12/5601 , H04L49/107 , H04L49/108 , H04L49/3081 , H04L2012/5681 , H04Q11/0478
摘要： The present invention pertains to an apparatus for manipulating ATM cells. The apparatus comprises a memory array in which an entire ATM cell can be read or written in one read or write cycle. The apparatus is also comprised of a mechanism for reading or writing the entire ATM cell from or into the memory array. The present invention pertains to a method for switching an ATM cell. The method comprises the steps of receiving the ATM cell at a first input port of a switch from the ATM network. Then there can be the step of storing the ATM cell in one clock cycle in a memory array of the switch. Next there is the step of reading the ATM cell in the memory array in one clock cycle. Next there is the step of transferring the ATM cell from the memory array to a first output port of the switch. Next there is the step of transmitting the ATM cell from the first output port to the ATM network. The present invention pertains to a switch for an ATM cell. The switch comprises I input ports which receive ATM cells from an ATM network, where I≧1 and is an integer. The switch is also comprised of a memory array connected to the I input ports for storing an ATM cell received by one of the I input ports in one clock cycle. The switch also comprises O output ports connected to the memory array, where O≧1 and is an integer. One of the O output ports transmit an ATM cell which is received from the memory array to the ATM network. Additionally, the switch comprises a controller connected to the memory array, I input ports and O output ports for controlling the storage of an ATM cell from one of the input ports into the memory array in one clock cycle. The switch can be used for normal switching operation, multicasting, demultiplexing or multiplexing.
摘要翻译：本发明涉及一种用于操纵ATM信元的装置。该装置包括存储器阵列，其中可以在一个读或写周期中读取或写入整个ATM信元。该装置还包括用于从存储器阵列读取或写入整个ATM信元的机构。本发明涉及一种用于切换ATM信元的方法。该方法包括以下步骤：在ATM网络的交换机的第一输入端口处接收ATM信元。然后，可以在交换机的存储器阵列中的一个时钟周期中存储ATM信元的步骤。接下来是在一个时钟周期内读取存储器阵列中的ATM单元的步骤。接下来，存在将ATM信元从存储器阵列传送到交换机的第一输出端口的步骤。接下来，将ATM信元从第一输出端口发送到ATM网络的步骤。本发明涉及ATM信元的交换机。交换机包括从ATM网络接收ATM信元的I输入端口，其中I> = 1并且是整数。开关还包括连接到I输入端口的存储器阵列，用于存储在一个时钟周期中由I个输入端口之一接收的ATM信元。交换机还包括连接到存储器阵列的O输出端口，其中O> = 1并且是整数。 O输出端口中的一个发送从存储器阵列接收到ATM网络的ATM信元。此外，开关包括连接到存储器阵列的控制器，I输入端口和O输出端口，用于在一个时钟周期内控制ATM信元从一个输入端口存储到存储器阵列中。该交换机可用于正常的切换操作，组播，解复用或多路复用。

10. 发明授权

US6167452A Joint flow control mechanism in a telecommunications network 失效
公开(公告)号：US6167452A
公开(公告)日：2000-12-26
申请号：US417784
申请日：1999-10-14
申请人： Thomas A. Manning , Stephen A. Caldara , Stephen A. Hauser , Alan D. Sherman
发明人： Thomas A. Manning , Stephen A. Caldara , Stephen A. Hauser , Alan D. Sherman
IPC分类号： G06F12/02 , G06F9/46 , G06F15/173 , H04J3/06 , H04L1/22 , H04L7/04 , H04L12/18 , H04L12/24 , H04L12/46 , H04L12/56 , H04L12/64 , H04L13/08 , H04L29/06 , H04L29/08 , H04M3/00 , H04M3/08 , H04M3/22 , H04Q3/00 , H04Q3/545 , H04Q11/04 , G06F15/16 , G06F15/17
CPC分类号： H04L47/18 , G06F15/17375 , H04J3/0682 , H04J3/0685 , H04L7/046 , H04L12/4608 , H04L12/5601 , H04L12/5602 , H04L12/64 , H04L12/6402 , H04L41/00 , H04L41/0896 , H04L47/10 , H04L47/11 , H04L47/15 , H04L47/16 , H04L47/26 , H04L47/266 , H04L47/29 , H04L47/30 , H04L47/50 , H04L47/52 , H04L47/521 , H04L47/522 , H04L47/525 , H04L47/56 , H04L47/621 , H04L47/6215 , H04L47/6225 , H04L47/627 , H04L47/70 , H04L47/722 , H04L47/743 , H04L47/745 , H04L47/762 , H04L47/782 , H04L47/805 , H04L47/822 , H04L49/101 , H04L49/103 , H04L49/106 , H04L49/107 , H04L49/108 , H04L49/153 , H04L49/1553 , H04L49/1576 , H04L49/20 , H04L49/201 , H04L49/203 , H04L49/205 , H04L49/25 , H04L49/253 , H04L49/254 , H04L49/255 , H04L49/256 , H04L49/30 , H04L49/3009 , H04L49/3081 , H04L49/309 , H04L49/455 , H04L49/503 , H04L49/505 , H04L49/506 , H04L49/508 , H04L49/55 , H04L49/552 , H04L49/555 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9078 , H04L69/32 , H04L69/324 , H04L2012/5614 , H04L2012/5616 , H04L2012/5627 , H04L2012/5628 , H04L2012/5629 , H04L2012/5631 , H04L2012/5632 , H04L2012/5634 , H04L2012/5635 , H04L2012/5642 , H04L2012/5643 , H04L2012/5647 , H04L2012/5648 , H04L2012/5649 , H04L2012/565 , H04L2012/5651 , H04L2012/5652 , H04L2012/5672 , H04L2012/5679 , H04L2012/5681 , H04L2012/5682 , H04L2012/5683 , H04L2012/5684 , H04L2012/5685 , H04Q11/0478 , H04W28/14 , Y10S370/902 , Y10S370/905
摘要： A mechanism enabling plural queues in a downstream telecommunications network element to be treated as a single, joint queue for purposes of connection-level flow control. A pointer in at least one queue descriptor points to a queue descriptor in which is maintained a set of shared, joint counters. Other flow control elements are maintained individually with respect to each queue descriptor. This mechanism enables flow control elements associated with a single transmitter queue to flow control plural connections terminating in plural queues associated with a single receiver processor.

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