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    • 4. 发明授权
    • Method of fabricating a high-density dynamic random-access memory
    • 制造高密度动态随机存取存储器的方法
    • US5856219A
    • 1999-01-05
    • US912686
    • 1997-08-18
    • Yasushi NaitoYutaka ItoYuichi Hirofuji
    • Yasushi NaitoYutaka ItoYuichi Hirofuji
    • H01L23/522H01L21/768H01L21/8239H01L21/8242H01L27/10H01L27/108
    • H01L27/1052H01L27/10873
    • The invention relates to a high-density DRAM fabrication technique for forming a source/drain contact between word lines in a self-alignment manner, with the offset length between a source region and a drain region of a peripheral transistor maintained at an adequate value. After gate electrodes (i.e. word lines) are formed, a first insulating layer, which is thin enough not to block up space defined between the word lines, is deposited. The source/drain contact is etched as deep as the first insulating layer is thick to form an extraction electrode made of polycrystalline silicon. A second insulating layer is deposited until a spacer thickness (i.e. the sum of the film thickness of the second insulating layer and the film thickness of the first insulating layer) for determining the offset length is obtained. The first and second insulating layers are etched back for a distance corresponding to the sum of the film thickness of the second insulating layer and the film thickness of the first insulating layer so that a spacer (i.e. the residue of the insulating layers) is left on the side walls of the gate electrode. An implantation of highlevel impurities is performed to form heavily doped source and drain regions of a peripheral transistor. In-cell self-align contact is made possible while maintaining the offset length of the heavily doped source and drain regions
    • 本发明涉及用于以自对准方式在字线之间形成源极/漏极接触的高密度DRAM制造技术,其中外围晶体管的源极区域和漏极区域之间的偏移长度保持在足够的值。 在形成栅电极(即字线)之后,沉积足够薄而不能阻挡字线之间限定的空间的第一绝缘层。 源极/漏极接触被蚀刻为第一绝缘层较厚的深度,以形成由多晶硅制成的引出电极。 沉积第二绝缘层,直到获得用于确定偏移长度的间隔物厚度(即第二绝缘层的膜厚度和第一绝缘层的膜厚度之和)。 第一绝缘层和第二绝缘层被回蚀一段对应于第二绝缘层的膜厚度与第一绝缘层的膜厚之和的距离,使得间隔物(即,绝缘层的残留物)留在 栅电极的侧壁。 执行高级杂质的注入以形成外围晶体管的重掺杂源极和漏极区域。 在保持重掺杂源极和漏极区域的偏移长度的同时使单元内自对准接触成为可能