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    • 1. 发明授权
    • Direct DC coupled push-pull BJT driver for power amplifier with built-in gain and bias current signal dependent expansion
    • 具有内置增益和偏置电流信号依赖扩展功能的直流直流耦合推挽式BJT驱动器
    • US08497736B1
    • 2013-07-30
    • US13285605
    • 2011-10-31
    • Dirk LeipoldWade AllenGary Hau
    • Dirk LeipoldWade AllenGary Hau
    • H03F3/26
    • H03F3/19H03F3/3022
    • A power amplifier having a driver stage and an output stage is configured to provide an amplified RF input signal. The driver stage of the power amplifier consists of one or more driver circuits consisting of a network of transistors, current sources, capacitive elements and resistive elements. An RF input signal is fed into the driver stage which is configured to provide a dynamic DC bias and an RF signal gain to a base terminal of a Bipolar Junction Transistor (BJT) power device present in the output stage. The output stage includes of a network of transistors, capacitive and resistive elements and when driven by the DC bias and the RF signal from the driver stage produces an amplified RF input signal at an output side of the output stage.
    • 具有驱动级和输出级的功率放大器被配置为提供放大的RF输入信号。 功率放大器的驱动级由一个或多个由晶体管,电流源,电容元件和电阻元件组成的驱动电路组成。 RF输入信号被馈送到驱动器级,其被配置为向存在于输出级中的双极结晶体管(BJT)功率器件的基极端提供动态DC偏置和RF信号增益。 输出级包括晶体管,电容和电阻元件的网络,并且当由DC偏置驱动时,来自驱动器级的RF信号在输出级的输出侧产生放大的RF输入信号。
    • 2. 发明授权
    • Digital amplitude modulation
    • 数字幅度调制
    • US08411793B2
    • 2013-04-02
    • US13081338
    • 2011-04-06
    • Robert B. StaszewskiSameh RezeqDirk Leipold
    • Robert B. StaszewskiSameh RezeqDirk Leipold
    • H04K1/02
    • H04L27/361
    • A transmitter using quadrature modulation includes a rectangular to polar converter for converting data symbols into a polar form, where each polar symbol has a magnitude signal and an angle signal. Digital phase modulation circuitry includes an all digital PLL circuit for generating a phase modulated RF carrier signal responsive to the angle signal frequency control word (FCW) and a carrier frequency FCW. A digitally controlled amplifier for amplifying the phase modulated signal is controlled by a digital amplitude control circuitry for controlling the gain of the digitally controlled amplifier responsive to the magnitude signal.
    • 使用正交调制的发射机包括用于将数据符号转换成极性形式的矩形到极化转换器,其中每个极性符号具有幅度信号和角度信号。 数字相位调制电路包括全数字PLL电路,用于响应角度信号频率控制字(FCW)和载波频率FCW产生相位调制的RF载波信号。 用于放大相位调制信号的数字控制放大器由数字幅度控制电路控制,用于响应于幅度信号来控制数字控制放大器的增益。
    • 6. 发明授权
    • All-digital frequency synthesis with non-linear differential term for handling frequency perturbations
    • 用于处理频率扰动的非线性微分项的全数字频率合成
    • US07483508B2
    • 2009-01-27
    • US10306655
    • 2002-11-27
    • Robert B. StaszewskiDirk Leipold
    • Robert B. StaszewskiDirk Leipold
    • H03D3/24
    • H03L7/085H03L7/0991
    • An all-digital frequency synthesizer architecture is built around a digitally controlled oscillator (DCO) that is tuned in response to a digital tuning word (OTW). In exemplary embodiments: (1) a gain characteristic (KDCO) of the digitally controlled oscillator can be determined by observing a digital control word before and after a known change (Δfmax) in the oscillating frequency; (2) a portion (TUNE_TF) of the tuning word can be dithered (1202), and the resultant dithered portion (dkTF) can then be applied to a control input of switchable devices within the digitally controlled oscillator; and (3) a non-linear differential term (187, 331) can be used to expedite correction of the digitally controlled oscillator when large phase error changes (335) occur.
    • 全数字频率合成器架构围绕数字控制振荡器(DCO)构建,该振荡器响应于数字调谐字(OTW)进行调谐。 在示例性实施例中:(1)数字控制振荡器的增益特性(KDCO)可以通过在振荡频率中的已知改变(Deltafmax)之前和之后观察数字控制字来确​​定; (2)可以对调谐字的一部分(TUNE_TF)进行抖动(1202),然后将所得到的抖动部分(dkTF)施加到数字控制振荡器内的可切换装置的控制输入端; 和(3)当大相位误差变化(335)发生时,可以使用非线性微分项(187,331)来加速数字控制振荡器的校正。
    • 8. 发明授权
    • Negative contributive offset compensation in a transmit buffer utilizing inverse clocking
    • 使用反向时钟的发送缓冲器中的负贡献偏移补偿
    • US07405685B2
    • 2008-07-29
    • US11178993
    • 2005-07-11
    • Sameh S. RezeqDirk LeipoldRobert B. StaszewskiChih-Ming Hung
    • Sameh S. RezeqDirk LeipoldRobert B. StaszewskiChih-Ming Hung
    • H03M3/00
    • H03F1/0205H03F1/3241H03F2200/331H03F2200/375H03M3/356H03M3/50H03M7/3026H03M7/3037H04L27/368
    • A novel method and apparatus for a negative contributive offset compensation mechanism for a transmit buffer adapted to compensate for the positive offset generated by higher order sigma-delta modulators used to amplitude modulate the transmit buffer. The positive outputs from the sigma-delta modulator are processed differently than the negative outputs. The inverters associated with the negative outputs in the sigma-delta modulator are removed and the clock signal used to drive the transistors corresponding to the negative outputs is negated or shifted 180 degrees from the clock used to drive the transistors corresponding to the positive outputs. A non-inverted version of the clock is used with the positive outputs and an inverse clock is used with the negative outputs. Use of the inverse clock causes a negative contributive offset to be generated that is added on the second half cycle of each clock. The result is an offset compensated RF output signal having zero offset.
    • 一种用于发射缓冲器的负贡献偏移补偿机制的新颖方法和装置,适用于补偿由用于幅度调制发射缓冲器的高阶Σ-Δ调制器产生的正偏移。 来自Σ-Δ调制器的正输出的处理方式与负输出不同。 与Σ-Δ调制器中的负输出相关联的反相器被去除,并且用于驱动对应于负输出的晶体管的时钟信号与用于驱动对应于正输出的晶体管的时钟相反或偏移180度。 时钟的非反相版本与正输出一起使用,反向时钟与负输出一起使用。 使用逆时钟将产生在每个时钟的第二个半周期上添加的负贡献偏移。 结果是具有零偏移的偏移补偿RF输出信号。
    • 9. 发明申请
    • Methods and apparatus to provide an auxiliary receive path to support transmitter functions
    • 提供辅助接收路径以支持发射机功能的方法和装置
    • US20080113628A1
    • 2008-05-15
    • US11595101
    • 2006-11-09
    • Khurram MuhammadDirk Leipold
    • Khurram MuhammadDirk Leipold
    • H04B1/40
    • H04B1/52
    • Methods and apparatus to provide an auxiliary receive path to support transmitter functions are disclosed. An example transceiver includes an antenna and a duplexer coupled to the antenna. A transmitter is coupled to the duplexer to output a transmit signal at a transmit frequency. A receiver is coupled to the duplexer to receive a received signal at a receiver frequency. A signal processor is coupled to the transmitter and receiver. An auxiliary receiver is communicatively coupled to the signal processor to receive the transmit signal output from the transmitter and send an auxiliary receiver signal to the signal processor. The signal processor adjusts the transmit signal based on the auxiliary receiver signal.
    • 公开了提供辅助接收路径以支持发射机功能的方法和装置。 示例收发器包括耦合到天线的天线和双工器。 发射机耦合到双工器以以发射频率输出发射信号。 接收机耦合到双工器以在接收机频率处接收接收的信号。 信号处理器耦合到发射机和接收机。 辅助接收器通信地耦合到信号处理器以接收从发射机输出的发射信号,并向辅助接收机信号发送信号处理器。 信号处理器根据辅助接收机信号调整发射信号。
    • 10. 发明授权
    • On-chip receiver sensitivity test mechanism
    • 片上接收机灵敏度测试机制
    • US07254755B2
    • 2007-08-07
    • US10759911
    • 2004-01-16
    • Elida Isabel de ObaldiaDirk LeipoldOren EliezerRan KatzBogdan Staszewski
    • Elida Isabel de ObaldiaDirk LeipoldOren EliezerRan KatzBogdan Staszewski
    • H04B17/00
    • H04B17/0085G01R31/2822H04B17/29H04L1/24
    • An on-chip receiver sensitivity test mechanism for use in an integrated RF transmitter wherein the transmitter and the receiver share the same oscillator. The mechanism obviates the need to use expensive RF signal generator test equipment with built-in modulation capability and instead permits the use of very low cost external RF test equipment. The invention utilizes circuitry already existing in the transceiver, namely the modulation circuitry and local oscillator, to perform sensitivity testing. The on-chip LO is used to generate the modulated test signal that otherwise would need to be provided by expensive external RF test equipment with modulation capability. The modulated LO signal is mixed with an externally generated unmodulated CW RF signal to generate a modulated signal at IF which is subsequently processed by the remainder of the receiver chain. The recovered data bits are compared using an on-chip BER meter or counter and a BER reading is generated. The BER reading is used either externally or by an on-chip processor or controller to establish a pass/fail indication for the chip.
    • 用于集成RF发射机的片上接收机灵敏度测试机构,其中发射机和接收机共享相同的振荡器。 该机构避免了使用具有内置调制能力的昂贵的RF信号发生器测试设备的需要,并且允许使用非常低成本的外部RF测试设备。 本发明利用已经存在于收发器中的电路,即调制电路和本地振荡器来执行灵敏度测试。 片上LO用于产生调制测试信号,否则将需要由具有调制能力的昂贵的外部RF测试设备提供。 调制的LO信号与外部产生的未调制的CW RF信号混合以在IF处产生调制信号,随后由接收机链的其余部分处理。 恢复的数据位使用片上BER计或计数器进行比较,产生BER读数。 BER读取在外部使用或由片上处理器或控制器用于建立芯片的通过/失败指示。