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1. 发明申请

US20120007687A1 Digital Amplitude Modulation 有权
标题翻译：数字幅度调制
公开(公告)号：US20120007687A1
公开(公告)日：2012-01-12
申请号：US13237740
申请日：2011-09-20
申请人： Robert B. Staszewski , Sameh Rezeq , Dirk Leipold
发明人： Robert B. Staszewski , Sameh Rezeq , Dirk Leipold
IPC分类号： H03C1/36 , H03C1/02
CPC分类号： H04L27/361
摘要： A transmitter using quadrature modulation includes a rectangular to polar converter for converting data symbols into a polar form, where each polar symbol has a magnitude signal and an angle signal. Digital phase modulation circuitry includes an all digital PLL circuit for generating a phase modulated RF carrier signal responsive to the angle signal frequency control word (FCW) and a carrier frequency FCW. A digitally controlled amplifier for amplifying the phase modulated signal is controlled by a digital amplitude control circuitry for controlling the gain of the digitally controlled amplifier responsive to the magnitude signal.
摘要翻译：使用正交调制的发射机包括用于将数据符号转换成极性形式的矩形到极化转换器，其中每个极性符号具有幅度信号和角度信号。数字相位调制电路包括全数字PLL电路，用于响应角度信号频率控制字（FCW）和载波频率FCW产生相位调制的RF载波信号。用于放大相位调制信号的数字控制放大器由数字幅度控制电路控制，用于响应于幅度信号来控制数字控制放大器的增益。

2. 发明授权

US07929637B2 Method and apparatus for digital amplitude and phase modulation 有权
标题翻译：用于数字幅度和相位调制的方法和装置
公开(公告)号：US07929637B2
公开(公告)日：2011-04-19
申请号：US10927879
申请日：2004-08-27
申请人： Robert B. Staszewski , Sameh Rezeq , Dirk Leipold
发明人： Robert B. Staszewski , Sameh Rezeq , Dirk Leipold
IPC分类号： H04L27/00
CPC分类号： H03F3/24 , H03F1/0205 , H03F1/0211 , H03F1/32 , H03F2200/331 , H03F2200/451 , H04L27/361
摘要： A transmitter using quadrature modulation includes a rectangular to polar converter for converting data symbols into a polar form, where each polar symbol has a magnitude signal and an angle signal. Digital phase modulation circuitry includes an all digital PLL circuit for generating a phase modulated RF carrier signal responsive to the angle signal frequency control word (FCW) and a carrier frequency FCW. A digitally controlled amplifier for amplifying the phase modulated signal is controlled by a digital amplitude control circuitry for controlling the gain of the digitally controlled amplifier responsive to the magnitude signal.
摘要翻译：使用正交调制的发射机包括用于将数据符号转换成极性形式的矩形到极化转换器，其中每个极性符号具有幅度信号和角度信号。数字相位调制电路包括全数字PLL电路，用于响应角度信号频率控制字（FCW）和载波频率FCW产生相位调制的RF载波信号。用于放大相位调制信号的数字控制放大器由数字幅度控制电路控制，用于响应于幅度信号来控制数字控制放大器的增益。

3. 发明授权

US08855236B2 Digital amplitude modulation 有权
标题翻译：数字幅度调制
公开(公告)号：US08855236B2
公开(公告)日：2014-10-07
申请号：US13237740
申请日：2011-09-20
申请人： Robert B. Staszewski , Sameh Rezeq , Dirk Leipold
发明人： Robert B. Staszewski , Sameh Rezeq , Dirk Leipold
IPC分类号： H03C1/52 , H04L27/36
CPC分类号： H04L27/361
摘要： A transmitter using quadrature modulation includes a rectangular to polar converter for converting data symbols into a polar form, where each polar symbol has a magnitude signal and an angle signal. Digital phase modulation circuitry includes an all digital PLL circuit for generating a phase modulated RF carrier signal responsive to the angle signal frequency control word (FCW) and a carrier frequency FCW. A digitally controlled amplifier for amplifying the phase modulated signal is controlled by a digital amplitude control circuitry for controlling the gain of the digitally controlled amplifier responsive to the magnitude signal.
摘要翻译：使用正交调制的发射机包括用于将数据符号转换成极性形式的矩形到极化转换器，其中每个极性符号具有幅度信号和角度信号。数字相位调制电路包括全数字PLL电路，用于响应角度信号频率控制字（FCW）和载波频率FCW产生相位调制的RF载波信号。用于放大相位调制信号的数字控制放大器由数字幅度控制电路控制，用于响应于幅度信号来控制数字控制放大器的增益。

4. 发明授权

US08411793B2 Digital amplitude modulation 有权
标题翻译：数字幅度调制
公开(公告)号：US08411793B2
公开(公告)日：2013-04-02
申请号：US13081338
申请日：2011-04-06
申请人： Robert B. Staszewski , Sameh Rezeq , Dirk Leipold
发明人： Robert B. Staszewski , Sameh Rezeq , Dirk Leipold
IPC分类号： H04K1/02
CPC分类号： H04L27/361
摘要： A transmitter using quadrature modulation includes a rectangular to polar converter for converting data symbols into a polar form, where each polar symbol has a magnitude signal and an angle signal. Digital phase modulation circuitry includes an all digital PLL circuit for generating a phase modulated RF carrier signal responsive to the angle signal frequency control word (FCW) and a carrier frequency FCW. A digitally controlled amplifier for amplifying the phase modulated signal is controlled by a digital amplitude control circuitry for controlling the gain of the digitally controlled amplifier responsive to the magnitude signal.
摘要翻译：使用正交调制的发射机包括用于将数据符号转换成极性形式的矩形到极化转换器，其中每个极性符号具有幅度信号和角度信号。数字相位调制电路包括全数字PLL电路，用于响应角度信号频率控制字（FCW）和载波频率FCW产生相位调制的RF载波信号。用于放大相位调制信号的数字控制放大器由数字幅度控制电路控制，用于响应于幅度信号来控制数字控制放大器的增益。

5. 发明申请

US20110182382A1 DIGITAL AMPLITUDE MODULATION 有权
标题翻译：数字振幅调制
公开(公告)号：US20110182382A1
公开(公告)日：2011-07-28
申请号：US13081338
申请日：2011-04-06
申请人： Robert B. Staszewski , Sameh Rezeq , Dirk Leipold
发明人： Robert B. Staszewski , Sameh Rezeq , Dirk Leipold
IPC分类号： H04L27/36
CPC分类号： H04L27/361
摘要： A transmitter using quadrature modulation includes a rectangular to polar converter for converting data symbols into a polar form, where each polar symbol has a magnitude signal and an angle signal. Digital phase modulation circuitry includes an all digital PLL circuit for generating a phase modulated RF carrier signal responsive to the angle signal frequency control word (FCW) and a carrier frequency FCW. A digitally controlled amplifier for amplifying the phase modulated signal is controlled by a digital amplitude control circuitry for controlling the gain of the digitally controlled amplifier responsive to the magnitude signal.
摘要翻译：使用正交调制的发射机包括用于将数据符号转换成极性形式的矩形到极化转换器，其中每个极性符号具有幅度信号和角度信号。数字相位调制电路包括全数字PLL电路，用于响应角度信号频率控制字（FCW）和载波频率FCW产生相位调制的RF载波信号。用于放大相位调制信号的数字控制放大器由数字幅度控制电路控制，用于响应于幅度信号来控制数字控制放大器的增益。

6. 发明申请

US20110261871A1 ALL-DIGITAL FREQUENCY SYNTHESIS WITH DCO GAIN CALCULATION 有权
标题翻译：全数字频率合成与DCO增益计算
公开(公告)号：US20110261871A1
公开(公告)日：2011-10-27
申请号：US13175594
申请日：2011-07-01
申请人： Robert B. Staszewski , Dirk Leipold , John Wallberg
发明人： Robert B. Staszewski , Dirk Leipold , John Wallberg
IPC分类号： H04B17/00
CPC分类号： H03L7/085 , H03L7/0991 , H03L2207/50
摘要： An all-digital frequency synthesizer architecture is built around a digitally controlled oscillator (DCO) that is tuned in response to a digital tuning word (OTW). In exemplary embodiments: (1) a gain characteristic (KDCO) of the digitally controlled oscillator can be determined by observing a digital control word before and after a known change (Δfmax) in the oscillating frequency; and (2) a portion (TUNE_TF) of the tuning word can be dithered (1202), and the resultant dithered portion (dkTF) can then be applied to a control input of switchable devices within the digitally controlled oscillator.
摘要翻译：全数字频率合成器架构围绕数字控制振荡器（DCO）构建，该振荡器响应于数字调谐字（OTW）进行调谐。在示例性实施例中：（1）数字控制振荡器的增益特性（KDCO）可以通过在振荡频率中的已知变化（＆Dgr; fmax）之前和之后观察数字控制字来确定; 和（2）调谐字的一部分（TUNE_TF）可以被抖动（1202），并且所得到的抖动部分（dkTF）然后可以被施加到数字控制振荡器内的可切换装置的控制输入。

7. 发明授权

US08027657B2 Sampling mixer with asynchronous clock and signal domains 有权
标题翻译：具有异步时钟和信号域的采样混频器
公开(公告)号：US08027657B2
公开(公告)日：2011-09-27
申请号：US10121761
申请日：2002-04-12
申请人： Robert B. Staszewski , Khurram Muhammad , Yo-Chuol Ho , Dirk Leipold
发明人： Robert B. Staszewski , Khurram Muhammad , Yo-Chuol Ho , Dirk Leipold
IPC分类号： H04B1/26 , H04L27/00
CPC分类号： H03D7/125 , H04B1/1036
摘要： A mixer 1100 with a plurality of signal paths typically requires separate clock generating hardware for each signal path. However, the redundancy of having multiple clock generating hardware significantly increases power consumption and integrated circuit area when the mixer 1100 is integrated into silicon. A method and apparatus 1125 containing a circuit for generating a set of clock signals that can be shared by the different signal paths is presented. Advantage is taken of the significant capacitance difference between different sampling capacitors in the mixer and the superposition property.
摘要翻译：具有多个信号路径的混频器1100通常需要用于每个信号路径的单独的时钟产生硬件。然而，当混合器1100集成到硅中时，具有多个时钟产生硬件的冗余显着地增加了功耗和集成电路面积。提出了一种包含用于生成可由不同信号路径共享的一组时钟信号的电路的方法和装置1125。利用混频器中不同采样电容器之间的显着电容差和叠加特性。

8. 发明授权

US08000428B2 All-digital frequency synthesis with DCO gain calculation 有权
标题翻译：全数字频率合成采用DCO增益计算
公开(公告)号：US08000428B2
公开(公告)日：2011-08-16
申请号：US10302029
申请日：2002-11-22
申请人： Robert B. Staszewski , Dirk Leipold , John Wallberg
发明人： Robert B. Staszewski , Dirk Leipold , John Wallberg
IPC分类号： H04L7/00
CPC分类号： H03L7/085 , H03L7/0991 , H03L2207/50
摘要： An all-digital frequency synthesizer architecture is built around a digitally controlled oscillator (DCO) that is tuned in response to a digital tuning word (OTW). In exemplary embodiments: (1) a gain characteristic (KDCO) of the digitally controlled oscillator can be determined by observing a digital control word before and after a known change (Δfmax) in the oscillating frequency; and (2) a portion (TUNE_TF) of the tuning word can be dithered (1202), and the resultant dithered portion (dkTF) can then be applied to a control input of switchable devices within the digitally controlled oscillator.
摘要翻译：全数字频率合成器架构围绕数字控制振荡器（DCO）构建，该振荡器响应于数字调谐字（OTW）进行调谐。在示例性实施例中：（1）数字控制振荡器的增益特性（KDCO）可以通过在振荡频率中的已知变化（＆Dgr; fmax）之前和之后观察数字控制字来确定; 和（2）调谐字的一部分（TUNE_TF）可以被抖动（1202），并且所得到的抖动部分（dkTF）然后可以被施加到数字控制振荡器内的可切换装置的控制输入。

9. 发明授权

US07813462B2 Method of defining semiconductor fabrication process utilizing transistor inverter delay period 有权
标题翻译：利用晶体管反相器延迟周期定义半导体制造工艺的方法
公开(公告)号：US07813462B2
公开(公告)日：2010-10-12
申请号：US11550878
申请日：2006-10-19
申请人： Elida Isabel de Obaldia , Robert B. Staszewski , Dirk Leipold
发明人： Elida Isabel de Obaldia , Robert B. Staszewski , Dirk Leipold
IPC分类号： H03D3/24
CPC分类号： H04L27/361 , H03L7/091 , H03L7/0991 , H03L7/1806
摘要： A novel method and apparatus for defining process variation in a digital RF processor (DRP). The invention is well suited for use in highly integrated system on a chip (SoC) radio solutions that incorporate a very large amount of digital logic circuitry. The method and apparatus provide direct measurement of fabrication process variation in circuits without requiring any additional test equipment by utilizing a time to digital converter (TDC) circuit already present in the chip. The TDC circuit relies on the time delay in an inverter chain to sample a high speed CKV clock using a slow FREF clock. Calculation of inverse time provides a direct correlation for fabrication process variation in each die.
摘要翻译：一种用于定义数字RF处理器（DRP）中的处理变化的新颖方法和装置。本发明非常适用于结合了大量数字逻辑电路的高度集成的片上系统（SoC）无线电解决方案。该方法和装置提供对电路中制造工艺变化的直接测量，而不需要使用已经存在于芯片中的时间 - 数字转换器（TDC）电路的任何额外的测试设备。 TDC电路依赖于逆变器链中的时间延迟，使用缓慢的FREF时钟采样高速CKV时钟。逆时间的计算提供了每个模具中制造工艺变化的直接相关性。

10. 发明授权

US07667511B2 Efficient pulse amplitude modulation transmit modulation 有权
标题翻译：有效的脉冲幅度调制发射调制
公开(公告)号：US07667511B2
公开(公告)日：2010-02-23
申请号：US11195060
申请日：2005-08-02
申请人： Robert B. Staszewski , Dirk Leipold , Kenneth J. Maggio
发明人： Robert B. Staszewski , Dirk Leipold , Kenneth J. Maggio
IPC分类号： H03K3/017
CPC分类号： H03F1/02 , H03F1/0205 , H03F3/217 , H03F3/2171 , H03F3/2176 , H03F2200/331 , H03K5/06 , H03K7/02 , H04B1/0483 , H04B2001/0491
摘要： Efficient PAM transmit modulation is provided by a PAM modulator that includes an oscillator (404) that provides a clock signal, CKV, (408). The clock signal 408 and a delayed version (CKV_DLY) 420 of the clock signal are provided to a logic gate (414). The output of logic gate (414) is used as a power amplifier input signal (PA_IN) for radio frequency power amplifier (416). Depending on the relative time delay of the CKV clock signal (408) and the CKV_DLY delayed clock signal (420), the timing and duty cycle of the logic gate (414) duty cycle can be controlled. The duty cycle or pulse-width variation affects the turn-on time of the power amplifier (416); thereby establishing the RF output amplitude.
摘要翻译：由PAM调制器提供有效的PAM发射调制，PAM调制器包括提供时钟信号CKV（408）的振荡器（404）。时钟信号408和时钟信号的延迟版本（CKV_DLY）420被提供给逻辑门（414）。逻辑门（414）的输出用作射频功率放大器（416）的功率放大器输入信号（PA_IN）。根据CKV时钟信号（408）和CKV_DLY延迟时钟信号（420）的相对时间延迟，可以控制逻辑门（414）占空比的定时和占空比。占空比或脉冲宽度变化影响功率放大器的导通时间（416）; 从而建立RF输出振幅。

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