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1. 发明授权

US5841623A Chuck for substrate processing and method for depositing a film in a radio frequency biased plasma chemical depositing system 失效
标题翻译：用于衬底处理的卡盘和用于在射频偏压等离子体化学沉积系统中沉积膜的方法
公开(公告)号：US5841623A
公开(公告)日：1998-11-24
申请号：US577535
申请日：1995-12-22
申请人： Dean R. Denison , David R. Pirkle , Alain Harrus
发明人： Dean R. Denison , David R. Pirkle , Alain Harrus
IPC分类号： H01L21/683 , H02N13/00
CPC分类号： H02N13/00 , H01L21/6831 , H01L21/6833 , Y10T279/23
摘要： A chuck for processing a substrate includes a chuck body having a dielectric layer, the dielectric layer including a substrate receiving surface, the substrate receiving surface being at least as large as a substrate to be processed on the chuck. The chuck further includes an electrode buried in the chuck body, the electrode being larger than the substrate receiving surface such that edges of a radio frequency field generated by the electrode are all disposed beyond the substrate receiving surface. A method for depositing a film in a radio frequency biased plasma chemical deposition system is also disclosed.
摘要翻译：用于处理基板的卡盘包括具有电介质层的卡盘主体，该电介质层包括基板接收表面，该基板接收表面至少与卡盘上要处理的基板一样大。卡盘还包括埋在卡盘主体中的电极，电极大于基板接收表面，使得由电极产生的射频场的边缘都设置在基板接收表面之外。还公开了一种在射频偏压等离子体化学沉积系统中沉积膜的方法。

2. 发明授权

US06670278B2 Method of plasma etching of silicon carbide 有权
公开(公告)号：US06670278B2
公开(公告)日：2003-12-30
申请号：US09820726
申请日：2001-03-30
申请人： Si Yi Li , Helen H. Zhu , S. M. Reza Sadjadi , David R. Pirkle , James Bowers , Michael Goss
发明人： Si Yi Li , Helen H. Zhu , S. M. Reza Sadjadi , David R. Pirkle , James Bowers , Michael Goss
IPC分类号： H01L21302
CPC分类号： H01L21/7681 , H01L21/31116 , H01L21/76807
摘要： The invention provides a process for plasma etching silicon carbide with selectivity to an overlapping and/or underlying dielectric layer of material. The etching gas includes a hydrogen-containing fluorocarbon gas such as CH3F, an oxygen-containing gas such as O2 and an optional carrier gas such as Ar. The dielectric material can comprise silicon dioxide, silicon nitride, silicon oxynitride or various low-k dielectric materials including organic low-k materials. In order to achieve a desired selectivity to such dielectric materials, the plasma etch gas chemistry is selected to achieve a desired etch rate of the silicon carbide while etching the dielectric material at a slower rate. The process can be used to selectively etch a hydrogenated silicon carbide etch stop layer or silicon carbide substrates.

3. 发明授权

US06962879B2 Method of plasma etching silicon nitride 有权
标题翻译：等离子体蚀刻氮化硅的方法
公开(公告)号：US06962879B2
公开(公告)日：2005-11-08
申请号：US09820694
申请日：2001-03-30
申请人： Helen H. Zhu , David R. Pirkle , S. M. Reza Sadjadi , Andrew S. Li
发明人： Helen H. Zhu , David R. Pirkle , S. M. Reza Sadjadi , Andrew S. Li
IPC分类号： H01L21/311 , H01L21/768 , H01L21/302
CPC分类号： H01L21/76811 , H01L21/31116 , H01L21/76807 , H01L21/7681 , H01L21/76813
摘要： A semiconductor manufacturing process wherein silicon nitride is plasma etched with selectivity to an overlying and/or underlying dielectric layer such as a silicon oxide or low-k material. The etchant gas includes a fluorocarbon reactant and an oxygen reactant, the ratio of the flow rate of the oxygen reactant to that of the fluorocarbon reactant being no greater than 1.5. The etch rate of the silicon nitride can be at least 5 times higher than that of the oxide. Using a combination of CH3F and O2 with optional carrier gasses such as Ar and/or N2, it is possible to obtain nitride:oxide etch rate selectivities of over 40:1. The process is useful for simultaneously removing silicon nitride in 0.25 micron and smaller contact or via openings and wide trenches in forming structures such as damascene and self-aligned structures.
摘要翻译：半导体制造工艺，其中氮化硅被等离子体蚀刻，对上覆和/或下层介电层（例如氧化硅或低k材料）具有选择性。蚀刻剂气体包括氟碳反应物和氧反应物，氧反应物的流速与氟碳反应物的流速之比不大于1.5。氮化硅的蚀刻速率可以比氧化物的蚀刻速度高5倍以上。使用CH 3 3 F和O 2 2的组合与可选的载气如Ar和/或N 2 N组合，可以获得氮化物：氧化物蚀刻速率选择性超过40：1。该方法对于同时去除0.25微米和更小的接触或通孔开口和宽沟槽中的氮化硅在形成结构如镶嵌和自对准结构中是有用的。

4. 发明授权

US5846373A Method for monitoring process endpoints in a plasma chamber and a process monitoring arrangement in a plasma chamber 失效
标题翻译：用于监测等离子体室中的过程端点和等离子体室中的过程监控装置的方法
公开(公告)号：US5846373A
公开(公告)日：1998-12-08
申请号：US671918
申请日：1996-06-28
申请人： David R. Pirkle , Randall S. Mundt , William Harshbarger
发明人： David R. Pirkle , Randall S. Mundt , William Harshbarger
IPC分类号： C23C16/44 , C23C16/50 , C23C16/52 , G01B11/06 , H01J37/32 , C23C1/08 , C23C1/00
CPC分类号： H01J37/32935 , C23C16/4405 , C23C16/50 , C23C16/52 , G01B11/0683 , H01J37/32963 , H01J37/32972
摘要： Thin film deposition process endpoints and in situ-clean process endpoints are monitored using a single light filter and photodetector arrangement. The light filter has a peak transmission proximate a characteristic wavelength of the deposition plasma, such as Si, and one of the plurality of reaction products, such as NO, in the plasma chamber during in-situ cleaning. Emissions passing through the filter are converted to voltage measurements by a photodetector. In deposition endpoint monitoring, emission intensity of the Si emissions reflected off the surface of the substrate oscillate as deposition thickness increases, with each oscillation corresponding to a definite increase in thickness of the film. The endpoint of the deposition is reached when the number of oscillations in signal intensity versus time corresponds to a desired film thickness. Alternatively, a deposition rate for the film is calculated from the oscillation frequency of emissions reflected off the substrate. Endpoint occurs when the integrated deposition rate corresponds to the desired film thickness. In in-situ clean endpoint monitoring, the endpoint of the process is reached when emission intensity of the particular reaction product decreases to a substantially steady state value, meaning that the reaction is complete.
摘要翻译：使用单个光滤波器和光电检测器布置来监测薄膜沉积工艺端点和原位清洁工艺端点。光过滤器在原位清洁期间在等离子体室中具有接近沉积等离子体的特征波长（诸如Si）和多个反应产物（例如NO）中的一个的峰值传输。通过滤波器的发射通过光电检测器转换成电压测量。在沉积端点监测中，随着沉积厚度的增加，从衬底的表面反射的Si发射的发射强度振荡，每个振荡对应于膜的厚度的确定的增加。当信号强度对时间的振荡次数对应于期望的膜厚度时，达到沉积的终点。或者，根据从衬底反射的发射的振荡频率计算膜的沉积速率。当积分沉积速率对应于所需的膜厚度时，发生端点。在原位清洁端点监测中，当特定反应产物的发射强度降低到基本上稳定的状态值时，达到该过程的终点，意味着反应完成。

5. 发明授权

US06794293B2 Trench etch process for low-k dielectrics 有权
标题翻译：低k电介质的沟槽蚀刻工艺
公开(公告)号：US06794293B2
公开(公告)日：2004-09-21
申请号：US09972765
申请日：2001-10-05
申请人： SiYi Li , S. M. Reza Sadjadi , David R. Pirkle , Steve Lassig , Sean Kang , Vinay Pohray , Peter Cirigliano
发明人： SiYi Li , S. M. Reza Sadjadi , David R. Pirkle , Steve Lassig , Sean Kang , Vinay Pohray , Peter Cirigliano
IPC分类号： H01L21302
CPC分类号： H01L21/31116 , H01L21/02126 , H01L21/31138 , H01L21/312 , H01L21/3124 , H01L21/3127 , H01L21/31629 , H01L21/31695 , H01L21/76804 , H01L21/76808
摘要： The present inventions is a method of trench formation within a dielectric layer, comprising, first, etching a via within the dielectric layer. After the via is etched, an organic plug is used to fill a portion of the via. After the desired amount of organic plug has been etched from the via, a trench is etched with a first gas mixture to a first depth, and a second gas mixture is used to further etch the trench to the final desired trench depth. Preferably, the method is used for low-k dielectrics that do not have an intermediate etch stop layer. Additionally, it is preferable that the first gas mixture is a polymeric gas mixture and the second gas mixture is a non-polymeric gas mixture. As a result of using this method, an interconnect structure for a low-k dielectric without an intermediate etch stop layer having a trench with trench edges that are substantially orthogonal and a via with via edges that are substantially orthogonal is generated.
摘要翻译：本发明是一种在电介质层内形成沟槽的方法，包括：首先蚀刻电介质层内的通孔。在蚀刻通孔之后，使用有机插塞来填充通孔的一部分。在从通孔蚀刻所需量的有机插塞之后，用第一气体混合物蚀刻沟槽至第一深度，并且使用第二气体混合物来进一步将沟槽蚀刻到最终期望的沟槽深度。优选地，该方法用于不具有中间蚀刻停止层的低k电介质。另外，优选地，第一气体混合物是聚合气体混合物，第二气体混合物是非聚合气体混合物。作为使用该方法的结果，产生用于低k电介质的互连结构，而不具有中间蚀刻停止层，该中间蚀刻停止层具有沟槽边缘，其基本上正交，并且具有基本正交的通孔边缘的通孔。

6. 发明授权

US6016766A Microwave plasma processor 失效
标题翻译：微波等离子体处理器
公开(公告)号：US6016766A
公开(公告)日：2000-01-25
申请号：US998945
申请日：1997-12-29
申请人： David R. Pirkle , John Daugherty , Michael Giarratano , C. Robert Koemtzopoulos , Felix Kozakevich
发明人： David R. Pirkle , John Daugherty , Michael Giarratano , C. Robert Koemtzopoulos , Felix Kozakevich
IPC分类号： C23C16/511 , H01J37/32 , C23C16/00
CPC分类号： H01J37/32192 , C23C16/511 , H01J37/32678
摘要： Ionizable gas supplied to an electron cyclotron resonance vacuum plasma processor chamber for semiconductor wafers is excited to a plasma state by microwave energy coupled to the chamber. The level of microwave power reflected from the chamber controls the level of microwave power derived from a source driving the ionizable gas in the chamber.
摘要翻译：提供给用于半导体晶片的电子回旋共振真空等离子体处理器室的可离子化气体通过耦合到腔室的微波能量被激发到等离子体状态。从腔室反射的微波功率的水平控制来自驱动腔室中的可电离气体的源的源的微波功率的水平。

7. 发明授权

US07534363B2 Method for providing uniform removal of organic material 有权
标题翻译：提供均匀去除有机材料的方法
公开(公告)号：US07534363B2
公开(公告)日：2009-05-19
申请号：US10877222
申请日：2004-06-25
申请人： Rao V. Annapragada , Odette Turmel , Kenji Takeshita , Lily Zheng , Thomas S. Choi , David R. Pirkle
发明人： Rao V. Annapragada , Odette Turmel , Kenji Takeshita , Lily Zheng , Thomas S. Choi , David R. Pirkle
IPC分类号： C23F1/00
CPC分类号： H01J37/3244 , G03F7/427 , H01J37/32082 , H01L21/31116 , H01L21/31138
摘要： A method for removing organic material over a substrate is provided. The substrate is placed in a plasma processing chamber. A first gas is provided to an inner zone within the plasma processing chamber. A second gas is provided to an outer zone of the plasma processing chamber, wherein the outer zone surrounds the inner zone and the second gas has a carbon containing component, wherein a concentration of the carbon containing component of the second gas is greater than a concentration of the carbon containing component in the first gas. Plasmas are simultaneously generated from the first gas and second gas. Some or all of the organic material is removed using the generated plasmas.
摘要翻译：提供了一种在衬底上除去有机材料的方法。将基板放置在等离子体处理室中。第一气体被提供到等离子体处理室内的内部区域。第二气体被提供到等离子体处理室的外部区域，其中外部区域围绕内部区域，第二气体具有含碳成分，其中第二气体的含碳成分的浓度大于浓度的第一气体中的含碳组分。从第一气体和第二气体同时产生等离子体。使用所产生的等离子体去除部分或全部有机材料。

8. 发明授权

US06909195B2 Trench etch process for low-k dielectrics 有权
公开(公告)号：US06909195B2
公开(公告)日：2005-06-21
申请号：US10826211
申请日：2004-04-16
申请人： SiYi Li , S. M. Reza Sadjadi , David R. Pirkle , Steve Lassig , Sean Kang , Vinay Pohray , Peter Cirigliano
发明人： SiYi Li , S. M. Reza Sadjadi , David R. Pirkle , Steve Lassig , Sean Kang , Vinay Pohray , Peter Cirigliano
IPC分类号： H01L21/311 , H01L21/312 , H01L21/316 , H01L21/768 , H01L23/48
CPC分类号： H01L21/31116 , H01L21/02126 , H01L21/31138 , H01L21/312 , H01L21/3124 , H01L21/3127 , H01L21/31629 , H01L21/31695 , H01L21/76804 , H01L21/76808
摘要： The present inventions is a method of trench formation within a dielectric layer, comprising, first, etching a via within the dielectric layer. After the via is etched, an organic plug is used to fill a portion of the via. After the desired amount of organic plug has been etched from the via, a trench is etched with a first gas mixture to a first depth, and a second gas mixture is used to further etch the trench to the final desired trench depth. Preferably, the method is used for low-k dielectrics that do not have an intermediate etch stop layer. Additionally, it is preferable that the first gas mixture is a polymeric gas mixture and the second gas mixture is a non-polymeric gas mixture. As a result of using this method, an interconnect structure for a low-k dielectric without an intermediate etch stop layer having a trench with trench edges that are substantially orthogonal and a via with via edges that are substantially orthogonal is generated.

9. 发明授权

US5915190A Methods for filling trenches in a semiconductor wafer 失效
标题翻译：在半导体晶片中填充沟槽的方法
公开(公告)号：US5915190A
公开(公告)日：1999-06-22
申请号：US902656
申请日：1997-07-30
申请人： David R. Pirkle
发明人： David R. Pirkle
IPC分类号： H01L21/316 , H01L21/762
CPC分类号： H01L21/02164 , H01L21/02211 , H01L21/02274 , H01L21/02304 , H01L21/31608 , H01L21/31612 , H01L21/76202 , H01L21/76224
摘要： A method for filling a trench in a semiconductor wafer that is disposed in a plasma-enhanced chemical vapor deposition chamber. The method includes the step of depositing a protection layer of silicon dioxide over the wafer and into the trench while the wafer is biased at a first RF bias level. The protection layer has a thickness that is insufficient to completely fill the trench. Further, there is provided the step of forming a trench-fill layer of silicon dioxide over the protection layer and into the trench while the wafer is biased at a second RF bias level that is higher than the first bias level.
摘要翻译：一种用于在设置在等离子体增强化学气相沉积室中的半导体晶片中填充沟槽的方法。该方法包括以下步骤：在晶片被偏置在第一RF偏压电平的同时，在晶片上沉积二氧化硅保护层并进入沟槽。保护层具有不足以完全填充沟槽的厚度。此外，提供了在保护层和沟槽中形成二氧化硅的沟槽填充层的步骤，同时晶片被偏置在高于第一偏置电平的第二RF偏置电平。

10. 发明授权

US5647953A Plasma cleaning method for removing residues in a plasma process chamber 失效
标题翻译：用于去除等离子体处理室中残留物的等离子体清洁方法
公开(公告)号：US5647953A
公开(公告)日：1997-07-15
申请号：US577340
申请日：1995-12-22
申请人： Larry Williams , David R. Pirkle , William Harshbarger , Timothy Ebel
发明人： Larry Williams , David R. Pirkle , William Harshbarger , Timothy Ebel
IPC分类号： B08B7/00 , C23C16/44 , C23C16/00
CPC分类号： B08B7/0035 , C23C16/4404 , C23C16/4405 , Y10S438/905
摘要： A method for cleaning and conditioning a plasma processing chamber wherein oxide residues have been previously formed on interior surfaces of the chamber. The method includes introducing a cleaning gas including a fluorine-based gas into the chamber followed by performing a plasma cleaning step. The plasma cleaning step is performed by activating the cleaning gas mixture and forming a plasma cleaning gas, contacting interior surfaces of the chamber with the plasma cleaning gas and removing oxide residues on the interior surfaces. The cleaning step is followed by coating the interior surfaces with silicon dioxide to adhere loose particles to the interior surfaces and a conditioning step wherein uncoated interior surfaces are treated to remove fluorine therefrom. An advantage of the cleaning and conditioning method is that it is not necessary to open the chamber. Also, it is possible to remove oxide residues during the cleaning step and remove fluorine remaining after the cleaning step during the conditioning step. The conditioning step is carried out by introducing a hydrogen-containing gas into the chamber as a purge gas or the chamber can be pressurized by the hydrogen-containing gas followed by evacuating the chamber.
摘要翻译：一种用于清洁和调节等离子体处理室的方法，其中先前在室的内表面上形成氧化物残留物。该方法包括将包括氟基气体的清洁气体引入室中，然后执行等离子体清洗步骤。通过激活清洁气体混合物并形成等离子体清洁气体，使室的内表面与等离子体清洁气体接触并除去内表面上的氧化物残余物来进行等离子体清洗步骤。清洁步骤之后，用二氧化硅涂覆内表面以将松散的颗粒粘附到内表面，以及调节步骤，其中处理未涂覆的内表面以从其中除去氟。清洁和调节方法的优点是不需要打开室。此外，在清洁步骤期间可以除去氧化物残留物，并且在调节步骤期间除去清洁步骤后剩余的氟。调节步骤通过将含氢气体作为吹扫气体引入室中，或者可以通过含氢气体对室进行加压，然后抽空室来进行。

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