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    • 1. 发明申请
    • Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric region
    • 在电介质区域上形成掩模层,以便在由电介质区域分隔的导电区域上形成覆盖层
    • US20060264020A1
    • 2006-11-23
    • US11132841
    • 2005-05-18
    • David LazovskySandra MalhotraThomas Boussie
    • David LazovskySandra MalhotraThomas Boussie
    • H01L21/44
    • H01L21/76829B82Y30/00H01L21/02183H01L21/3148H01L21/31633H01L21/31695H01L21/3185H01L21/76826H01L21/76849
    • A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; in either case (particularly in the latter), capping layer material formed over the dielectric region can subsequently be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions. Silane-based materials, such as silane-based SAMs, can be used to form the masking layer. The capping layer can be formed of an electrically conductive material (e.g., a cobalt alloy, a nickel alloy, tungsten, tantalum, tantalum nitride), a semiconductor material, or an electrically insulative material, and can be formed using any appropriate process, including conventional deposition processes such as electroless deposition, chemical vapor deposition, physical vapor deposition or atomic layer deposition.
    • 在电子器件的电介质区域上形成掩模层,使得在随后在由电介质区域分离的电子器件的导电区域上形成覆盖层时,掩模层阻止在其上形成覆盖层材料 在电介质区域。 可以选择性地在导电区域或非选择性地形成覆盖层; 在任一情况下(特别是在后者中),可以随后去除在电介质区域上形成的覆盖层材料,从而确保覆盖层材料仅在导电区域上形成。 可以使用诸如硅烷基SAM之类的硅烷基材料来形成掩模层。 覆盖层可以由导电材料(例如,钴合金,镍合金,钨,钽,氮化钽),半导体材料或电绝缘材料形成,并且可以使用任何适当的工艺形成,包括 常规沉积工艺如无电沉积,化学气相沉积,物理气相沉积或原子层沉积。
    • 5. 发明申请
    • Substrate processing using molecular self-assembly
    • 使用分子自组装的基板加工
    • US20060060301A1
    • 2006-03-23
    • US11231047
    • 2005-09-19
    • David LazovskyTony ChiangSandra Malhotra
    • David LazovskyTony ChiangSandra Malhotra
    • H01L21/306C23F1/00
    • B82Y30/00H01L21/76834H01L21/76849
    • A system for molecular self-assembly referred to herein as a “molecular self-assembly system (MSAS)” includes at least one interface configured to receive at least one substrate. The MSAS also includes at least one molecular self-assembly module coupled to the interface. The MSAS can also include one or more of pre-processing modules, other molecular self-assembly processing modules, and post-processing modules, and may include any number, combination, and/or type of other modules. Each module of the MSAS can contain at least one of a number of different processes as appropriate to a processing configuration of the MSAS. The MSAS also includes at least one handler coupled to the interface and configured to move the substrate between the interface and one or more of the modules.
    • 本文中称为“分子自组装系统(MSAS)”的分子自组装系统包括至少一个接口,其被配置为接收至少一个衬底。 MSAS还包括耦合到该界面的至少一个分子自组装模块。 MSAS还可以包括一个或多个预处理模块,其他分子自组装处理模块和后处理模块,并且可以包括其他模块的任何数量,组合和/或类型。 MSAS的每个模块可以包含适合于MSAS的处理配置的多个不同进程中的至少一个。 MSAS还包括至少一个处理器,其耦合到接口并且被配置为在接口和一个或多个模块之间移动衬底。
    • 7. 发明授权
    • Manufacturable high-k DRAM MIM capacitor structure
    • 可制造的高k DRAM MIM电容器结构
    • US08765570B2
    • 2014-07-01
    • US13494808
    • 2012-06-12
    • Sandra MalhotraWim DeweerdHiroyuki Ode
    • Sandra MalhotraWim DeweerdHiroyuki Ode
    • H01L21/20
    • H01L28/56H01L27/10852H01L28/60H01L28/90
    • A method for forming a capacitor stack is described. In some embodiments of the present invention, a first dielectric material is formed above a first electrode material. The first electrode material is rigid and has good mechanical strength and serves as a robust frame for the capacitor stack. The first dielectric material is sufficiently thin ( 3 nm) or lightly doped or non-doped so that it crystallizes after subsequent anneal treatments. A second electrode material is formed adjacent to the second dielectric material. The second electrode material has a high work function and a crystal structure that serves to promote the formation of the high k-value crystal structure of the second dielectric material.
    • 描述形成电容器堆叠的方法。 在本发明的一些实施例中,第一电介质材料形成在第一电极材料之上。 第一电极材料是刚性的并且具有良好的机械强度并且用作用于电容器叠层的坚固框架。 第一介电材料足够薄(<2nm)或高度掺杂,使得在随后的退火处理之后其保持非晶态。 在第一电介质材料上方形成第二电介质材料。 第二介电材料足够厚(> 3nm)或轻掺杂或未掺杂,使得其在随后的退火处理之后结晶。 与第二电介质材料相邻地形成第二电极材料。 第二电极材料具有高功函数和用于促进形成第二电介质材料的高k值晶体结构的晶体结构。
    • 9. 发明授权
    • Method of forming an ALD material
    • 形成ALD材料的方法
    • US08563392B2
    • 2013-10-22
    • US13310980
    • 2011-12-05
    • Sandra MalhotraWim DeweerdEdward HaywoodHiroyuki Ode
    • Sandra MalhotraWim DeweerdEdward HaywoodHiroyuki Ode
    • H01L21/02
    • C23C16/45534C23C16/405H01L21/28562H01L21/32051H01L28/60
    • In some embodiments of the present invention, methods are developed wherein a gas flow of an electron donating compound (EDC) is introduced in sequence with a precursor pulse and alters the deposition of the precursor material. In some embodiments, the EDC pulse is introduced sequentially with the precursor pulse with a purge step used to remove the non-adsorbed EDC from the process chamber before the precursor is introduced. In some embodiments, the EDC pulse is introduced using a vapor draw technique or a bubbler technique. In some embodiments, the EDC pulse is introduced in the same gas distribution manifold as the precursor pulse. In some embodiments, the EDC pulse is introduced in a separate gas distribution manifold from the precursor pulse.
    • 在本发明的一些实施方案中,开发了一种方法,其中给电子化合物(EDC)的气流按前驱脉冲依次导入并改变前体材料的沉积。 在一些实施方案中,EDC脉冲依次与前体脉冲一起引入,其中吹扫步骤用于在引入前体之前从处理室去除未吸附的EDC。 在一些实施例中,使用蒸汽抽吸技术或起泡器技术引入EDC脉冲。 在一些实施例中,EDC脉冲被引入与前驱脉冲相同的气体分配歧管中。 在一些实施例中,EDC脉冲从前驱脉冲引入到单独的气体分配歧管中。