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1. 发明申请

US20060156635A1 Abrasive particles, polishing slurry, and producing method thereof 审中-公开
标题翻译：磨料颗粒，抛光浆料及其制备方法
公开(公告)号：US20060156635A1
公开(公告)日：2006-07-20
申请号：US11305535
申请日：2005-12-16
申请人： Dae Kim , Seok Hong , Yong Kim , Dong Kim , Myoung Suh , Jea Park , Un Paik
发明人： Dae Kim , Seok Hong , Yong Kim , Dong Kim , Myoung Suh , Jea Park , Un Paik
IPC分类号： C09K3/14
CPC分类号： C09K3/1409 , C09K3/1463 , H01L21/31053
摘要： Disclosed herein is a polishing slurry for use in an STI CMP process, necessary for fabricating ultra highly integrated semiconductors of 256 mega D-RAM or more (Design rule of 0.13 μm or less), which can polish wafers at a high removal rate, having an excellent the removal selectivity of oxide compared to nitride. The polishing slurry can be applied to various patterns required in the course of producing ultra highly integrated semiconductors, and thus excellent removal rate, removal selectivity, and within-wafer-nonuniformity (WIWNU), which indicates removal uniformity, as well as minimal occurrence of micro scratches, can be assured.
摘要翻译：本文公开了一种用于STI CMP工艺的抛光浆料，其是制造256兆D-RAM以上的超高度集成半导体（设计规则为0.13μm或更小）所必需的，其可以以高去除速度抛光晶片，具有与氮化物相比，氧化物的去除选择性优异。研磨浆料可以应用于制造超高度集成半导体的过程中所需的各种图案，因此优异的去除速度，去除选择性和晶片内不均匀性（WIWNU），这表明去除均匀性，以及最小的发生微划痕，可以放心。

2. 发明申请

US20060032149A1 Polishing slurry, method of producing same, and method of polishing substrate 审中-公开
标题翻译：抛光浆料，其制造方法以及抛光底物的方法
公开(公告)号：US20060032149A1
公开(公告)日：2006-02-16
申请号：US11193094
申请日：2005-07-28
申请人： Dae Kim , Seok Hong , Jae Jeon , Un Paik , Jea Park , Yong Kim
发明人： Dae Kim , Seok Hong , Jae Jeon , Un Paik , Jea Park , Yong Kim
IPC分类号： C09K3/14 , B24D3/02 , C09C1/68
CPC分类号： B82Y30/00 , C01F17/0043 , C01P2004/52 , C01P2004/64 , C01P2006/12 , C01P2006/22 , C09G1/02 , C09K3/1463
摘要： Disclosed is a polishing slurry, particularly, a slurry for chemical mechanical polishing, which is used in a chemical mechanical polishing process for flattening a semiconductor laminate. More particularly, the present invention provides a method of producing a slurry which has high removal selectivity to a nitride layer used as a barrier film in a shallow trench isolation CMP process needed to fabricate ultra highly integrated semiconductors of 256 mega D-RAM or more (Design rule of 0.13 μm or less) and which decreases the occurrence of scratches on a flattened surface, and a method of polishing a substrate using the same.
摘要翻译：公开了一种抛光浆料，特别是用于化学机械抛光的浆料，其用于化学机械抛光工艺以使半导体层压体变平。更具体地说，本发明提供一种制备浆料的方法，该方法对于在制造256兆D-RAM或更高的超高度集成半导体所需的浅沟槽隔离CMP工艺中，对用作阻挡膜的氮化物层具有高的去除选择性（设计规则为0.13μm以下），并且减少了在平坦化表面上的划痕的发生，以及使用其抛光衬底的方法。

3. 发明申请

US20050198912A1 Polishing slurry, method of producing same, and method of polishing substrate 有权
标题翻译：抛光浆料，其制造方法以及抛光底物的方法
公开(公告)号：US20050198912A1
公开(公告)日：2005-09-15
申请号：US11078538
申请日：2005-03-11
申请人： Dae Kim , Seok Hong , Jae Jeon , Ho Kim , Hyun Park , Un Paik , Jae Park , Yong Kim
发明人： Dae Kim , Seok Hong , Jae Jeon , Ho Kim , Hyun Park , Un Paik , Jae Park , Yong Kim
IPC分类号： B24D3/02 , C08J3/14 , H01L21/304
CPC分类号： B24B37/044 , C09G1/02 , C09K3/1409 , C09K3/1463 , H01L21/31053
摘要： Disclosed herein is a polishing slurry for chemical mechanical polishing. The polishing slurry comprises polishing particles, which have a particle size distribution including separated fine and large polishing particle peaks. The polishing slurry also comprises polishing particles, which have a median size of 50-150 nm. The present invention provides the slurry having an optimum polishing particle size, in which the polishing particle size is controlled and which is useful to produce semiconductors having fine design rules by changing the production conditions of the slurry. The present invention also provides the polishing slurry and a method of producing the same, in which a desirable CMP removal rate is assured and scratches are suppressed by controlling a polishing particle size distribution, and a method of polishing a substrate.
摘要翻译：本文公开了用于化学机械抛光的抛光浆料。抛光浆料包括抛光颗粒，其具有包括分离的精细和大的抛光颗粒峰的粒度分布。抛光浆料还包括中值粒径为50-150nm的抛光颗粒。本发明提供了具有最佳抛光粒度的浆料，其中抛光粒度被控制，并且通过改变浆料的生产条件，可用于制备具有精细设计规则的半导体。本发明还提供了研磨浆料及其制造方法，其中通过控制抛光粒度分布来确保理想的CMP去除速率和抑制刮痕，以及抛光基材的方法。

4. 发明申请

US20050252092A1 Slurry for CMP and method of polishing substrate using same 有权
标题翻译：用于CMP的浆料和使用其的抛光衬底的方法
公开(公告)号：US20050252092A1
公开(公告)日：2005-11-17
申请号：US11127441
申请日：2005-05-11
申请人： Dae Kim , Seok Hong , Jae Jeon , Ho Kim , Hyun Park , Un Paik , Jae Park , Yong Kim
发明人： Dae Kim , Seok Hong , Jae Jeon , Ho Kim , Hyun Park , Un Paik , Jae Park , Yong Kim
IPC分类号： B24B1/00 , B24C1/00 , B24D3/02 , C09G1/02 , C09K3/14 , H01L21/3105
CPC分类号： C09K3/1463 , C09G1/02 , H01L21/31053
摘要： Disclosed herein is a polishing slurry and a method of producing the same. The polishing slurry has high selectivity in terms of a polishing speed of an oxide layer to that of a nitride layer used in CMP of an STI process which is essential to produce ultra highly integrated semiconductors having a design rule of 256 mega D-RAM or more, for example, a design rule of 0.13 μm or less. A method and a device for pre-treating polishing particles, a dispersing device and a method of operating the dispersing device, a method of adding a chemical additive and an amount added, and a device for transferring samples are properly employed to produce a high performance nano ceria slurry essential to CMP for a process of producing ultra highly integrated semiconductors of 0.13 μm or less, particularly, the STI process.
摘要翻译：本文公开了抛光浆料及其制备方法。抛光浆料在氧化物层的研磨速度与STI工艺的CMP中使用的氮化物层的研磨速度方面具有高选择性，该制造方法对于制造具有256兆D-RAM以上的设计规则的超高度集成半导体是必不可少的，例如，0.13mum以下的设计规则。用于预处理抛光颗粒的方法和装置，分散装置和操作分散装置的方法，添加化学添加剂和添加量的方法以及用于转移样品的装置被适当地用于产生高性能纳米二氧化铈浆料对于生产0.13毫米或更小的超高度集成半导体的工艺，特别是STI工艺。

5. 发明申请

US20070279940A1 Optical Sheet and Backlight Assembly Having the Same 有权
标题翻译：光学片和背光组件具有相同的功能
公开(公告)号：US20070279940A1
公开(公告)日：2007-12-06
申请号：US11734611
申请日：2007-04-12
申请人： Cheul Kim , Sang Kim , Jong Huh , Dong Kim , Ju Lee , Min Kim , Hyun Shin , Yong Kim
发明人： Cheul Kim , Sang Kim , Jong Huh , Dong Kim , Ju Lee , Min Kim , Hyun Shin , Yong Kim
IPC分类号： F21V8/00 , G02B5/02
CPC分类号： G02B5/045
摘要： Provided are embodiments of an optical sheet and a backlight assembly having the optical sheet. The optical sheet can include a body, a plurality of protrusions, and a plurality of embossed portions. The body can form a substrate. One surface of the body can be provided in a planar shape, and the other surface of the body can include the plurality of protrusions, where the protrusions have a triangular shaped cross-section. Each of the protrusions can be configured with the plurality of embossed, which may be formed by a microlens pattern.
摘要翻译：提供了具有光学片的光学片和背光组件的实施例。光学片可以包括主体，多个突起和多个压花部分。身体可以形成底物。身体的一个表面可以设置成平面形状，并且主体的另一个表面可以包括多个突起，其中突起具有三角形的横截面。每个突起可以配置有多个压花，其可以由微透镜图案形成。

6. 发明申请

US20080026800A1 MOBILE COMMUNICATION TERMINAL AND METHOD FOR CREATING MENU SCREEN FOR THE SAME 审中-公开
标题翻译：移动通信终端和用于为其创建菜单屏幕的方法
公开(公告)号：US20080026800A1
公开(公告)日：2008-01-31
申请号：US11828175
申请日：2007-07-25
申请人： Sang Daek LEE , Bo Kim , Yong Kim , Sun Shin , Dong Kim , Ji Han , Byoung Kim
发明人： Sang Daek LEE , Bo Kim , Yong Kim , Sun Shin , Dong Kim , Ji Han , Byoung Kim
IPC分类号： H04B1/38
CPC分类号： H04M1/72544 , G06F3/04817 , G06F3/0482 , H04M1/72583
摘要： A mobile communication terminal including a display unit configured to display information, and a controller configured to allocate at least first and second specified display regions on the display unit and to display at least first and second menu items in a combined form with respective multimedia images on the at least first and second specified display regions, respectively.
摘要翻译：一种移动通信终端，包括被配置为显示信息的显示单元，以及控制器，被配置为在所述显示单元上分配至少第一和第二指定显示区域，并且以组合形式显示与各个多媒体图像有关的至少第一和第二菜单项至少第一和第二指定显示区域。

7. 发明申请

US20060225644A1 Vertical group III-nitride light emitting device and method for manufacturing the same 审中-公开
标题翻译：垂直III族氮化物发光器件及其制造方法
公开(公告)号：US20060225644A1
公开(公告)日：2006-10-12
申请号：US11398713
申请日：2006-04-06
申请人： Jae Lee , Yong Kim , Hyung Back , Moon Kong , Dong Kim
发明人： Jae Lee , Yong Kim , Hyung Back , Moon Kong , Dong Kim
IPC分类号： C30B23/00 , C30B25/00 , C30B28/12 , C30B28/14
CPC分类号： H01L33/22 , H01L33/0079 , H01L33/32
摘要： A vertical group III-nitride light emitting device and a manufacturing method thereof are provided. The light emitting device comprises: a conductive substrate; a p-type clad layer stacked on the conductive substrate; an active layer stacked on the p-type clad layer; an n-doped AlxGayIn1-x-yN layer stacked on the active layer; an undoped GaN layer stacked on the n-doped layer; and an n-electrode formed on the undoped GaN layer. The undoped GaN layer has a rough pattern formed on a top surface thereof.
摘要翻译：提供了垂直III族氮化物发光器件及其制造方法。发光器件包括：导电衬底; 层叠在导电性基板上的p型覆层; 堆叠在p型覆盖层上的有源层; 层叠在有源层上的n掺杂的Al x Ga y In 1 N x N y N n层; 堆叠在n掺杂层上的未掺杂的GaN层; 以及形成在未掺杂的GaN层上的n电极。未掺杂的GaN层在其顶表面上形成粗糙图案。

8. 发明申请

US20060202227A1 Vertical type nitride semiconductor light emitting diode 有权
标题翻译：垂直型氮化物半导体发光二极管
公开(公告)号：US20060202227A1
公开(公告)日：2006-09-14
申请号：US11153500
申请日：2005-06-16
申请人： Dong Kim , Yong Kim , Hyun Kim
发明人： Dong Kim , Yong Kim , Hyun Kim
IPC分类号： H01L33/00
CPC分类号： H01L33/38 , H01L33/32 , H01L33/42
摘要： Disclosed herein is a vertical type nitride semiconductor light emitting diode. The nitride semiconductor light emitting diode comprises an n-type nitride semiconductor layer, an active layer formed under the n-type nitride semiconductor layer, a p-type nitride semiconductor layer formed under the active layer, and an n-side electrode which comprises a bonding pad formed adjacent to an edge of an upper surface of the n-type nitride semiconductor layer and at least one extended electrode formed in a band from the bonding pad. The bonding pad of the n-side electrode is formed adjacent to the edge of the upper surface of the n-type nitride semiconductor layer acting as a light emitting surface, thereby preventing a wire from shielding light emitted from the active layer. The extended electrode can be formed in various shapes, and prevents concentration of current density, thereby ensuring effective distribution of the current density.
摘要翻译：本文公开了垂直型氮化物半导体发光二极管。氮化物半导体发光二极管包括n型氮化物半导体层，在n型氮化物半导体层下面形成的有源层，在有源层下面形成的p型氮化物半导体层和n侧电极，形成在与n型氮化物半导体层的上表面的边缘相邻的接合焊盘和从接合焊盘形成为带状的至少一个延伸电极。 n侧电极的接合焊盘与作为发光面的n型氮化物半导体层的上表面的边缘相邻地形成，从而防止电线屏蔽从有源层发射的光。扩展电极可以形成为各种形状，并且防止电流密度的集中，从而确保电流密度的有效分布。

9. 发明申请

US20060068293A1 Lithium secondary batteries with charge-cutoff voltages over 4.35 审中-公开
标题翻译：充电截止电压超过4.35的锂二次电池
公开(公告)号：US20060068293A1
公开(公告)日：2006-03-30
申请号：US11139921
申请日：2005-05-27
申请人： Dong Kim , Jong Yoon , Yong Kim , Benjamin Cho , Jun Jeong , Dae Jeong , Joon Bae
发明人： Dong Kim , Jong Yoon , Yong Kim , Benjamin Cho , Jun Jeong , Dae Jeong , Joon Bae
IPC分类号： H01M4/48 , H01M10/40
CPC分类号： H01M10/42 , H01M4/131 , H01M4/133 , H01M4/485 , H01M4/525 , H01M10/052 , H01M10/0525 , H01M10/0567 , H01M10/0569 , H01M2004/021 , H01M2010/4292
摘要： Disclosed is a lithium secondary battery comprising a cathode (C), an anode (A), a separator and an electrolyte, wherein the battery has a weight ratio (A/C) of anode active material (A) to cathode active material (C) per unit area of each electrode of between 0.44 and 0.70, and shows a charge cut-off voltage of between 4.35V and 4.6V. The high-voltage lithium secondary battery satisfies capacity balance by controlling the weight ratio (A/C) of anode active material (A) to cathode active material (C) per unit area of each electrode. Therefore, it is possible to significantly increase the available capacity and average discharge voltage of a battery using a lithium/cobalt-based cathode active material, which shows an available capacity of about 50% in a conventional 4.2V-battery. Additionally, it is possible to significantly improve battery safety under overcharge conditions, and thus to provide a high-voltage and high-capacity lithium secondary battery having excellent safety and long service life.
摘要翻译：公开了一种锂二次电池，其包含阴极（C），阳极（A），隔膜和电解质，其中电池具有负极活性物质（A）与正极活性物质（C）的重量比（A / C））每个电极的每单位面积在0.44和0.70之间，并且显示在4.35V和4.6V之间的电荷截止电压。高压锂二次电池通过控制每个电极的每单位面积的负极活性物质（A）与阴极活性物质（C）的重量比（A / C）来满足容量平衡。因此，可以使用基于锂/钴的阴极活性材料显着提高电池的可用容量和平均放电电压，其在常规4.2V电池中显示出约50％的可用容量。此外，可以在过充电条件下显着提高电池安全性，从而提供具有优异的安全性和长使用寿命的高电压和高容量的锂二次电池。

10. 发明申请

US20070131971A1 Hetero junction bipolar transistor and method of manufacturing the same 失效
标题翻译：异质结双极晶体管及其制造方法
公开(公告)号：US20070131971A1
公开(公告)日：2007-06-14
申请号：US11634614
申请日：2006-12-06
申请人： Yong Kim , Eun Nam , Ho Kim , Sang Lee , Dong Jun , Hong Lee , Seon Hong , Dong Kim , Jong Lim , Myoung Oh
发明人： Yong Kim , Eun Nam , Ho Kim , Sang Lee , Dong Jun , Hong Lee , Seon Hong , Dong Kim , Jong Lim , Myoung Oh
IPC分类号： H01L31/00
CPC分类号： H01L29/7371 , H01L29/0817 , H01L29/41708 , H01L29/66318
摘要： Provided are a hetero-junction bipolar transistor (HBT) that can increase data processing speed and a method of manufacturing the hetero-junction bipolar transistor. The HBT includes a semi-insulating compound substrate, a sub-collector layer formed on the semi-insulating compound substrate, a pair of collector electrodes disposed at a predetermined distance apart from each other on a predetermined portion of the sub-collector layer, a collector layer and a base layer disposed between the collector electrodes, a pair of base electrodes disposed at a predetermined distance apart from each other on a predetermined portion of the base layer, an emitter layer stack disposed between the base electrodes, and an emitter electrode that is formed on the emitter layer stack, and includes a portion having a line width wider than the line width of the emitter layer stack, wherein both sidewalls of the emitter electrode are respectively aligned with inner walls of the pair of base electrodes, and sidewalls of the collector layer and the base layer are located between outer sidewalls of the pair of base electrodes of the pair of base electrodes.
摘要翻译：提供了可以提高数据处理速度的异质结双极晶体管（HBT）和制造异质结双极晶体管的方法。 HBT包括半绝缘复合基板，形成在半绝缘复合基板上的副集电极层，在副集电极层的预定部分上彼此隔开预定距离设置的一对集电极，集电极层和设置在集电极之间的基极层，在基极层的预定部分上彼此隔开预定距离设置的一对基底电极，设置在基极之间的发射极层叠层和发射极电极，形成在发射极层堆叠上，并且包括具有比发射极层堆叠的线宽宽的线宽的部分，其中发射极电极的两个侧壁分别与一对基底电极的内壁对齐，并且侧壁集电极层和基极层位于该对基极的一对基极的外侧壁之间。

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