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1. 发明申请

US20060205230A1 Surface preparation prior to deposition 有权
公开(公告)号：US20060205230A1
公开(公告)日：2006-09-14
申请号：US11431037
申请日：2006-05-09
申请人： Christophe Pomarede , Jeff Roberts , Eric Shero
发明人： Christophe Pomarede , Jeff Roberts , Eric Shero
IPC分类号： H01L21/31 , H01L21/324
CPC分类号： H01L21/28185 , C23C16/0218 , C23C16/0245 , C23C16/22 , C23C16/403 , C23C16/405 , C23C16/45525 , C23C16/56 , H01L21/02178 , H01L21/02189 , H01L21/0228 , H01L21/02315 , H01L21/28017 , H01L21/28035 , H01L21/2807 , H01L21/28194 , H01L21/28202 , H01L21/306 , H01L21/3105 , H01L21/3141 , H01L21/31604 , H01L21/3162 , H01L21/32055 , H01L29/513 , H01L29/517 , H01L29/518
摘要： Methods are provided herein for treating substrate surfaces in preparation for subsequent nucleation-sensitive depositions (e.g., polysilicon or poly-SiGe) and adsorption-driven deposition (e.g. atomic layer deposition or ALD). Prior to depositing, the surface is treated with non-depositing plasma products. The treated surface more readily nucleates polysilicon and poly-SiGe (such as for a gate electrode), or more readily adsorbs ALD reactants (such as for a gate dielectric). The surface treatment provides surface moieties more readily susceptible to a subsequent deposition reaction, or more readily susceptible to further surface treatment prior to deposition. By changing the surface termination of the substrate with a low temperature radical treatment, subsequent deposition is advantageously facilitated without depositing a layer of any appreciable thickness and without significantly affecting the bulk properties of the underlying material. Preferably less than 10 Å of the bulk material incorporates the excited species, which can include fluorine, chlorine and particularly nitrogen excited species.

2. 发明授权

US06806145B2 Low temperature method of forming a gate stack with a high k layer deposited over an interfacial oxide layer 有权
标题翻译：形成具有沉积在界面介电层上的高k层的栅叠层的低温方法
公开(公告)号：US06806145B2
公开(公告)日：2004-10-19
申请号：US10227475
申请日：2002-08-22
申请人： Suvi Haukka , Eric Shero , Christophe Pomarede , Jan Willem Hub Maes , Marko Tuominen
发明人： Suvi Haukka , Eric Shero , Christophe Pomarede , Jan Willem Hub Maes , Marko Tuominen
IPC分类号： H01L21473
CPC分类号： H01L21/28185 , H01L21/02052 , H01L21/02178 , H01L21/02189 , H01L21/0228 , H01L21/02304 , H01L21/28167 , H01L21/28194 , H01L21/28202 , H01L21/306 , H01L21/3144 , H01L21/31604 , H01L21/3162 , H01L21/31662 , H01L29/513 , H01L29/517 , H01L29/518
摘要： The present invention relates to methods for forming dielectric layers on a substrate, such as in an integrated circuit. In one aspect of the invention, a thin interfacial layer is formed. The interfacial layer is preferably an oxide layer and a high-k material is preferably deposited on the interfacial layer by a process that does not cause substantial further growth of the interfacial layer. For example, water vapor may be used as an oxidant source during high-k deposition at less than or equal to about 300° C.
摘要翻译：本发明涉及在诸如集成电路中的衬底上形成电介质层的方法。在本发明的一个方面，形成薄的界面层。界面层优选是氧化物层，并且优选通过不会导致界面层的实质性进一步生长的方法在界面层上沉积高k材料。例如，水蒸气可以在高k沉积期间以小于或等于约300℃的温度用作氧化剂源。

3. 发明申请

US20050233529A1 Integration of high k gate dielectric 有权
标题翻译：高k栅介质的集成
公开(公告)号：US20050233529A1
公开(公告)日：2005-10-20
申请号：US11148721
申请日：2005-06-09
申请人： Christophe Pomarede , Michael Givens , Eric Shero , Michael Todd
发明人： Christophe Pomarede , Michael Givens , Eric Shero , Michael Todd
IPC分类号： C23C16/24 , C23C16/02 , C30B25/02 , H01L21/20 , H01L21/205 , H01L21/28 , H01L21/285 , H01L21/3205 , H01L21/336 , H01L21/4763 , H01L21/8242 , H01L27/108 , H01L29/423 , H01L29/49 , H01L29/51 , H01L29/78 , H01L29/786 , H01L31/18 , H01L31/20
CPC分类号： H01L21/28194 , B82Y10/00 , C23C16/0272 , C30B25/02 , C30B29/06 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/02532 , H01L21/0262 , H01L21/02661 , H01L21/28035 , H01L21/28044 , H01L21/28525 , H01L21/28556 , H01L29/4925 , H01L29/517 , H01L31/1804 , H01L31/182 , H01L31/202 , Y02E10/546 , Y02E10/547 , Y02P70/521
摘要： Methods are provided herein for forming electrode layers over high dielectric constant (“high k”) materials. In the illustrated embodiments, a high k gate dielectric, such as zirconium oxide, is protected from reduction during a subsequent deposition of silicon-containing gate electrode. In particular, a seed deposition phase includes conditions designed for minimizing hydrogen reduction of the gate dielectric, including low hydrogen content, low temperatures and/or low partial pressures of the silicon source gas. Conditions are preferably changed for higher deposition rates and deposition continues in a bulk phase. Desirably, though, hydrogen diffusion is still minimized by controlling the above-noted parameters. In one embodiment, high k dielectric reduction is minimized through omission of a hydrogen carrier gas. In another embodiment, higher order silanes, aid in reducing hydrogen content for a given deposition rate.
摘要翻译：本文提供了用于在高介电常数（“高k”）材料上形成电极层的方法。在所示的实施例中，在接下来的含硅栅电极沉积期间，保护高k栅极电介质，例如氧化锆，以防止还原。特别地，种子沉积阶段包括设计用于最小化栅极电介质的氢还原的条件，包括硅源气体的低氢含量，低温和/或低分压。优选地，为了更高的沉积速率改变条件，并且在体相中继续沉积。然而，尽管通过控制上述参数仍然使氢扩散最小化。在一个实施例中，通过省略氢载体气体来最小化高k电介质的减小。在另一个实施方案中，高级硅烷有助于降低给定沉积速率的氢含量。

4. 发明申请

US20050212119A1 Incorporation of nitrogen into high k dielectric film 有权
标题翻译：将氮掺入高k电介质膜
公开(公告)号：US20050212119A1
公开(公告)日：2005-09-29
申请号：US11132096
申请日：2005-05-17
申请人： Eric Shero , Christophe Pomarede
发明人： Eric Shero , Christophe Pomarede
IPC分类号： C23C16/40 , C23C16/30 , C23C16/452 , C23C16/455 , H01L21/28 , H01L21/314 , H01L21/316 , H01L21/318 , H01L29/51 , H01L29/10 , H01L21/336 , H01L23/06 , H01L23/15
CPC分类号： H01L21/28185 , C23C16/308 , C23C16/452 , C23C16/455 , H01L21/28017 , H01L21/28194 , H01L21/28202 , H01L21/3144 , H01L21/31604 , H01L21/31683 , H01L21/318 , H01L29/517 , H01L29/518 , H01L2924/0002 , Y10S438/932 , Y10T428/12021 , Y10T428/12458 , Y10T428/31678 , H01L2924/00
摘要： A high k dielectric film and methods for forming the same are disclosed. The high k material includes two peaks of impurity concentration, particularly nitrogen, such as at a lower interface and upper interface, making the layer particularly suitable for transistor gate dielectric applications. The methods of formation include low temperature processes, particularly CVD using a remote plasma generator and atomic layer deposition using selective incorporation of nitrogen in the cyclic process. Advantageously, nitrogen levels are tailored during the deposition process and temperatures are low enough to avoid interdiffusion and allow maintenance of the desired impurity profile.
摘要翻译：公开了一种高k电介质膜及其形成方法。高k材料包括杂质浓度，特别是氮的两个峰，例如在较低界面和上界面处，使得该层特别适用于晶体管栅极介电应用。形成方法包括低温工艺，特别是使用远程等离子体发生器的CVD和使用在循环过程中选择性掺入氮的原子层沉积。有利地，在沉积过程中调整氮含量，并且温度足够低以避免相互扩散并允许维持期望的杂质分布。

5. 发明授权

US09238865B2 Multiple vapor sources for vapor deposition 有权
标题翻译：用于气相沉积的多个蒸气源
公开(公告)号：US09238865B2
公开(公告)日：2016-01-19
申请号：US13367010
申请日：2012-02-06
申请人： Christophe Pomarede , Eric Shero , Mohith Verghese , Jan Willem Maes , Chang-Gong Wang
发明人： Christophe Pomarede , Eric Shero , Mohith Verghese , Jan Willem Maes , Chang-Gong Wang
IPC分类号： C23C14/24 , C23C16/04 , C23C16/448 , C23C16/455 , C23C16/52 , H01J37/32 , H01L21/02 , H01L21/314 , H01L21/316 , H01L21/28
CPC分类号： C23C16/45525 , C23C14/246 , C23C16/045 , C23C16/448 , C23C16/4482 , C23C16/4485 , C23C16/4486 , C23C16/45527 , C23C16/45561 , C23C16/52 , F17C2205/0142 , F17C2205/0146 , F17C2270/0518 , H01J37/32449 , H01L21/02148 , H01L21/02172 , H01L21/02181 , H01L21/0228 , H01L21/28194 , H01L21/3142 , H01L21/31645 , H01L27/10861
摘要： A vapor deposition method and apparatus including at least two vessels containing a same first source chemical. A controller is programmed to simultaneously pulse to the reaction space doses or pulses of a gas from the vessels, each of the doses having a substantially consistent concentration of the first source chemical. The apparatus may also include at least two vessels containing a same second source chemical. The controller can be programmed to simultaneously pulse to the reaction space doses or pulses of a gas from the vessels containing the second source chemical, each of the doses having a substantially consistent concentration of the second source chemical. The second source chemical can be pulsed to the reaction space after the reaction space is purged of an excess of the first source chemical.
摘要翻译：一种气相沉积方法和装置，包括至少两个含有相同的第一源化学物质的容器。控制器被编程为同时脉冲到来自容器的气体的反应空间剂量或脉冲，每个剂量具有基本上一致的第一源化学品浓度。该装置还可以包括含有相同的第二源化学品的至少两个容器。控制器可被编程为同时脉冲到来自含有第二源化学物质的容器的反应空间剂量或脉冲，每个剂量具有基本一致的第二源化学品浓度。在反应空间被清除过量的第一源化学品之后，第二源化学品可以被脉冲到反应空间。

6. 发明申请

US20130203267A1 MULTIPLE VAPOR SOURCES FOR VAPOR DEPOSITION 有权
标题翻译：用于蒸气沉积的多种蒸汽源
公开(公告)号：US20130203267A1
公开(公告)日：2013-08-08
申请号：US13367010
申请日：2012-02-06
申请人： Christophe Pomarede , Eric Shero , Mohith Verghese , Jan Willem Maes , Chang-Gong Wang
发明人： Christophe Pomarede , Eric Shero , Mohith Verghese , Jan Willem Maes , Chang-Gong Wang
IPC分类号： H01L21/314 , C23C16/52
CPC分类号： C23C16/45525 , C23C14/246 , C23C16/045 , C23C16/448 , C23C16/4482 , C23C16/4485 , C23C16/4486 , C23C16/45527 , C23C16/45561 , C23C16/52 , F17C2205/0142 , F17C2205/0146 , F17C2270/0518 , H01J37/32449 , H01L21/02148 , H01L21/02172 , H01L21/02181 , H01L21/0228 , H01L21/28194 , H01L21/3142 , H01L21/31645 , H01L27/10861
摘要： A vapor deposition method and apparatus including at least two vessels containing a same first source chemical. A controller is programmed to simultaneously pulse to the reaction space doses or pulses of a gas from the vessels, each of the doses having a substantially consistent concentration of the first source chemical. The apparatus may also include at least two vessels containing a same second source chemical. The controller can be programmed to simultaneously pulse to the reaction space doses or pulses of a gas from the vessels containing the second source chemical, each of the doses having a substantially consistent concentration of the second source chemical. The second source chemical can be pulsed to the reaction space after the reaction space is purged of an excess of the first source chemical.
摘要翻译：一种气相沉积方法和装置，包括至少两个含有相同的第一源化学物质的容器。控制器被编程为同时脉冲到来自容器的气体的反应空间剂量或脉冲，每个剂量具有基本上一致的第一源化学品浓度。该装置还可以包括含有相同的第二源化学品的至少两个容器。控制器可被编程为同时脉冲到来自含有第二源化学物质的容器的反应空间剂量或脉冲，每个剂量具有基本一致的第二源化学品浓度。在反应空间被清除过量的第一源化学品之后，第二源化学品可以被脉冲到反应空间。

7. 发明授权

US09139906B2 Doping with ALD technology 有权
标题翻译：用ALD技术掺杂
公开(公告)号：US09139906B2
公开(公告)日：2015-09-22
申请号：US12038764
申请日：2008-02-27
申请人： Chang-Gong Wang , Eric Shero
发明人： Chang-Gong Wang , Eric Shero
IPC分类号： B05D5/12 , C23C16/455 , H01L21/28 , H01L21/3115 , H01L21/314 , H01L29/49 , H01L29/51 , H01L21/316
CPC分类号： C23C16/45534 , H01L21/28088 , H01L21/28194 , H01L21/3115 , H01L21/3141 , H01L21/3143 , H01L21/3162 , H01L21/31641 , H01L21/31645 , H01L29/4966 , H01L29/518
摘要： Methods for doping a substrate surface or the interface between two thin films by atomic layer deposition process (ALD) are provided. By blocking some of the available binding sites for a dopant precursor with a blocking reactant, the concentration and uniformity of dopant deposited can be controlled. The blocking reactant may be introduced prior to introduction of the dopant precursor in the ALD process, or the blocking reactant and the dopant precursor can be introduced simultaneously.
摘要翻译：提供了通过原子层沉积工艺（ALD）掺杂衬底表面或两个薄膜之间的界面的方法。通过用封闭反应物阻挡掺杂剂前体的一些可用的结合位点，可以控制沉积的掺杂剂的浓度和均匀性。可以在ALD工艺中引入掺杂剂前体之前引入封闭反应物，或者可以同时引入封闭反应物和掺杂剂前体。

8. 发明授权

US08563444B2 ALD of metal silicate films 有权
标题翻译：金属硅酸盐膜的ALD
公开(公告)号：US08563444B2
公开(公告)日：2013-10-22
申请号：US13175204
申请日：2011-07-01
申请人： Chang-Gong Wang , Eric Shero , Glen Wilk
发明人： Chang-Gong Wang , Eric Shero , Glen Wilk
IPC分类号： H01L21/31
CPC分类号： C23C16/405 , C23C16/401 , C23C16/45531
摘要： Methods for forming metal silicate films are provided. The methods comprise contacting a substrate with alternating and sequential vapor phase pulses of a silicon source chemical, metal source chemical, and an oxidizing agent, wherein the metal source chemical is the next reactant provided after the silicon source chemical. Methods according to some embodiments can be used to form silicon-rich hafnium silicate and zirconium silicate films with substantially uniform film coverages on substrate surface.
摘要翻译：提供了形成金属硅酸盐膜的方法。所述方法包括使基板与硅源化学品，金属源化学品和氧化剂的交替和顺序的气相脉冲接触，其中所述金属源化学品是在硅源化学品之后提供的下一反应物。根据一些实施方案的方法可以用于形成富含硅的硅酸铪硅酸盐和硅酸锆膜，其在基材表面上具有基本均匀的膜覆盖。

9. 发明申请

US20120266821A1 REACTION SYSTEM FOR GROWING A THIN FILM 有权
标题翻译：用于生成薄膜的反应体系
公开(公告)号：US20120266821A1
公开(公告)日：2012-10-25
申请号：US13529223
申请日：2012-06-21
申请人： Mohith Verghese , Kyle Fondurulia , Carl White , Eric Shero , Darko Babic , Herbert Terhorst , Marko Peussa , Min Yan
发明人： Mohith Verghese , Kyle Fondurulia , Carl White , Eric Shero , Darko Babic , Herbert Terhorst , Marko Peussa , Min Yan
IPC分类号： C23C16/458
CPC分类号： H01L21/68785 , C23C16/4408 , C23C16/455 , C23C16/45517 , C23C16/45525 , C23C16/45544 , C23C16/45561 , C23C16/45563 , C23C16/45582 , C23C16/45587 , C23C16/45591 , C23C16/458 , C23C16/4582 , C23C16/4583 , C23C16/4586 , C30B35/00 , H01L21/67236 , H01L21/68714 , H01L21/68742
摘要： An atomic deposition (ALD) thin film deposition apparatus includes a deposition chamber configured to deposit a thin film on a wafer mounted within a space defined therein. The deposition chamber comprises a gas inlet that is in communication with the space. A gas system is configured to deliver gas to the gas inlet of the deposition chamber. At least a portion of the gas system is positioned above the deposition chamber. The gas system includes a mixer configured to mix a plurality of gas streams. A transfer member is in fluid communication with the mixer and the gas inlet. The transfer member comprising a pair of horizontally divergent walls configured to spread the gas in a horizontal direction before entering the gas inlet.
摘要翻译：原子沉积（ALD）薄膜沉积设备包括沉积室，其被配置为将薄膜沉积在安装在其中限定的空间内的晶片上。沉积室包括与空间连通的气体入口。气体系统被配置为将气体输送到沉积室的气体入口。气体系统的至少一部分位于沉积室上方。气体系统包括配置成混合多个气流的混合器。转移构件与混合器和气体入口流体连通。传送构件包括一对水平扩散壁，其构造成在进入气体入口之前沿水平方向扩展气体。

10. 发明申请

US20080085226A1 PRECURSOR DELIVERY SYSTEM 有权
标题翻译：前身送货系统
公开(公告)号：US20080085226A1
公开(公告)日：2008-04-10
申请号：US11870374
申请日：2007-10-10
申请人： Kyle Fondurulia , Eric Shero , Mohith E. Verghese , Carl L. White
发明人： Kyle Fondurulia , Eric Shero , Mohith E. Verghese , Carl L. White
IPC分类号： B01J19/00 , F28D21/00
CPC分类号： C23C16/4481 , C23C16/4401 , C23C16/4402
摘要： A precursor source vessel comprises a vessel body, a passage within the vessel body, and a valve attached to a surface of the body. An internal chamber is adapted to contain a chemical reactant, and the passage extends from outside the body to the chamber. The valve regulates flow through the passage. The vessel has inlet and outlet valves, and optionally a vent valve for venting internal gas. An external gas panel can include at least one valve fluidly interposed between the outlet valve and a substrate reaction chamber. Gas panel valves can each be positioned along a plane that is generally parallel to, and no more than about 10.0 cm from, a flat surface of the vessel. Filters in a vessel lid or wall filter gas flow through the vessel's valves. A quick-connection assembly allows fast and easy connection of the vessel to a gas panel.
摘要翻译：前体源容器包括容器主体，容器主体内的通道和附接到主体表面的阀。内部腔室适于容纳化学反应物，并且通道从身体外部延伸到腔室。阀调节通过通道的流量。容器具有入口和出口阀，并且可选地用于排放内部气体的排气阀。外部气体面板可以包括流体地介于出口阀和基板反应室之间的至少一个阀。气体面板阀可以分别沿着与容器的平坦表面大致平行且不超过约10.0cm的平面定位。容器盖中的过滤器或壁过滤气体流过容器的阀门。快速连接组件允许快速和容易地将容器连接到气体面板。

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