专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09627501B2 Graded dielectric structures 有权
公开(公告)号：US09627501B2
公开(公告)日：2017-04-18
申请号：US14607733
申请日：2015-01-28
申请人： Micron Technology, Inc.
发明人： F. Daniel Gealy , Vishwanath Bhat , Cancheepuram V. Srividya , M. Noel Rocklein
IPC分类号： H01L29/51 , H01L49/02 , H01L29/78 , C23C16/455 , H01L21/28 , H01L21/314 , H01L21/316
CPC分类号： H01L21/022 , C23C16/45529 , H01L21/02148 , H01L21/02194 , H01L21/0228 , H01L21/28194 , H01L21/3141 , H01L21/3142 , H01L21/31641 , H01L21/31645 , H01L28/40 , H01L28/56 , H01L29/517 , H01L29/78
摘要： Graded dielectric layers and methods of fabricating such dielectric layers provide dielectrics in a variety of electronic structures for use in a wide range of electronic devices and systems. In an embodiment, a dielectric layer is graded with respect to a doping profile across the dielectric layer. In an embodiment, a dielectric layer is graded with respect to a crystalline structure profile across the dielectric layer. In an embodiment, a dielectric layer is formed by atomic layer deposition incorporating sequencing techniques to generate a doped dielectric material.

2. 发明授权

US09184061B2 Systems and methods for forming zirconium and/or hafnium-containing layers 有权
标题翻译：用于形成锆和/或含铪层的系统和方法
公开(公告)号：US09184061B2
公开(公告)日：2015-11-10
申请号：US11493967
申请日：2006-07-27
申请人： Brian A. Vaartstra
发明人： Brian A. Vaartstra
IPC分类号： H01L29/78 , H01L21/316 , C23C16/40 , C23C16/455 , C23C16/56 , H01L21/02 , H01L21/314
CPC分类号： H01L21/31645 , C23C16/401 , C23C16/45531 , C23C16/45553 , C23C16/56 , H01L21/02148 , H01L21/02159 , H01L21/02214 , H01L21/0228 , H01L21/02337 , H01L21/3142 , H01L21/31612 , H01L21/31641
摘要： A method of forming (and apparatus for forming) a zirconium and/or hafnium-containing layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more silicon precursor compounds of the formula Si(OR)4 with one or more zirconium and/or hafnium precursor compounds of the formula M(NR′R″)4, wherein R, R′, and R″ are each independently an organic group and M is zirconium or hafnium.
摘要翻译：使用气相沉积工艺和一种或多种式Si（OR）的硅前体化合物在基材，特别是半导体衬底或衬底组件上形成（和用于形成）锆和/或铪的层的方法， 4与一种或多种式M（NR'R“）4的锆和/或铪前体化合物，其中R，R'和R”各自独立地为有机基团，M为锆或铪。

3. 发明申请

US20150318343A1 INSULATOR, CAPACITOR WITH THE SAME AND FABRICATION METHOD THEREOF, AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：绝缘子，具有该绝缘体的电容器及其制造方法，以及制造半导体器件的方法
公开(公告)号：US20150318343A1
公开(公告)日：2015-11-05
申请号：US14752016
申请日：2015-06-26
申请人： Magnachip Semiconductor, Ltd.
发明人： Kwan-Soo KIM , Soon-Wook KIM
IPC分类号： H01L49/02 , H01L21/768 , H01L21/3213 , H01L23/532 , H01L23/528 , H01L21/311 , H01L21/285 , H01L21/02 , H01L23/522
CPC分类号： H01L21/02178 , B32B37/02 , B32B2311/00 , B32B2311/24 , B32B2457/00 , H01G4/33 , H01L21/02181 , H01L21/022 , H01L21/02274 , H01L21/0228 , H01L21/28556 , H01L21/31111 , H01L21/3142 , H01L21/3213 , H01L21/768 , H01L21/7684 , H01L23/5223 , H01L23/5226 , H01L23/528 , H01L23/53214 , H01L28/40 , H01L2924/0002 , Y10T156/10 , Y10T428/2495 , Y10T428/26 , H01L2924/00
摘要： Disclosed is a multilayer insulator, a metal-insulator-metal (MIM) capacitor with the same, and a fabricating method thereof. The capacitor includes: a first electrode; an insulator disposed on the first electrode, the insulator including: a laminate structure in which an aluminum oxide (Al2O3) layer and a hafnium oxide (HfO2) layer are laminated alternately in an iterative manner and a bottom layer and a top layer are formed of the same material; and a second electrode disposed on the insulator.
摘要翻译：公开了一种多层绝缘体，具有该绝缘体的金属 - 绝缘体 - 金属（MIM）电容器及其制造方法。电容器包括：第一电极; 设置在所述第一电极上的绝缘体，所述绝缘体包括：层叠结构，其中氧化铝（Al 2 O 3）层和氧化铪层（HfO 2）层以迭代方式交替层叠，并且底层和顶层由相同的材料; 以及设置在绝缘体上的第二电极。

4. 发明申请

US20150137254A1 GRADED DIELECTRIC STRUCTURES 有权
标题翻译：分级电介质结构
公开(公告)号：US20150137254A1
公开(公告)日：2015-05-21
申请号：US14607733
申请日：2015-01-28
申请人： Micron Technology, Inc.
发明人： F. Daniel Gealy , Vishwanath Bhat , Cancheepuram V. Srividya , M. Noel Rocklein
IPC分类号： H01L29/51 , H01L49/02
CPC分类号： H01L21/022 , C23C16/45529 , H01L21/02148 , H01L21/02194 , H01L21/0228 , H01L21/28194 , H01L21/3141 , H01L21/3142 , H01L21/31641 , H01L21/31645 , H01L28/40 , H01L28/56 , H01L29/517 , H01L29/78
摘要： Graded dielectric layers and methods of fabricating such dielectric layers provide dielectrics in a variety of electronic structures for use in a wide range of electronic devices and systems. In an embodiment, a dielectric layer is graded with respect to a doping profile across the dielectric layer. In an embodiment, a dielectric layer is graded with respect to a crystalline structure profile across the dielectric layer. In an embodiment, a dielectric layer is formed by atomic layer deposition incorporating sequencing techniques to generate a doped dielectric material.
摘要翻译：梯度介电层和制造这种电介质层的方法在各种电子结构中提供电介质以用于广泛的电子设备和系统。在一个实施例中，电介质层相对于跨介电层的掺杂分布而分级。在一个实施例中，电介质层相对于介电层上的晶体结构分布呈梯度分布。在一个实施例中，通过包含测序技术的原子层沉积形成电介质层以产生掺杂的电介质材料。

5. 发明授权

US08941165B2 Methods of fabricating integrated circuit capacitors having u-shaped lower capacitor electrodes 有权
标题翻译：制造具有u形下电容器电极的集成电路电容器的方法
公开(公告)号：US08941165B2
公开(公告)日：2015-01-27
申请号：US12779300
申请日：2010-05-13
申请人： Sung-Il Cho , Seung-Young Son , Chang-Jin Kang , Kyeong-Koo Chi , Ji-Chul Shin
发明人： Sung-Il Cho , Seung-Young Son , Chang-Jin Kang , Kyeong-Koo Chi , Ji-Chul Shin
IPC分类号： H01L27/108 , H01L49/02 , H01L21/3213 , H01L21/314 , H01L21/316
CPC分类号： H01L28/91 , H01L21/3142 , H01L21/31616 , H01L21/31645 , H01L21/32136 , H01L27/10855
摘要： Methods are provided for fabricating semiconductor devices having capacitors, which prevent lower electrodes of the capacitors from breaking or collapsing and which provide increased capacitance of the capacitors. For instance, a method includes forming a first insulating layer on a semiconductor substrate, forming a first hole in the first insulating layer, forming a contact plug in the first hole, forming a second insulating layer having a landing pad, wherein the landing pad contacts an upper surface of the contact plug, forming an etch stop layer on the landing pad and the second insulating layer, forming a third insulating layer on the etch stop layer; forming a third hole through the third insulating layer and etch stop layer to expose the landing pad, selectively etching the exposed landing pad, forming a lower electrode on the selectively etched landing pad, and then forming a capacitor by forming a dielectric layer and an upper electrode on the lower electrode.
摘要翻译：提供了用于制造具有电容器的半导体器件的方法，其阻止电容器的下部电极断开或塌缩并且提供电容器的增加的电容。例如，一种方法包括在半导体衬底上形成第一绝缘层，在第一绝缘层中形成第一孔，在第一孔中形成接触塞，形成具有着陆垫的第二绝缘层，其中，接触插塞的上表面，在着陆焊盘和第二绝缘层上形成蚀刻停止层，在蚀刻停止层上形成第三绝缘层; 通过第三绝缘层和蚀刻停止层形成第三孔以暴露着陆焊盘，选择性地蚀刻暴露的着陆焊盘，在选择性蚀刻的焊盘上形成下电极，然后通过形成电介质层和上层电极在下电极上。

6. 发明授权

US08796087B2 Method of fabricating a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08796087B2
公开(公告)日：2014-08-05
申请号：US13923470
申请日：2013-06-21
申请人： Samsung Electronics Co., Ltd.
发明人： Weon-Hong Kim , Min-Woo Song , Jung-Min Park
IPC分类号： H01L21/8242
CPC分类号： H01L28/60 , H01L21/02178 , H01L21/02189 , H01L21/022 , H01L21/02274 , H01L21/0228 , H01L21/3142 , H01L21/31604 , H01L21/31641 , H01L27/10852 , H01L28/40
摘要： A semiconductor device including a substrate; a bottom electrode on the substrate; a first dielectric layer on the bottom electrode, the first dielectric layer including a first metal oxide including at least one of Hf, Al, Zr, La, Ba, Sr, Ti, and Pb; a second dielectric layer on the first dielectric layer, the second dielectric layer including a second metal oxide including at least one of Hf, Al, Zr, La, Ba, Sr, Ti, and Pb, wherein the first metal oxide and the second metal oxide are different materials; a third dielectric layer on the second dielectric layer, the third dielectric layer including a metal carbon oxynitride; and an upper electrode on the third dielectric layer.
摘要翻译：一种包括衬底的半导体器件; 基底上的底电极; 所述第一电介质层包括包含Hf，Al，Zr，La，Ba，Sr，Ti和Pb中的至少一种的第一金属氧化物; 在所述第一电介质层上的第二电介质层，所述第二电介质层包括包含Hf，Al，Zr，La，Ba，Sr，Ti和Pb中的至少一种的第二金属氧化物，其中所述第一金属氧化物和所述第二金属氧化物是不同的材料; 第二电介质层上的第三电介质层，第三电介质层包括金属碳氮氧化物; 以及第三电介质层上的上电极。

7. 发明申请

US20140084355A1 APPARATUS HAVING A DIELECTRIC CONTAINING SCANDIUM AND GADOLINIUM 有权
标题翻译：具有电介质含有SCANIUM和GADOLINIUM的装置
公开(公告)号：US20140084355A1
公开(公告)日：2014-03-27
申请号：US14099107
申请日：2013-12-06
申请人： Micron Technology, Inc.
发明人： Kie Y. Ahn , Leonard Forbes
IPC分类号： H01L29/51 , H01L29/788
CPC分类号： H01L21/02192 , C23C16/40 , C23C16/45529 , C23C16/4554 , C23C16/45553 , H01L21/022 , H01L21/0228 , H01L21/28194 , H01L21/28273 , H01L21/28282 , H01L21/3142 , H01L21/31604 , H01L28/40 , H01L29/513 , H01L29/517 , H01L29/788 , H01L29/792
摘要： Apparatus having a dielectric containing scandium and gadolinium can provide a reliable structure with a high dielectric constant (high k). In an embodiment, a monolayer or partial monolayer sequence process, such as for example atomic layer deposition (ALD), can be used to form a dielectric containing gadolinium oxide and scandium oxide. In an embodiment, a dielectric structure can be formed by depositing gadolinium oxide by atomic layer deposition onto a substrate surface using precursor chemicals, followed by depositing scandium oxide onto the substrate using precursor chemicals, and repeating to form a thin laminate structure. A dielectric containing scandium and gadolinium may be used as gate insulator of a MOSFET, a capacitor dielectric in a DRAM, as tunnel gate insulators in flash memories, as a NROM dielectric, or as a dielectric in other electronic devices, because the high dielectric constant (high k) of the film provides the functionality of a much thinner silicon dioxide film.
摘要翻译：具有包含钪和钆的电介质的装置可以提供具有高介电常数（高k）的可靠结构。在一个实施方案中，可以使用单层或部分单层序列方法，例如原子层沉积（ALD）来形成含氧化钆和氧化钪的电介质。在一个实施例中，可以通过使用前体化学品将原子层沉积氧化钆沉积到衬底表面上，然后使用前体化学品将氧化钪沉积到衬底上并重复形成薄的层压结构来形成电介质结构。含有钪和钆的电介质可用作MOSFET的栅极绝缘体，DRAM中的电容器电介质，作为NROM电介质的闪存中的隧道栅极绝缘体，或其它电子器件中的电介质，因为高介电常数（高k）的膜提供了更薄的二氧化硅膜的功能。

8. 发明授权

US08603877B2 Methods of forming dielectric material-containing structures 有权
标题翻译：形成含介电材料结构的方法
公开(公告)号：US08603877B2
公开(公告)日：2013-12-10
申请号：US13461067
申请日：2012-05-01
申请人： Noel Rocklein , Chris Carlson , Dave Peterson , Cunyu Yang , Praveen Vaidyanathan , Vishwanath Bhat
发明人： Noel Rocklein , Chris Carlson , Dave Peterson , Cunyu Yang , Praveen Vaidyanathan , Vishwanath Bhat
IPC分类号： H01L21/316
CPC分类号： H01L21/28273 , H01L21/02175 , H01L21/02194 , H01L21/022 , H01L21/0228 , H01L21/3142 , H01L27/10852 , H01L28/40 , H01L28/91 , H01L29/51 , H01L29/513 , H01L29/78
摘要： Some embodiments include dielectric structures. The structures include first and second portions that are directly against one another. The first portion may contain a homogeneous mixture of a first phase and a second phase. The first phase may have a dielectric constant of greater than or equal to 25, and the second phase may have a dielectric constant of less than or equal to 20. The second portion may be entirely a single composition having a dielectric constant of greater than or equal to 25. Some embodiments include electrical components, such as capacitors and transistors, containing dielectric structures of the type described above. Some embodiments include methods of forming dielectric structures, and some embodiments include methods of forming electrical components.
摘要翻译：一些实施例包括电介质结构。这些结构包括彼此直接相对的第一和第二部分。第一部分可以包含第一相和第二相的均匀混合物。第一相可以具有大于或等于25的介电常数，并且第二相可以具有小于或等于20的介电常数。第二部分可以是完全是具有大于或等于20的介电常数的单一组成，等于25.一些实施例包括包含上述类型的电介质结构的电气部件，例如电容器和晶体管。一些实施方案包括形成电介质结构的方法，并且一些实施方案包括形成电组件的方法。

9. 发明申请

US20130122609A1 Zr-SUBSTITUTED BaTiO3 FILMS 有权
标题翻译： Zr取代的BaTiO3膜
公开(公告)号：US20130122609A1
公开(公告)日：2013-05-16
申请号：US13692407
申请日：2012-12-03
申请人： Micron Technology, Inc.
发明人： Kie Y. Ahn , Leonard Forbes
IPC分类号： H01L43/12
CPC分类号： H01L21/02197 , C23C16/409 , C23C16/45529 , C23C16/45531 , H01L21/022 , H01L21/0228 , H01L21/02337 , H01L21/28194 , H01L21/28291 , H01L21/3142 , H01L21/31691 , H01L29/513 , H01L29/516 , H01L29/517 , H01L29/78 , H01L43/12 , H04L12/4625 , H04L45/02
摘要： The use of a monolayer or partial monolayer sequencing process, such as atomic layer deposition (ALD), to form a zirconium substituted layer of barium titanium oxide, produces a reliable ferroelectric structure for use in a variety of electronic devices such as a dielectric in nonvolatile random access memories (NVRAM), tunable dielectrics for multi layer ceramic capacitors (MLCC), infrared sensors and electro-optic modulators. In various embodiments, structures can be formed by depositing alternating layers of barium titanate and barium zirconate by ALD on a substrate surface using precursor chemicals, and repeating to form a sequentially deposited interleaved structure of desired thickness and composition. The properties of the dielectric may be tuned by adjusting the percentage of zirconium to titanium to optimize properties such as a dielectric constant, Curie point, film polarization, ferroelectric property and a desired relaxor response.
摘要翻译：使用单层或部分单层测序方法（例如原子层沉积（ALD））来形成锆钛氧化物的锆取代层，产生可靠的铁电结构，用于各种电子器件，例如非易失性介质随机存取存储器（NVRAM），多层陶瓷电容器（MLCC）的可调电介质，红外传感器和电光调制器。在各种实施方案中，可以通过使用前体化学品在基材表面上沉积钛酸钡和锆酸钡的交替层而形成结构，并重复形成所需厚度和组成的顺序沉积的交错结构。电介质的性质可以通过调整锆与钛的百分比来调节，以优化诸如介电常数，居里点，薄膜极化，铁电性能和期望的弛豫反应的性能。

10. 发明授权

US08368175B2 Capacitor, semiconductor device having the same, and method of producing them 失效
标题翻译：具有相同的电容器，半导体器件及其制造方法
公开(公告)号：US08368175B2
公开(公告)日：2013-02-05
申请号：US12933946
申请日：2009-03-27
申请人： Takashi Nakagawa , Kaoru Mori , Nobuyuki Ikarashi , Makiko Oshida
发明人： Takashi Nakagawa , Kaoru Mori , Nobuyuki Ikarashi , Makiko Oshida
IPC分类号： H01L21/02 , H01L21/8242
CPC分类号： H01L21/3142 , H01L21/02178 , H01L21/02189 , H01L21/02194 , H01L21/022 , H01L21/02271 , H01L21/0228 , H01L21/316 , H01L27/10811 , H01L27/10852 , H01L28/40
摘要： Provided is a capacitor that realizes a capacitance insulation film having a large relative permittivity and has sufficient capacitance even if an occupied space is small with a reduced amount of leakage current. A capacitor includes: a capacitance insulation film; and an upper electrode and lower electrode each formed on both sides of the capacitance insulation film. The capacitance insulation film is a complex oxide whose main ingredients are Zr, Al and O with the composition ratio of Zr to Al being set at (1−x): x (0.01≦x≦0.15) and is composed of a dielectric substance having a crystal structure. The lower electrode is composed of a conductor whose surface contiguous to at least the dielectric film has an amorphous structure.
摘要翻译：提供一种电容器，其实现具有大的相对介电常数的电容绝缘膜，并且即使占用空间小，漏电流减少，也具有足够的电容。电容器包括：电容绝缘膜; 以及各自形成在电容绝缘膜的两侧的上电极和下电极。电容绝缘膜是主要成分为Zr，Al和O的复合氧化物，Zr与Al的组成比设定为（1-x）：x（0.01＆nlE; x＆nlE; 0.15），由介电材料具有晶体结构。下电极由与至少电介质膜相邻的表面具有非晶结构的导体构成。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式