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1. 发明授权

US06732523B2 Method for controlling a charge pressure in an internal combustion engine with an exhaust gas turbocharger 有权
标题翻译：利用排气涡轮增压器控制内燃机的充气压力的方法
公开(公告)号：US06732523B2
公开(公告)日：2004-05-11
申请号：US10334332
申请日：2002-12-31
申请人： Christian Birkner , Michael Nienhoff , Wolfgang Oestreicher , Wolfgang Stadler
发明人： Christian Birkner , Michael Nienhoff , Wolfgang Oestreicher , Wolfgang Stadler
IPC分类号： F02B3344
CPC分类号： F02D41/0007 , Y02T10/144
摘要： A method for precisely controlling the charge pressure in an internal combustion engine with an exhaust-gas turbocharger is disclosed. According to said method, the output or torque of the turbine is determined based on the outputs or torques of the compressor and the loss on the shaft and the selected set point for the correcting variable for adjusting the charge pressure is determined according to said output or said torque of the turbine.
摘要翻译：公开了一种利用排气涡轮增压器精确控制内燃机的充气压力的方法。根据所述方法，根据压缩机的输出或转矩确定涡轮机的输出或转矩，并根据所述输出或所述输出确定用于调节充气压力的校正变量的选定设定点，所述涡轮机的扭矩。

2. 发明授权

US08093689B2 Attachment member for semiconductor sensor device 有权
标题翻译：半导体传感器装置的附件
公开(公告)号：US08093689B2
公开(公告)日：2012-01-10
申请号：US11772272
申请日：2007-07-02
申请人： Wolfgang Stadler , Harald Gossner , Reinhold Gaertner
发明人： Wolfgang Stadler , Harald Gossner , Reinhold Gaertner
IPC分类号： H01L23/58
CPC分类号： H01L23/60 , H01L2223/6677 , H01L2924/0002 , H01L2924/3011 , H01L2924/3025 , H01L2924/00
摘要： A semiconductor sensor device is electrically coupled to an object. An attachment member attaches the semiconductor sensor device to the object. The attachment member comprises a first conductive contact region and a second conductive contact region. An insulating portion is electrically isolates the semiconductor sensor device from the first conductive contact region and second conductive contact region.
摘要翻译：半导体传感器装置电耦合到物体。附接构件将半导体传感器装置附接到物体。附接构件包括第一导电接触区域和第二导电接触区域。绝缘部分将半导体传感器装置与第一导电接触区域和第二导电接触区域电隔离。

3. 发明授权

US07694247B2 Identification of ESD and latch-up weak points in an integrated circuit 有权
标题翻译：识别集成电路中的ESD和闭锁弱点
公开(公告)号：US07694247B2
公开(公告)日：2010-04-06
申请号：US10569986
申请日：2005-03-17
申请人： Kai Esmark , Harald Gossner , Wolfgang Stadler , Marin Streibl
发明人： Kai Esmark , Harald Gossner , Wolfgang Stadler , Marin Streibl
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A program-controlled arrangement for the identification of ESD and/or latch-up weak points in the design or in the concept of an integrated circuit comprises a pre-processor, which processes first data about the description of the integrated circuit, second data about already ESD-characterized circuit parts of the integrated circuit, and third data which contain information about ESD test standards. A simulator device is connected downstream of the pre-processor which has a simulator which, by using the fourth and fifth data generated by the pre-processor, performs an ESD simulation of the integrated circuit, which has a monitoring controller for controlling the ESD simulation sequence in the simulator. An analysis device is connected downstream of the simulator device, which performs an evaluation of the sixth data generated in the simulator device with regard to their physical validity and meaningfulness, and marks the simulation runs having physically relevant ESD failure events.
摘要翻译：用于在设计中或集成电路的概念中识别ESD和/或闭锁弱点的程序控制布置包括预处理器，其处理关于集成电路的描述的第一数据，关于集成电路已经具有ESD特征的电路部件，以及包含有关ESD测试标准信息的第三个数据。模拟器装置连接在预处理器的下游，其具有模拟器，通过使用由预处理器生成的第四和第五数据执行集成电路的ESD模拟，其具有用于控制ESD模拟的监视控制器序列在模拟器中。分析装置连接在模拟器装置的下游，对其模拟装置的物理有效性和有意义性进行评估，并对具有物理上相关的ESD故障事件的模拟运行进行标记。

4. 发明申请

US20060056121A1 Circuit for protecting integrated circuits against electrostatic discharges 有权
标题翻译：保护集成电路免受静电放电的电路
公开(公告)号：US20060056121A1
公开(公告)日：2006-03-16
申请号：US10536176
申请日：2003-11-24
申请人： Kai Esmark , Harald Gossner , Wolfgang Stadler , Martin Streibl , Martin Wendel
发明人： Kai Esmark , Harald Gossner , Wolfgang Stadler , Martin Streibl , Martin Wendel
IPC分类号： H02H9/00
CPC分类号： H02H9/046
摘要： A circuit is described that protects an integrated circuit from electrostatic discharges or electrical over-stress. The circuit arrangement has first and second protective elements connected in series between a connection of the integrated circuit and a supply voltage. When electrostatic discharges or electrical over-stress occurs, current flows through the conductive path formed through the first and second protective elements. A current path that contains a circuit element limits current through the first protective element is connected in parallel with the first protective element. The first protective element has blocking behavior when no electrostatic discharges or electrical over-stress occurs, a limited current flows through the current path and the second protective element.
摘要翻译：描述了保护集成电路免受静电放电或电过压的电路。电路装置具有在集成电路的连接和电源电压之间串联连接的第一和第二保护元件。当发生静电放电或电过压时，电流流过形成在第一和第二保护元件上的导电路径。包含电路元件的电流路径限制通过第一保护元件的电流与第一保护元件并联连接。当不产生静电放电或电过度应力时，第一保护元件具有阻塞行为，有限的电流流过电流通路和第二保护元件。

5. 发明申请

US20050003564A1 Method for determining an ESD/latch-up strength of an integrated circuit 失效
标题翻译：用于确定集成电路的ESD /闭锁强度的方法
公开(公告)号：US20050003564A1
公开(公告)日：2005-01-06
申请号：US10866863
申请日：2004-06-14
申请人： Silke Bargstadt-Franke , Kai Esmark , Harald Gossner , Philipp Riess , Wolfgang Stadler , Martin Streibl , Martin Wendel
发明人： Silke Bargstadt-Franke , Kai Esmark , Harald Gossner , Philipp Riess , Wolfgang Stadler , Martin Streibl , Martin Wendel
IPC分类号： H01L23/544 , H01L23/60 , G01R31/26
CPC分类号： H01L22/34 , H01L23/60 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A method for determining an ESD/latch-up strength of an integrated circuit includes producing an integrated circuit and a test structure using the same fabrication process. Electrical parameters at the test structure are measured and characteristic values associated with the integrated circuit are derived from the measured parameter values, wherein the characteristic values characterize an ESD or latch-up characteristic curve associated with the integrated circuit. The method further includes testing whether the characteristic values in each case lie within a predetermined range assigned to them, wherein the ranges are chosen such that a desired ESD/latch-up strength is present if the characteristic values in each case lie within their range.
摘要翻译：用于确定集成电路的ESD /闭锁强度的方法包括使用相同的制造工艺制造集成电路和测试结构。测量测试结构的电气参数，并且从测量的参数值导出与集成电路相关联的特征值，其中特征值表征与集成电路相关联的ESD或闭锁特性曲线。该方法还包括测试每种情况下的特征值是否在分配给它们的预定范围内，其中选择范围使得如果每种情况下的特征值在其范围内，则存在期望的ESD /闩锁强度。

6. 发明授权

US07863920B2 Electrostatic discharge test system and electrostatic discharge test method 有权
标题翻译：静电放电试验系统和静电放电试验方法
公开(公告)号：US07863920B2
公开(公告)日：2011-01-04
申请号：US11854275
申请日：2007-09-12
申请人： Reinhold Gaertner , Wolfgang Stadler , Harald Gossner
发明人： Reinhold Gaertner , Wolfgang Stadler , Harald Gossner
IPC分类号： G01R31/26
CPC分类号： G01R31/002
摘要： A method of conducting an electrostatic discharge test on an integrated circuit is described. The method comprises configuring a test board assembly to emulate characteristics of a system in which the integrated circuit is to be used, coupling the integrated circuit to the test board assembly, and applying an electrostatic discharge test signal of system-level type to the test board assembly.
摘要翻译：对集成电路进行静电放电试验的方法进行说明。该方法包括配置测试板组件以仿真其中使用集成电路的系统的特性，将集成电路耦合到测试板组件，以及将系统级类型的静电放电测试信号施加到测试板部件。

7. 发明授权

US07009404B2 Method and device for testing the ESD resistance of a semiconductor component 有权
标题翻译：用于测试半导体部件的ESD电阻的方法和装置
公开(公告)号：US07009404B2
公开(公告)日：2006-03-07
申请号：US10160740
申请日：2002-05-31
申请人： Martin Wendel , Richard Owen , Harald Gossner , Wolfgang Stadler , Philipp Riess , Martin Streibl , Kai Esmark
发明人： Martin Wendel , Richard Owen , Harald Gossner , Wolfgang Stadler , Philipp Riess , Martin Streibl , Kai Esmark
IPC分类号： G01R31/08 , G01R27/08
CPC分类号： G01R31/002 , G01R31/129
摘要： To test the ESD resistance of a semiconductor component, for example of a NOS transistor, which can be used as a PSD protective element in a chip, a direct current characteristic of the semiconductor component is monitored and the ESD resistance of the respective semiconductor component is inferred depending on this. In particular, the direct current failure threshold of the semiconductor component at which an increased leakage current occurs in the non-conducting direction of the semiconductor component can be monitored in operation of the semiconductor component using an applied direct current and the ESD resistance of the semiconductor component inferred depending on a change in this direct current failure threshold.
摘要翻译：为了测试可用作芯片中的PSD保护元件的例如可用作PSD保护元件的NOS晶体管的半导体部件的ESD电阻，监视半导体部件的直流特性，并且各半导体部件的ESD电阻为据此推断。特别地，可以在使用所施加的直流电流和半导体的ESD电阻的半导体组件的操作中监视在半导体组件的非导通方向上发生增加的漏电流的半导体组件的直流故障阈值根据该直流故障阈值的变化推断分量。

8. 发明授权

US06842688B2 Adaptive control method 有权
标题翻译：自适应控制方法
公开(公告)号：US06842688B2
公开(公告)日：2005-01-11
申请号：US10797454
申请日：2004-03-10
申请人： Michael Käsbauer , Wolfgang Stadler
发明人： Michael Käsbauer , Wolfgang Stadler
IPC分类号： F02D21/08 , F02D35/00 , F02D41/00 , F02D41/24 , F02M26/48 , F02M26/54 , G05B13/02 , F02D41/14
CPC分类号： F02D41/2464 , F02D35/0007 , F02D41/0077 , F02D2250/16 , F02M26/48 , F02M26/54 , F02M26/70 , G05B13/021 , Y02T10/47
摘要： In a control method, the setting for a setting device (5), comprising a device (9) for reporting the setting, is regulated in a range between two end positions by using a measured parameter, given by the device (9) for reporting the setting, depending on the setting of the setting device and a characteristic curve, whereby, during the regulation a set value or an actual value for the setting is monitored. The characteristic curve is adapted when the set value or the actual value for the setting lies within a given separation from a given value for an adaptation setting.
摘要翻译：在控制方法中，包括用于报告设置的设备（9）的设置设备（5）的设置通过使用由设备（9）报告的测量参数在两个终端位置之间的范围内被调节该设定取决于设定装置的设定和特性曲线，由此在调节期间，监视设定值或实际值。当设定值或设定的实际值位于与自适应设置的给定值之间的给定间隔内时，将调整特性曲线。

9. 发明授权

US06559503B2 Transistor with ESD protection 有权
公开(公告)号：US06559503B2
公开(公告)日：2003-05-06
申请号：US10001179
申请日：2001-11-02
申请人： Martin Wendel , Xaver Guggenmos , Wolfgang Stadler
发明人： Martin Wendel , Xaver Guggenmos , Wolfgang Stadler
IPC分类号： H01L2976
CPC分类号： H01L27/0288 , H01L29/0653
摘要： The transistor has source and drain diffusion regions between which a gate electrode is disposed. In order to increase the sheet resistance of the source and/or drain diffusion regions, a plurality of strip-shaped insulating zones are provided, which penetrate through the corresponding diffusion region. The zones are oriented perpendicularly to the gate electrode and the end a given spacing distance from the gate electrode.

10. 发明授权

US07359169B2 Circuit for protecting integrated circuits against electrostatic discharges 有权
标题翻译：保护集成电路免受静电放电的电路
公开(公告)号：US07359169B2
公开(公告)日：2008-04-15
申请号：US10536176
申请日：2003-11-24
申请人： Kai Esmark , Harald Gossner , Wolfgang Stadler , Martin Streibl , Martin Wendel
发明人： Kai Esmark , Harald Gossner , Wolfgang Stadler , Martin Streibl , Martin Wendel
IPC分类号： H02H9/00 , H02H9/08 , H02H3/20 , H02H9/04 , H02H3/22 , H02H1/00 , H02H1/04 , H02H9/06 , H01C7/12
CPC分类号： H02H9/046
摘要： A circuit is described that protects an integrated circuit from electrostatic discharges or electrical over-stress. The circuit arrangement has first and second protective elements connected in series between a connection of the integrated circuit and a supply voltage. When electrostatic discharges or electrical over-stress occurs, current flows through the conductive path formed through the first and second protective elements. A current path that contains a circuit element limits current through the first protective element is connected in parallel with the first protective element. The first protective element has blocking behavior when no electrostatic discharges or electrical over-stress occurs, a limited current flows through the current path and the second protective element.
摘要翻译：描述了保护集成电路免受静电放电或电过压的电路。电路装置具有在集成电路的连接和电源电压之间串联连接的第一和第二保护元件。当发生静电放电或电过压时，电流流过形成在第一和第二保护元件上的导电路径。包含电路元件的电流路径限制通过第一保护元件的电流与第一保护元件并联连接。当不产生静电放电或电过度应力时，第一保护元件具有阻塞行为，有限的电流流过电流通路和第二保护元件。

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