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    • 9. 发明授权
    • Method of manufacturing a thin film transistor array panel
    • 制造薄膜晶体管阵列面板的方法
    • US07459323B2
    • 2008-12-02
    • US11512805
    • 2006-08-30
    • Min-Wook ParkSang-Jin JeonJung-Joon ParkJeong-Young LeeBum-Ki BaekSe-Hwan YuSang-Ki KwakHan-Ju LeeKwon-Young Choi
    • Min-Wook ParkSang-Jin JeonJung-Joon ParkJeong-Young LeeBum-Ki BaekSe-Hwan YuSang-Ki KwakHan-Ju LeeKwon-Young Choi
    • H01L21/00
    • G02F1/1368G02F1/1339
    • A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a gate insulating layer and a semiconductor layer in sequence on the gate line; depositing a lower conductive film and an upper conductive film on the semiconductor layer; photo-etching the upper conductive film, the lower conductive film, and the semiconductor layer; depositing a passivation layer; photo-etching the passivation layer to expose first and second portions of the upper conductive film; removing the first and the second portions of the upper conductive film to expose first and second portions of the lower conductive film; forming a pixel electrode and a pair of redundant electrodes on the first and the second portions of the lower conductive film, respectively, the redundant electrodes exposing a part of the second portion of the lower conductive film; removing the exposed part of the second portion of the lower conductive film to expose a portion of the semiconductor layer; and forming a columnar spacer on the exposed portion of the semiconductor layer.
    • 提供一种制造薄膜晶体管阵列面板的方法,包括:在基板上形成栅极线; 在栅极线上依次沉积栅极绝缘层和半导体层; 在半导体层上沉积下导电膜和上导电膜; 对上导电膜,下导电膜和半导体层进行光蚀刻; 沉积钝化层; 对所述钝化层进行光蚀刻以暴露所述上导电膜的第一和第二部分; 去除上导电膜的第一和第二部分以暴露下导电膜的第一和第二部分; 在下导电膜的第一和第二部分上形成像素电极和一对冗余电极,所述冗余电极暴露下导电膜的第二部分的一部分; 去除下导电膜的第二部分的暴露部分以暴露半导体层的一部分; 以及在半导体层的暴露部分上形成柱状间隔物。
    • 10. 发明授权
    • Thin film transistor substrate including disconnection prevention member
    • 薄膜晶体管基板,包括防断断部件
    • US08427623B2
    • 2013-04-23
    • US12816591
    • 2010-06-16
    • Se-Hwan YuHyang-Shik KongSu-Hyoung Kang
    • Se-Hwan YuHyang-Shik KongSu-Hyoung Kang
    • G02F1/1333G02F1/1343G02F1/1345
    • G02F1/136286G02F2001/13629
    • A thin film transistor array panel including a display area having a gate line, a data line insulated from and intersecting the gate line, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor, and a peripheral area formed on the circumference of the display area, according to an exemplary embodiment of the present invention, includes: a driving signal line formed with the same layer as the gate line in the peripheral area and receiving an external signal; a connection signal line formed with the same layer as the data line in the peripheral area; a disconnection prevention member overlapping the side surface of the connection signal line on the connection signal line; and a connection assistance member formed on the disconnection prevention member and connecting the driving signal line and the connection signal line.
    • 一种薄膜晶体管阵列面板,包括具有栅极线的显示区域,与栅极线绝缘并与之相交的数据线,连接到栅极线和数据线的薄膜晶体管,以及连接到薄膜晶体管的像素电极 以及形成在显示区域的圆周上的周边区域,根据本发明的示例性实施例,包括:形成与周边区域中的栅极线相同层并且接收外部信号的驱动信号线; 连接信号线,其与周边区域中的数据线形成相同的层; 断开防止部件与连接信号线上的连接信号线的侧面重叠; 以及连接辅助构件,其形成在所述防止断开构件上并且连接所述驱动信号线和所述连接信号线。