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    • 2. 发明授权
    • Apparatus and method of manufacturing semiconductor element
    • 半导体元件制造装置及其制造方法
    • US6123774A
    • 2000-09-26
    • US867487
    • 1997-06-02
    • Takashi HiraoAkihisa YoshidaMasatoshi Kitagawa
    • Takashi HiraoAkihisa YoshidaMasatoshi Kitagawa
    • H01L21/00H01L21/205H01L21/223H01L21/265H01L21/28H01L21/336H01J37/00
    • H01L21/2236H01L21/67213H01L29/66765
    • A large area semiconductor element can be manufactured with high productivity, which has low electric resistance at the boundary face of a metal and a semiconductor and has excellent characteristics and reliability. A manufacturing apparatus comprises an ion irradiation means for simultaneously irradiating hydrogen ions and ions containing an element serving as a dopant of a semiconductor to a semiconductor film or a substrate in an atmosphere under reduced pressure, and a film forming means which forms a thin film or a heat treatment means which conducts a heat treatment without exposing a sample to an air. When a sample having an a-Si:H thin film is brought into a sample preparation chamber by opening a gate valve, the chamber is exhausted to have the inside pressure of 10.sup.2 to 10.sup.-3 Pa. Then, the sample is forwarded to an ion irradiation chamber from the sample preparation chamber via an intermediate chamber of which the pressure is maintained in the range of 10.sup.-3 to 10.sup.-7 Pa, and ions such as phosphous are irradiated. After the ion irradiation, a gate valve is opened to transfer the sample to the intermediate chamber, and then a gate valve is opened to forward the sample to a deposition chamber. Subsequently, Ar gas is let in to the deposition chamber and a metal film of Al/Ti is deposited by a sputtering method. After the deposition, the sample is forwarded to a sample carry-out chamber via the intermediate chamber.
    • 可以以高生产率制造大面积半导体元件,其在金属和半导体的边界面处具有低电阻并且具有优异的特性和可靠性。 一种制造装置包括:离子照射装置,用于在减压下的气氛中同时向半导体膜或基板中含有含有半导体的掺杂剂的氢离子和离子的离子和离子;以及成膜装置,其形成薄膜或 进行热处理而不将样品暴露于空气的热处理装置。 当通过打开闸阀将具有a-Si:H薄膜的样品送入样品制备室时,将室排出至内部压力为102至10 -3 Pa,然后将样品送至 离子照射室从样品制备室经过其中压力保持在10 -3至10 -7 Pa的范围的中间室,并且照射诸如磷的离子。 在离子照射之后,打开闸阀以将样品转移到中间室,然后打开闸阀以将样品转移到沉积室。 随后,将Ar气体进入沉积室,通过溅射法沉积Al / Ti的金属膜。 沉积后,样品通过中间室送到样品进样室。
    • 5. 发明授权
    • Silicon structure, method for producing the same, and solar battery using the silicon structure
    • 硅结构体及其制造方法以及使用硅结构的太阳能电池
    • US06518494B1
    • 2003-02-11
    • US08701292
    • 1996-08-22
    • Munehiro ShibuyaMasatoshi KitagawaYuuji MukaiAkihisa Yoshida
    • Munehiro ShibuyaMasatoshi KitagawaYuuji MukaiAkihisa Yoshida
    • H01L3100
    • H01L31/0547H01L31/02363H01L31/035227Y02E10/52
    • A silicon structure having little solar light beam reflection, which is suitable for a solar battery. On the entire surface of a quartz substrate, Mo is deposited at a thickness of approximately 51 &mgr;m to form a lower electrode. On the entire surface of the lower electrode, a p type silicon structure having a thickness of 30 to 40 &mgr;m comprising an aggregate of a plurality of columnar silicon members mainly comprising silicon and having random orientations is formed via a film mainly comprising silicon, using Si2Cl6 mixed with BCl3. On the surface of the p type silicon structure, P is diffused by a thermal diffusion method using POCl3 to form an n type region at the periphery of the columnar silicon members. On the entire surface of the p type silicon structure, a transparent electrode comprising indium-tin oxide having a thickness of 30 to 40 &mgr;m is formed, and an upper electrode comprising Al having a thickness of approximately 1 &mgr;m is formed on the transparent electrode.
    • 具有太阳光反射少的硅结构,适用于太阳能电池。 在石英衬底的整个表面上,以约51μm的厚度沉积Mo以形成下电极。 在下电极的整个表面上,通过使用Si 2 Cl 6混合的主要包含硅的膜,形成厚度为30至40μm的包含多个主要由硅构成并具有随机取向的多个柱状硅构件的聚集体的ap型硅结构 与BCl3。 在p型硅结构的表面上,P通过使用POCl 3的热扩散法扩散,在柱状硅构件的周围形成n型区域。 在p型硅结构的整个表面上,形成厚度为30〜40μm的氧化铟锡的透明电极,在透明电极上形成厚度约为1μm的包含Al的上部电极。
    • 9. 发明授权
    • Method of manufacturing transistor
    • 制造晶体管的方法
    • US6127211A
    • 2000-10-03
    • US162450
    • 1998-09-29
    • Takashi HiraoAkihisa YoshidaToru FukumotoKazuyasu Adachi
    • Takashi HiraoAkihisa YoshidaToru FukumotoKazuyasu Adachi
    • H01L21/18H01L21/336H01L21/84H01L29/786
    • H01L29/78621
    • In a method of manufacturing a semiconductor device having an LDD structure, source gases for generating plural types of impurity ions exhibiting different molecular weights and different projected ranges in a target during impurity implantation are supplied to a plasma space, ionized, accelerated with a voltage, and implanted in a semiconductor region on the target substrate. In the case of manufacturing a top-gate transistor, a gate electrode on the semiconductor region has a sufficient thickness to serve as a mask. In the case of manufacturing a bottom-gate transistor, a mask and a resistor are used. An implantation angle is set to an optimum value as desired. Thereafter, the impurity is activated as desired. Thus, the semiconductor device having the LDD structure is manufactured by a single step of impurity implantation.
    • 在制造具有LDD结构的半导体器件的方法中,在杂质注入期间在靶中产生表现出不同分子量和不同投影范围的多种杂质离子的源气体被提供给等离子体空间,电离电压加速, 并注入目标衬底上的半导体区域。 在制造顶栅晶体管的情况下,半导体区域上的栅电极具有足够的厚度用作掩模。 在制造底栅晶体管的情况下,使用掩模和电阻器。 根据需要将植入角度设定为最佳值。 此后,根据需要激活杂质。 因此,具有LDD结构的半导体器件通过杂质注入的一个步骤来制造。