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1. 发明授权

US09003413B1 Thread synchronization by transitioning threads to spin lock and sleep state 有权
标题翻译：线程同步通过转换线程来旋转锁定和睡眠状态
公开(公告)号：US09003413B1
公开(公告)日：2015-04-07
申请号：US12568558
申请日：2009-09-28
申请人： Jason H. Anderson , Taneem Ahmed , Sandor S. Kalman
发明人： Jason H. Anderson , Taneem Ahmed , Sandor S. Kalman
IPC分类号： G06F9/46 , H04L12/26
CPC分类号： H04L12/2634 , G06F9/52
摘要： A method, apparatus, and computer readable medium for synchronizing a main thread and a slave thread executing on a processor system are disclosed. For example, the method includes the following elements: transitioning the slave thread from a sleep state to a spin-lock state in response to a wake-up message from the main thread; transitioning the slave thread out of the spin-lock state to process a first work unit from the main thread; determining, at the main thread, an elapsed time period until receipt of a second work unit for the slave thread; transitioning the slave thread to the spin-lock state if the elapsed time period satisfies a threshold time period; and transitioning the slave thread to the sleep state if the elapsed time period does not satisfy the threshold time period.
摘要翻译：公开了一种用于同步处理器系统上执行的主线程和从线程的方法，装置和计算机可读介质。例如，该方法包括以下元件：响应于来自主线程的唤醒消息将从线程从睡眠状态转换到自旋锁定状态; 将从线程转换到自旋锁定状态以从主线程处理第一工作单元; 在所述主线程处确定直到接收到所述从线程的第二工作单元的经过时间段; 如果经过时间段满足阈值时间段，则将从线程转换到自旋锁定状态; 以及如果经过时间段不满足阈值时间段，则将从线程转换到休眠状态。

2. 发明授权

US08312409B1 Multi-threaded deterministic router 有权
标题翻译：多线程确定性路由器
公开(公告)号：US08312409B1
公开(公告)日：2012-11-13
申请号：US12718945
申请日：2010-03-05
申请人： Gitu Jain , Vinay Verma , Taneem Ahmed , Sandor S. Kalman , Sanjeev Kwatra , Christopher H. Kingsley , Jason H. Anderson , Satyaki Das
发明人： Gitu Jain , Vinay Verma , Taneem Ahmed , Sandor S. Kalman , Sanjeev Kwatra , Christopher H. Kingsley , Jason H. Anderson , Satyaki Das
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , G06F17/5054
摘要： A method is described that includes: determining that nets of the circuit design comprise overlap, where the overlap indicates that at least two of the nets of the circuit design use a same routing resource; dividing the nets with overlap among a plurality of buckets, where for each bucket, a net of the bucket does not overlap any other net in the bucket; sequentially processing each bucket by unrouting and rerouting, via at least one processor, nets in the bucket; and storing routing information specifying routes for nets of the circuit design.
摘要翻译：描述了一种方法，其包括：确定电路设计的网络包括重叠，其中重叠指示电路设计的网络中的至少两个使用相同的路由资源; 在多个桶之间用重叠划分网，其中对于每个桶，桶的网不与桶中的任何其他网重叠; 通过至少一个处理器，通过在桶中的网络进行路由和重新路由来顺序地处理每个桶; 并存储指定电路设计网络的路由的路由信息。

3. 发明授权

US08201130B1 Parallel signal routing 有权
标题翻译：并行信号路由
公开(公告)号：US08201130B1
公开(公告)日：2012-06-12
申请号：US12939732
申请日：2010-11-04
申请人： Sandor S. Kalman , Vinay Verma , Gitu Jain , Taneem Ahmed , Sanjeev Kwatra
发明人： Sandor S. Kalman , Vinay Verma , Gitu Jain , Taneem Ahmed , Sanjeev Kwatra
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , G06F17/5054
摘要： A method is provided for routing a circuit design netlist. Nets of the netlist are grouped into a plurality of sub-netlists. For each sub-netlist, nets of the sub-netlist are routed as a function of congestion between nets of the sub-netlist. Congestion between nets of other sub-netlists in the plurality of sub-netlists is not taken into account. If two or more nets of the netlist are routed through the same routing resource, a global congestion history data set is updated to describe congestion between all nets in the netlist, and the two or more nets of the netlist are unrouted. The two or more nets are each rerouted as a function of the global congestion history data set and congestion between nets of the same sub-netlist as the net.
摘要翻译：提供了一种用于布线电路设计网表的方法。网表的网络被分组成多个子网表。对于每个子网表，子网表的网络作为子网表的网络之间的拥塞的功能被路由。不考虑多个子网表中其他子网表的网络之间的拥塞。如果网表的两个或多个网络通过相同的路由资源路由，则更新全局拥塞历史数据集，以描述网表中所有网之间的拥塞，并且网表的两个或多个网是未路由的。两个或更多个网络每个被重新路由为全局拥塞历史数据集的功能和与网络相同的子网表的网络之间的拥塞。

4. 发明申请

US20130332883A1 METHOD, SYSTEM AND APPARATUS FOR PROVIDING NOTIFICATIONS 审中-公开
标题翻译：方法，系统和设备提供通知
公开(公告)号：US20130332883A1
公开(公告)日：2013-12-12
申请号：US13489737
申请日：2012-06-06
申请人： Taneem Ahmed Talukdar
发明人： Taneem Ahmed Talukdar
IPC分类号： G06F15/16 , G06F3/048
CPC分类号： G06Q10/107
摘要： Embodiments described in the specification include a method, system and apparatus for providing notifications. The method comprises executing a notification application to receive a watch instruction generated via execution of a messaging application, the watch instruction including an identifier of the messaging application and an identifier for a subset of messages stored in association with the messaging application; storing the watch instruction; executing the notification application to receive a notification request generated via execution of the messaging application in response to the receipt of a new message at the communication device, the notification request including an application identifier and a message identifier; determining the processor whether the message identifier matches the subset identifier; and, when the determination is affirmative, controlling the at least one output device at the processor to generate a notification signal according to override notification settings stored in the memory in association with the watch instruction.
摘要翻译：说明书中描述的实施例包括用于提供通知的方法，系统和装置。所述方法包括执行通知应用程序以接收通过消息收发应用的执行而生成的监视指令，该监视指令包括消息收发应用的标识符以及与消息收发应用相关联地存储的消息子集的标识符; 存储手表指令; 响应于在所述通信设备处接收到新消息，执行所述通知应用以接收通过所述消息收发应用的执行产生的通知请求，所述通知请求包括应用标识符和消息标识符; 确定所述处理器消息标识符是否与所述子集标识符匹配; 并且当所述确定是肯定时，控制所述处理器处的所述至少一个输出设备，以根据与所述监视指令相关联地存储在所述存储器中的覆盖通知设置产生通知信号。

5. 发明授权

US08250513B1 Parallel process optimized signal routing 有权
标题翻译：并行过程优化信号路由
公开(公告)号：US08250513B1
公开(公告)日：2012-08-21
申请号：US12939765
申请日：2010-11-04
申请人： Vinay Verma , Gitu Jain , Sanjeev Kwatra , Taneem Ahmed , Sandor S. Kalman
发明人： Vinay Verma , Gitu Jain , Sanjeev Kwatra , Taneem Ahmed , Sandor S. Kalman
IPC分类号： G06F17/50 , G06F9/455
CPC分类号： G06F17/5077 , G06F2217/08
摘要： In one embodiment, a method for routing of a circuit design netlist is provided. A processing cost is determined for each net in the netlist. A plurality of regions are defined for the target device such that the total processing costs of nets are balanced between the plurality of regions. Concurrent with routing one or more nets of a first one of the plurality of regions, one or more nets are routed in at least one other of the plurality of regions. Synchronization and subsequent routing are performed for unrouted nets of the netlist.
摘要翻译：在一个实施例中，提供了一种用于路由电路设计网表的方法。网表中的每个网络确定处理成本。为目标设备定义多个区域，使得网络的总处理成本在多个区域之间平衡。与路由多个区域中的第一个区域的一个或多个网络同时，在多个区域中的至少另一个区域中路由一个或多个网络。为网表的未路由网络执行同步和后续路由。

6. 发明授权

US08302041B1 Implementation flow for electronic circuit designs using choice networks 有权
标题翻译：使用选择网络的电子电路设计的实施流程
公开(公告)号：US08302041B1
公开(公告)日：2012-10-30
申请号：US12146313
申请日：2008-06-25
申请人： Vi Chi Chan , Tetse Jang , Kevin Chung , Taneem Ahmed , David Nguyen Van Mau , Mehrdad Parsa , Amit Singh
发明人： Vi Chi Chan , Tetse Jang , Kevin Chung , Taneem Ahmed , David Nguyen Van Mau , Mehrdad Parsa , Amit Singh
IPC分类号： G06F17/50
CPC分类号： G06F17/5072 , G06F17/5054
摘要： A computer-implemented method of implementing a circuit design that includes an initial network within a programmable logic device can include generating a first choice network from the circuit design according to a first synthesis technique and determining a placement for the first choice network. At least a second choice network can be generated from the first choice network according to a second synthesis technique. A placement for the second choice network can be determined. The placement for the first choice network can be compared with the placement for the second choice network. A placement and corresponding choice network can be selected according to the comparison, and output.
摘要翻译：实现包括可编程逻辑器件内的初始网络的电路设计的计算机实现的方法可以包括根据第一合成技术从电路设计产生第一选择网络并确定第一选择网络的布局。根据第二合成技术，可以从第一选择网络生成至少第二选择网络。可以确定用于第二选择网络的位置。可以将第一选择网络的位置与第二选择网络的位置进行比较。可以根据比较选择一个布局和相应的选择网络，并输出。

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