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1. 发明授权

US09412583B2 Methods of forming dielectric layers and methods of manufacturing semiconductor devices using the same 有权
标题翻译：形成电介质层的方法和使用其制造半导体器件的方法
公开(公告)号：US09412583B2
公开(公告)日：2016-08-09
申请号：US13400952
申请日：2012-02-21
申请人： Sang-Yeol Kang , Suk-Jin Chung , Youn-Soo Kim , Jae-Hyoung Choi , Jae-Soon Lim , Min-Young Park
发明人： Sang-Yeol Kang , Suk-Jin Chung , Youn-Soo Kim , Jae-Hyoung Choi , Jae-Soon Lim , Min-Young Park
IPC分类号： H01L21/28 , H01L21/02 , H01L29/51 , H01L27/108 , H01L49/02 , H01L29/78
CPC分类号： H01L28/60 , H01L21/02178 , H01L21/02181 , H01L21/02189 , H01L21/02271 , H01L21/0228 , H01L21/28194 , H01L27/10808 , H01L27/10814 , H01L27/10855 , H01L28/40 , H01L29/517 , H01L29/78
摘要： To form a dielectric layer, an organometallic precursor is adsorbed on a substrate loaded into a process chamber. The organometallic precursor includes a central metal and ligands bound to the central metal. An inactive oxidant is provided onto the substrate. The inactive oxidant is reactive with the organometallic precursor. An active oxidant is also provided onto the substrate. The active oxidant has a higher reactivity than that of the inactive oxidant.
摘要翻译：为了形成电介质层，有机金属前体被吸附在装载到处理室中的基板上。有机金属前体包括中心金属和与中心金属结合的配体。在基材上提供无活性氧化剂。无活性氧化剂与有机金属前体反应。活性氧化剂也提供到基底上。活性氧化剂的反应活性高于非活性氧化剂。

2. 发明申请

US20110095397A1 Semiconductor Structures Including Dielectric Layers and Capacitors Including Semiconductor Structures 审中-公开
标题翻译：包括介质层的半导体结构和包括半导体结构的电容器
公开(公告)号：US20110095397A1
公开(公告)日：2011-04-28
申请号：US12909289
申请日：2010-10-21
申请人： Suk-jin Chung , Jae-hyoung Choi , Youn-soo Kim , Jae-soon Lim , Sang-yeol Kang
发明人： Suk-jin Chung , Jae-hyoung Choi , Youn-soo Kim , Jae-soon Lim , Sang-yeol Kang
IPC分类号： H01L29/92 , H01G4/30
CPC分类号： H01L27/10852 , H01L21/02175 , H01L21/02183 , H01L21/02304 , H01L21/02362 , H01L28/40
摘要： Semiconductor structures including a first conductive layer; a dielectric layer on the first conductive layer; a second conductive layer on the dielectric layer; and a crystallized seed layer in at least one of a first portion between the first conductive layer and the dielectric layer and a second portion between the dielectric layer and the second conductive layer. Related capacitors and methods are also provided herein.
摘要翻译：包括第一导电层的半导体结构; 第一导电层上的电介质层; 介电层上的第二导电层; 以及在所述第一导电层和所述电介质层之间的第一部分中的至少一个中的结晶晶种层和所述介电层和所述第二导电层之间的第二部分。本文还提供了相关的电容器和方法。

3. 发明授权

US07531861B2 Trench capacitors with insulating layer collars in undercut regions 失效
标题翻译：带有绝缘层的沟槽电容器在底切区域
公开(公告)号：US07531861B2
公开(公告)日：2009-05-12
申请号：US12033065
申请日：2008-02-19
申请人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
发明人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
IPC分类号： H01L29/94
CPC分类号： H01L27/10867 , H01L27/10829 , H01L27/1087 , H01L29/66181 , H01L29/945
摘要： Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.
摘要翻译：提供了在底切区域中具有绝缘层套环的沟槽电容器和制造这种沟槽电容器的方法。制造沟槽电容器的一些方法包括在衬底上形成第一层。在与衬底相对的第一层上形成第二层。形成在第一和第二层的顶部上具有开口的掩模。通过从掩模中的开口去除第一层和第二层的一部分来形成第一沟槽。除去第二层下面的第一层的一部分，以在第二层下形成底切区域。在第二层下方的底切区域中形成绝缘层套环。形成第二沟槽，其通过从掩模中的开口去除衬底的一部分而从第一沟槽延伸。掩埋板沿着第二沟槽形成在衬底中。介电层形成在第二沟槽的内壁和底部上。在电介质层上的第二沟槽中形成存储电极。

4. 发明申请

US20080135876A1 TRENCH CAPACITORS WITH INSULATING LAYER COLLARS IN UNDERCUT REGIONS 失效
标题翻译：在内陆地区具有绝缘层的TRENCH电容器
公开(公告)号：US20080135876A1
公开(公告)日：2008-06-12
申请号：US12033065
申请日：2008-02-19
申请人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
发明人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
IPC分类号： H01L29/94
CPC分类号： H01L27/10867 , H01L27/10829 , H01L27/1087 , H01L29/66181 , H01L29/945
摘要： Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.
摘要翻译：提供了在底切区域中具有绝缘层套环的沟槽电容器和制造这种沟槽电容器的方法。制造沟槽电容器的一些方法包括在衬底上形成第一层。在与衬底相对的第一层上形成第二层。形成在第一和第二层的顶部上具有开口的掩模。通过从掩模中的开口去除第一层和第二层的一部分来形成第一沟槽。除去第二层下面的第一层的一部分，以在第二层下形成底切区域。在第二层下方的底切区域中形成绝缘层套环。形成第二沟槽，其通过从掩模中的开口去除衬底的一部分而从第一沟槽延伸。掩埋板沿着第二沟槽形成在衬底中。介电层形成在第二沟槽的内壁和底部上。在电介质层上的第二沟槽中形成存储电极。

5. 发明授权

US07354821B2 Methods of fabricating trench capacitors with insulating layer collars in undercut regions 失效
标题翻译：在底切区域制造具有绝缘层环的沟槽电容器的方法
公开(公告)号：US07354821B2
公开(公告)日：2008-04-08
申请号：US11037626
申请日：2005-01-18
申请人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
发明人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
IPC分类号： H01L21/8242 , H01L21/336
CPC分类号： H01L27/10867 , H01L27/10829 , H01L27/1087 , H01L29/66181 , H01L29/945
摘要： Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.
摘要翻译：提供了在底切区域中具有绝缘层套环的沟槽电容器和制造这种沟槽电容器的方法。制造沟槽电容器的一些方法包括在衬底上形成第一层。在与衬底相对的第一层上形成第二层。形成在第一和第二层的顶部上具有开口的掩模。通过从掩模中的开口去除第一层和第二层的一部分来形成第一沟槽。除去第二层下面的第一层的一部分，以在第二层下形成底切区域。在第二层下方的底切区域中形成绝缘层套环。形成第二沟槽，其通过从掩模中的开口去除衬底的一部分而从第一沟槽延伸。掩埋板沿着第二沟槽形成在衬底中。介电层形成在第二沟槽的内壁和底部上。在电介质层上的第二沟槽中形成存储电极。

6. 发明申请

US20070099419A1 Methods for forming semiconductor devices including thermal processing 有权
公开(公告)号：US20070099419A1
公开(公告)日：2007-05-03
申请号：US11641138
申请日：2006-12-19
申请人： Jae-hyoung Choi , Wan-don Kim , Cha-young Yoo , Suk-jin Chung
发明人： Jae-hyoung Choi , Wan-don Kim , Cha-young Yoo , Suk-jin Chung
IPC分类号： H01L21/44
CPC分类号： H01L28/65 , H01L28/40
摘要： Methods for fabricating semiconductor memory devices may include forming a first conductive layer for a first electrode on a semiconductor substrate, forming a dielectric layer on the first conductive layer, and forming a second conductive layer for a second electrode on the dielectric layer. Portions of the second conductive layer and the dielectric layer can be removed, and a thermal process can be performed on the second conductive layer and the dielectric layer. The thermal process can reduce interface stress between the second conductive layer and the dielectric layer and/or cure the dielectric layer. In addition, the dielectric layer may be maintained in an amorphous state during and after the thermal process.

7. 发明授权

US07172946B2 Methods for forming semiconductor devices including thermal processing 失效
标题翻译：用于形成包括热处理的半导体器件的方法
公开(公告)号：US07172946B2
公开(公告)日：2007-02-06
申请号：US10629430
申请日：2003-07-29
申请人： Jae-hyoung Choi , Wan-don Kim , Cha-young Yoo , Suk-jin Chung
发明人： Jae-hyoung Choi , Wan-don Kim , Cha-young Yoo , Suk-jin Chung
IPC分类号： H01L21/20
CPC分类号： H01L28/65 , H01L28/40
摘要： Methods for fabricating semiconductor memory devices may include forming a first conductive layer for a first electrode on a semiconductor substrate, forming a dielectric layer on the first conductive layer, and forming a second conductive layer for a second electrode on the dielectric layer. Portions of the second conductive layer and the dielectric layer can be removed, and a thermal process can be performed on the second conductive layer and the dielectric layer. The thermal process can reduce interface stress between the second conductive layer and the dielectric layer and/or cure the dielectric layer. In addition, the dielectric layer may be maintained in an amorphous state during and after the thermal process.
摘要翻译：用于制造半导体存储器件的方法可以包括在半导体衬底上形成用于第一电极的第一导电层，在第一导电层上形成电介质层，以及在电介质层上形成用于第二电极的第二导电层。可以去除第二导电层和电介质层的部分，并且可以在第二导电层和电介质层上进行热处理。热处理可以减少第二导电层和电介质层之间的界面应力和/或固化电介质层。此外，在热处理期间和之后，电介质层可以保持在非晶状态。

8. 发明授权

US07049232B2 Methods for forming ruthenium films with β-diketone containing ruthenium complexes and method for manufacturing metal-insulator-metal capacitor using the same 有权
公开(公告)号：US07049232B2
公开(公告)日：2006-05-23
申请号：US10657596
申请日：2003-09-08
申请人： Kwang-hee Lee , Cha-young Yoo , Han-jin Lim , Sung-tae Kim , Suk-jin Chung , Wan-don Kim , Jung-hee Chung , Jin-il Lee
发明人： Kwang-hee Lee , Cha-young Yoo , Han-jin Lim , Sung-tae Kim , Suk-jin Chung , Wan-don Kim , Jung-hee Chung , Jin-il Lee
IPC分类号： H01L21/44
CPC分类号： C23C16/18 , H01L21/28556 , H01L27/10852 , H01L27/11502 , H01L27/11507 , H01L28/65
摘要： Provided are 1) a method for forming a ruthenium film under a single process condition, whereby high adhesion of the ruthenium film to a lower layer is maintained, and 2) a method for manufacturing an metal-insulator-metal (MIM) capacitor using the ruthenium film forming method. The method for forming a ruthenium film includes supplying bis(isoheptane-2,4-dionato)norbornadiene ruthenium at a flow rate of 0.2–1 ccm and oxygen at a flow rate of 20–60 sccm, and depositing the ruthenium film at a temperature of 330–430° C. under a pressure of 0.5–5 Torr using chemical vapor deposition (CVD).

9. 发明申请

US20120225548A1 METHODS OF FORMING DIELECTRIC LAYERS AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME 有权
标题翻译：形成介质层的方法和使用其制造半导体器件的方法
公开(公告)号：US20120225548A1
公开(公告)日：2012-09-06
申请号：US13400952
申请日：2012-02-21
申请人： SANG-YEOL KANG , SUK-JIN CHUNG , YOUN-SOO KIM , JAE-HYOUNG CHOI , JAE-SOON LIM , MIN-YOUNG PARK
发明人： SANG-YEOL KANG , SUK-JIN CHUNG , YOUN-SOO KIM , JAE-HYOUNG CHOI , JAE-SOON LIM , MIN-YOUNG PARK
IPC分类号： H01L21/28 , H01L21/312
CPC分类号： H01L28/60 , H01L21/02178 , H01L21/02181 , H01L21/02189 , H01L21/02271 , H01L21/0228 , H01L21/28194 , H01L27/10808 , H01L27/10814 , H01L27/10855 , H01L28/40 , H01L29/517 , H01L29/78
摘要： To form a dielectric layer, an organometallic precursor is adsorbed on a substrate loaded into a process chamber. The organometallic precursor includes a central metal and ligands bound to the central metal. An inactive oxidant is provided onto the substrate. The inactive oxidant is reactive with the organometallic precursor. An active oxidant is also provided onto the substrate. The active oxidant has a higher reactivity than that of the inactive oxidant.
摘要翻译：为了形成电介质层，有机金属前体被吸附在装载到处理室中的基板上。有机金属前体包括中心金属和与中心金属结合的配体。在基材上提供无活性氧化剂。无活性氧化剂与有机金属前体反应。活性氧化剂也提供到基底上。活性氧化剂的反应活性高于非活性氧化剂。

10. 发明申请

US20110151639A1 SEMICONDUCTOR DEVICE, METHOD OF FABRICATING THE SAME, SEMICONDUCTOR MODULE, ELECTRONIC CIRCUIT BOARD, AND ELECTRONIC SYSTEM INCLUDING THE DEVICE 审中-公开
标题翻译：半导体器件，其制造方法，半导体器件，电子电路板和包括器件的电子系统
公开(公告)号：US20110151639A1
公开(公告)日：2011-06-23
申请号：US12855191
申请日：2010-08-12
申请人： Jae-Soon Lim , Youn-Soo Kim , Jae-Hyoung Choi , Sang-Yeol Kang , Suk-Jin Chung
发明人： Jae-Soon Lim , Youn-Soo Kim , Jae-Hyoung Choi , Sang-Yeol Kang , Suk-Jin Chung
IPC分类号： H01L21/02
CPC分类号： H01L28/40 , C01G23/047 , C01G25/02 , C01P2002/72 , C01P2004/03 , C01P2006/40
摘要： Provided are a semiconductor device, a method of fabricating the same, and a semiconductor module, an electronic circuit board, and an electronic system including the device. The semiconductor device includes a lower electrode, a rutile state lower vanadium dioxide layer on the lower electrode, a rutile state titanium oxide on the lower vanadium dioxide layer, and an upper electrode on the titanium oxide layer.
摘要翻译：提供一种半导体器件及其制造方法，以及半导体模块，电子电路板和包括该器件的电子系统。半导体器件包括下电极，下电极上的金红石状态较低二氧化钒层，下二氧化钒层上的金红石型氧化钛，以及氧化钛层上的上电极。

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