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1. 发明授权

US09412583B2 Methods of forming dielectric layers and methods of manufacturing semiconductor devices using the same 有权
标题翻译：形成电介质层的方法和使用其制造半导体器件的方法
公开(公告)号：US09412583B2
公开(公告)日：2016-08-09
申请号：US13400952
申请日：2012-02-21
申请人： Sang-Yeol Kang , Suk-Jin Chung , Youn-Soo Kim , Jae-Hyoung Choi , Jae-Soon Lim , Min-Young Park
发明人： Sang-Yeol Kang , Suk-Jin Chung , Youn-Soo Kim , Jae-Hyoung Choi , Jae-Soon Lim , Min-Young Park
IPC分类号： H01L21/28 , H01L21/02 , H01L29/51 , H01L27/108 , H01L49/02 , H01L29/78
CPC分类号： H01L28/60 , H01L21/02178 , H01L21/02181 , H01L21/02189 , H01L21/02271 , H01L21/0228 , H01L21/28194 , H01L27/10808 , H01L27/10814 , H01L27/10855 , H01L28/40 , H01L29/517 , H01L29/78
摘要： To form a dielectric layer, an organometallic precursor is adsorbed on a substrate loaded into a process chamber. The organometallic precursor includes a central metal and ligands bound to the central metal. An inactive oxidant is provided onto the substrate. The inactive oxidant is reactive with the organometallic precursor. An active oxidant is also provided onto the substrate. The active oxidant has a higher reactivity than that of the inactive oxidant.
摘要翻译：为了形成电介质层，有机金属前体被吸附在装载到处理室中的基板上。有机金属前体包括中心金属和与中心金属结合的配体。在基材上提供无活性氧化剂。无活性氧化剂与有机金属前体反应。活性氧化剂也提供到基底上。活性氧化剂的反应活性高于非活性氧化剂。

2. 发明申请

US20110136317A1 Semiconductor device, method of fabricating the same, and semicondutor module, electronic circuit board, and electronic system including the device 审中-公开
标题翻译：半导体装置及其制造方法，半导体模块，电子电路板以及包括该装置的电子系统
公开(公告)号：US20110136317A1
公开(公告)日：2011-06-09
申请号：US12659830
申请日：2010-03-23
申请人： Sang-Yeol Kang , Youn-Soo Kim , Jae-Hyoung Choi , Jae-Soon Lim , Min-Young Park , Suk-Jin Chung
发明人： Sang-Yeol Kang , Youn-Soo Kim , Jae-Hyoung Choi , Jae-Soon Lim , Min-Young Park , Suk-Jin Chung
IPC分类号： H01L21/02
CPC分类号： H01L28/40 , H01L21/02183 , H01L21/02189 , H01L21/02194 , H01L21/022 , H01L21/0228 , H01L27/10852 , H01L29/40114
摘要： Example embodiments relate to a semiconductor device including an oxide dielectric layer and a non-oxide dielectric layer, a method of fabricating the device, and a semiconductor module, an electronic circuit board, and an electronic system including the device. The semiconductor device may include a lower electrode, an oxide dielectric layer disposed on the lower electrode, a non-oxide dielectric layer disposed on the oxide dielectric layer, and an upper electrode disposed on the non-oxide dielectric layer.
摘要翻译：示例性实施例涉及包括氧化物介电层和非氧化物介电层的半导体器件，制造器件的方法，以及包括该器件的半导体模块，电子电路板和电子系统。半导体器件可以包括下电极，设置在下电极上的氧化物介电层，设置在氧化物电介质层上的非氧化物介电层，以及设置在非氧化物介电层上的上电极。

3. 发明申请

US20110151639A1 SEMICONDUCTOR DEVICE, METHOD OF FABRICATING THE SAME, SEMICONDUCTOR MODULE, ELECTRONIC CIRCUIT BOARD, AND ELECTRONIC SYSTEM INCLUDING THE DEVICE 审中-公开
标题翻译：半导体器件，其制造方法，半导体器件，电子电路板和包括器件的电子系统
公开(公告)号：US20110151639A1
公开(公告)日：2011-06-23
申请号：US12855191
申请日：2010-08-12
申请人： Jae-Soon Lim , Youn-Soo Kim , Jae-Hyoung Choi , Sang-Yeol Kang , Suk-Jin Chung
发明人： Jae-Soon Lim , Youn-Soo Kim , Jae-Hyoung Choi , Sang-Yeol Kang , Suk-Jin Chung
IPC分类号： H01L21/02
CPC分类号： H01L28/40 , C01G23/047 , C01G25/02 , C01P2002/72 , C01P2004/03 , C01P2006/40
摘要： Provided are a semiconductor device, a method of fabricating the same, and a semiconductor module, an electronic circuit board, and an electronic system including the device. The semiconductor device includes a lower electrode, a rutile state lower vanadium dioxide layer on the lower electrode, a rutile state titanium oxide on the lower vanadium dioxide layer, and an upper electrode on the titanium oxide layer.
摘要翻译：提供一种半导体器件及其制造方法，以及半导体模块，电子电路板和包括该器件的电子系统。半导体器件包括下电极，下电极上的金红石状态较低二氧化钒层，下二氧化钒层上的金红石型氧化钛，以及氧化钛层上的上电极。

4. 发明授权

US07361548B2 Methods of forming a capacitor using an atomic layer deposition process 有权
标题翻译：使用原子层沉积工艺形成电容器的方法
公开(公告)号：US07361548B2
公开(公告)日：2008-04-22
申请号：US11065086
申请日：2005-02-24
申请人： Jae-Soon Lim , Sung-Tae Kim , Young-Sun Kim , Young-Geun Park , Suk-Jin Chung , Seung-Hwan Lee
发明人： Jae-Soon Lim , Sung-Tae Kim , Young-Sun Kim , Young-Geun Park , Suk-Jin Chung , Seung-Hwan Lee
IPC分类号： H01L21/8242
CPC分类号： H01L21/0228 , H01L21/02175 , H01L21/02178 , H01L21/022 , H01L21/02274 , H01L21/28568 , H01L21/3141 , H01L27/10852 , H01L28/75 , H01L28/91
摘要： Methods for forming a capacitor using an atomic layer deposition process include providing a reactant including an aluminum precursor onto a substrate to chemisorb a portion of the reactant to a surface of the substrate. The substrate has an underlying structure including a lower electrode. An ammonia (NH3) plasma is provided onto the substrate to form a dielectric layer including aluminum nitride on the substrate including the lower electrode. An upper electrode is formed on the dielectric layer. A second dielectric layer may be provided oil the first dielectric layer.
摘要翻译：使用原子层沉积工艺形成电容器的方法包括在衬底上提供包含铝前体的反应物以将反应物的一部分化学吸附到衬底的表面。衬底具有包括下电极的底层结构。在基板上提供氨（NH 3 3）等离子体，以在包括下电极的基板上形成包括氮化铝的电介质层。在电介质层上形成上电极。第二电介质层可以设置在第一电介质层上。

5. 发明申请

US20050208718A1 Methods of forming a capacitor using an atomic layer deposition process 有权
标题翻译：使用原子层沉积工艺形成电容器的方法
公开(公告)号：US20050208718A1
公开(公告)日：2005-09-22
申请号：US11065086
申请日：2005-02-24
申请人： Jae-Soon Lim , Sung-Tae Kim , Young-Sun Kim , Young-Geun Park , Suk-Jin Chung , Seung-Hwan Lee
发明人： Jae-Soon Lim , Sung-Tae Kim , Young-Sun Kim , Young-Geun Park , Suk-Jin Chung , Seung-Hwan Lee
IPC分类号： H01L27/108 , H01L21/02 , H01L21/285 , H01L21/314 , H01L21/469 , H01L21/8242
CPC分类号： H01L21/0228 , H01L21/02175 , H01L21/02178 , H01L21/022 , H01L21/02274 , H01L21/28568 , H01L21/3141 , H01L27/10852 , H01L28/75 , H01L28/91
摘要： Methods for forming a capacitor using an atomic layer deposition process include providing a reactant including an aluminum precursor onto a substrate to chemisorb a portion of the reactant to a surface of the substrate. The substrate has an underlying structure including a lower electrode. An ammonia (NH3) plasma is provided onto the substrate to form a dielectric layer including aluminum nitride on the substrate including the lower electrode. An upper electrode is formed on the dielectric layer. A second dielectric layer may be provided oil the first dielectric layer
摘要翻译：使用原子层沉积工艺形成电容器的方法包括在衬底上提供包含铝前体的反应物以将反应物的一部分化学吸附到衬底的表面。衬底具有包括下电极的底层结构。在基板上提供氨（NH 3 3）等离子体，以在包括下电极的基板上形成包括氮化铝的电介质层。在电介质层上形成上电极。可以为第一介电层提供第二介电层油

6. 发明授权

US07271055B2 Methods of forming low leakage currents metal-insulator-metal (MIM) capacitors and related MIM capacitors 有权
标题翻译：形成低漏电流金属绝缘体金属（MIM）电容器和相关MIM电容器的方法
公开(公告)号：US07271055B2
公开(公告)日：2007-09-18
申请号：US11203347
申请日：2005-08-12
申请人： Kwang-Hee Lee , Jin-Yong Kim , Suk-Jin Chung , Kyu-Ho Cho , Han-Jin Lim , Jin-Il Lee , Ki-Chul Kim , Jae-Soon Lim
发明人： Kwang-Hee Lee , Jin-Yong Kim , Suk-Jin Chung , Kyu-Ho Cho , Han-Jin Lim , Jin-Il Lee , Ki-Chul Kim , Jae-Soon Lim
IPC分类号： H01L21/8242 , H01L29/94
CPC分类号： H01L21/022 , H01L21/02112 , H01L21/02172 , H01L21/31604 , H01L21/31645 , H01L27/0805 , H01L28/56 , H01L28/90
摘要： Methods of forming MIM comprise forming a lower electrode on a semiconductor substrate, forming a lower dielectric layer on the lower electrode, and forming an upper dielectric layer on the lower dielectric layer. The lower dielectric layer may be formed of dielectrics having larger energy band gap than that of the upper dielectric layer. An upper electrode is formed on the upper dielectric layer. The upper electrode may be formed of a metal layer having a higher work function than that of the lower electrode.
摘要翻译：形成MIM的方法包括在半导体衬底上形成下电极，在下电极上形成下电介质层，并在下电介质层上形成上电介质层。下部电介质层可以由具有比上部电介质层的能带隙大的电介质形成。在上电介质层上形成上电极。上部电极可以由具有比下部电极的功函数高的金属层形成。

7. 发明申请

US20060040457A1 Methods of forming low leakage currents metal-insulator-metal (MIM) capacitors and related MIM capacitors 有权
标题翻译：形成低漏电流金属绝缘体金属（MIM）电容器和相关MIM电容器的方法
公开(公告)号：US20060040457A1
公开(公告)日：2006-02-23
申请号：US11203347
申请日：2005-08-12
申请人： Kwang-Hee Lee , Jin-Yong Kim , Suk-Jin Chung , Kyu-Ho Cho , Han-Jin Lim , Jin-Il Lee , Ki-Chul Kim , Jae-Soon Lim
发明人： Kwang-Hee Lee , Jin-Yong Kim , Suk-Jin Chung , Kyu-Ho Cho , Han-Jin Lim , Jin-Il Lee , Ki-Chul Kim , Jae-Soon Lim
IPC分类号： H01L21/20 , H01L21/8242
CPC分类号： H01L21/022 , H01L21/02112 , H01L21/02172 , H01L21/31604 , H01L21/31645 , H01L27/0805 , H01L28/56 , H01L28/90
摘要： Methods of forming MIM comprise forming a lower electrode on a semiconductor substrate, forming a lower dielectric layer on the lower electrode, and forming an upper dielectric layer on the lower dielectric layer. The lower dielectric layer may be formed of dielectrics having larger energy band gap than that of the upper dielectric layer. An upper electrode is formed on the upper dielectric layer. The upper electrode may be formed of a metal layer having a higher work function than that of the lower electrode.
摘要翻译：形成MIM的方法包括在半导体衬底上形成下电极，在下电极上形成下电介质层，并在下电介质层上形成上电介质层。下部电介质层可以由具有比上部电介质层的能带隙大的电介质形成。在上电介质层上形成上电极。上部电极可以由具有比下部电极的功函数高的金属层形成。

8. 发明授权

US07416904B2 Method for forming dielectric layer of capacitor 失效
标题翻译：电容器介质层形成方法
公开(公告)号：US07416904B2
公开(公告)日：2008-08-26
申请号：US10293530
申请日：2002-11-12
申请人： Jae-Hyoung Choi , Cha-Young Yoo , Suk-Jin Chung , Wan-Don Kim
发明人： Jae-Hyoung Choi , Cha-Young Yoo , Suk-Jin Chung , Wan-Don Kim
IPC分类号： H01L21/00 , H01L21/8242 , H01L21/8222 , H01L21/20
CPC分类号： H01L21/02183 , H01L21/02271 , H01L21/02304 , H01L21/02356 , H01L21/31691 , H01L28/55
摘要： A fabrication method for forming a semiconductor device having a capacitor is provided. A capacitor dielectric layer is formed by depositing a first layer and a second layer. The second layer is a major portion of the capacitor dielectric layer. The first layer acts as a seed layer, while the second layer is expitaxially grown. The material of the second layer as deposited is partially crystal. Nuclear generation and crystal growth occur separately so that the crystalline characteristic of the capacitor dielectric layer and the capacitance characteristic of the capacitor are enhanced. Moreover, the capacitor dielectric layer is crystallized at a relatively low temperature or for a relatively short time, thereby reducing leakage current as well as reducing deformation in the lower electrode. Optionally, The material of the second layer as deposited is not partially crystal but amorphous.
摘要翻译：提供一种用于形成具有电容器的半导体器件的制造方法。通过沉积第一层和第二层形成电容器电介质层。第二层是电容器介电层的主要部分。第一层用作种子层，而第二层被外延生长。沉积的第二层的材料是部分晶体的。核生成和晶体生长分开发生，使得电容器介电层的晶体特性和电容器的电容特性得到增强。此外，电容器电介质层在相对较低的温度或相当短的时间内结晶，从而减少漏电流以及减小下电极的变形。任选地，沉积的第二层的材料不是部分晶体而是无定形的。

9. 发明授权

US08318560B2 Methods of forming integrated circuit devices including a capacitor 有权
标题翻译：形成包括电容器的集成电路器件的方法
公开(公告)号：US08318560B2
公开(公告)日：2012-11-27
申请号：US11680148
申请日：2007-02-28
申请人： Wan-Don Kim , Cha-Young Yoo , Suk-Jin Chung , Jin-Yong Kim
发明人： Wan-Don Kim , Cha-Young Yoo , Suk-Jin Chung , Jin-Yong Kim
IPC分类号： H01L21/8242
CPC分类号： H01L28/65 , H01L28/55 , H01L28/91
摘要： Methods of forming a capacitor of an integrated circuit device include forming a lower electrode of the capacitor on an integrated circuit substrate without exposing a contact plug to be coupled to the lower electrode. A supporting conductor is formed coupling the lower electrode to the contact plug after forming the lower electrode. A capacitor dielectric layer is formed on the lower electrode and an upper electrode of the capacitor is formed on the capacitor dielectric layer.
摘要翻译：形成集成电路器件的电容器的方法包括在集成电路衬底上形成电容器的下电极，而不会暴露要耦合到下电极的接触插头。在形成下电极之后，形成将下电极耦合到接触插塞的支撑导体。电容器电介质层形成在下电极上，电容器的上电极形成在电容器电介质层上。

10. 发明授权

US08264026B2 Nonvolatile memory devices and methods of manufacturing the same 失效
标题翻译：非易失存储器件及其制造方法
公开(公告)号：US08264026B2
公开(公告)日：2012-09-11
申请号：US12694655
申请日：2010-01-27
申请人： Sung-Hae Lee , Byong-Sun Ju , Suk-Jin Chung , Young-Sun Kim
发明人： Sung-Hae Lee , Byong-Sun Ju , Suk-Jin Chung , Young-Sun Kim
IPC分类号： H01L21/336 , H01L29/76
CPC分类号： H01L27/11521 , H01L21/28273 , H01L29/42324
摘要： Nonvolatile memory devices and related methods of manufacturing the same are provided. A nonvolatile memory device includes a tunneling layer on a substrate, a floating gate on the tunneling layer, an inter-gate dielectric layer structure on the floating gate, and a control gate on the inter-gate dielectric layer structure. The inter-gate dielectric layer structure includes a first silicon oxide layer, a high dielectric layer on the first silicon oxide layer, and a second silicon oxide layer on the high dielectric layer opposite to the first silicon oxide layer The high dielectric layer may include first and second high dielectric layers laminated on each other, and the first high dielectric layer may have a lower density of electron trap sites than the second high dielectric layer and may have a larger energy band gap or conduction band-offset than the second high dielectric layer.
摘要翻译：提供了非易失性存储器件及其制造方法。非易失性存储器件包括衬底上的隧道层，隧道层上的浮动栅极，浮置栅极上的栅极间电介质层结构以及栅极间电介质层结构上的控制栅极。栅极间电介质层结构包括第一氧化硅层，第一氧化硅层上的高电介质层和与第一氧化硅层相对的高电介质层上的第二氧化硅层。高电介质层可以包括第一氧化硅层和第二高介电层彼此层叠，并且第一高介电层可以具有比第二高介电层更低的电子陷阱位置密度，并且可以具有比第二高介电层更大的能带隙或导带偏移。

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