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1. 发明申请

US20170008914A1 LANTHANUM COMPOUND, METHOD OF SYNTHESIZING LANTHANUM COMPOUND, LANTHANUM PRECURSOR COMPOSITION, METHOD OF FORMING THIN FILM, AND METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE 审中-公开
标题翻译：兰化合物，合成化合物的方法，前驱体组合物，形成薄膜的方法和制造集成电路装置的方法
公开(公告)号：US20170008914A1
公开(公告)日：2017-01-12
申请号：US15092953
申请日：2016-04-07
申请人： Gyu-hee PARK , Youn-soo KIM , Jae-soon LIM , Youn-joung CHO , Haruyoshi SATO , Naoki YAMADA , Hiroyuki UCHIUZOU
发明人： Gyu-hee PARK , Youn-soo KIM , Jae-soon LIM , Youn-joung CHO , Haruyoshi SATO , Naoki YAMADA , Hiroyuki UCHIUZOU
IPC分类号： C07F5/00 , H05K3/14 , C07F7/20 , C09D5/24 , C07F7/10
CPC分类号： C07F7/10
摘要： A silicon-containing intermediate is synthesized by reacting a lanthanum tris[bis(trialkylsilyl)amide] complex with an alkylcyclopentadiene. A lanthanum compound is synthesized by reacting the silicon-containing intermediate with a dialkylamidine-based compound.
摘要翻译：通过使三[双（三烷基甲硅烷基）氨基]镧络合物与烷基环戊二烯反应合成含硅中间体。通过使含硅中间体与二烷基脒基化合物反应来合成镧化合物。

2. 发明授权

US09412583B2 Methods of forming dielectric layers and methods of manufacturing semiconductor devices using the same 有权
标题翻译：形成电介质层的方法和使用其制造半导体器件的方法
公开(公告)号：US09412583B2
公开(公告)日：2016-08-09
申请号：US13400952
申请日：2012-02-21
申请人： Sang-Yeol Kang , Suk-Jin Chung , Youn-Soo Kim , Jae-Hyoung Choi , Jae-Soon Lim , Min-Young Park
发明人： Sang-Yeol Kang , Suk-Jin Chung , Youn-Soo Kim , Jae-Hyoung Choi , Jae-Soon Lim , Min-Young Park
IPC分类号： H01L21/28 , H01L21/02 , H01L29/51 , H01L27/108 , H01L49/02 , H01L29/78
CPC分类号： H01L28/60 , H01L21/02178 , H01L21/02181 , H01L21/02189 , H01L21/02271 , H01L21/0228 , H01L21/28194 , H01L27/10808 , H01L27/10814 , H01L27/10855 , H01L28/40 , H01L29/517 , H01L29/78
摘要： To form a dielectric layer, an organometallic precursor is adsorbed on a substrate loaded into a process chamber. The organometallic precursor includes a central metal and ligands bound to the central metal. An inactive oxidant is provided onto the substrate. The inactive oxidant is reactive with the organometallic precursor. An active oxidant is also provided onto the substrate. The active oxidant has a higher reactivity than that of the inactive oxidant.
摘要翻译：为了形成电介质层，有机金属前体被吸附在装载到处理室中的基板上。有机金属前体包括中心金属和与中心金属结合的配体。在基材上提供无活性氧化剂。无活性氧化剂与有机金属前体反应。活性氧化剂也提供到基底上。活性氧化剂的反应活性高于非活性氧化剂。

3. 发明申请

US20110095397A1 Semiconductor Structures Including Dielectric Layers and Capacitors Including Semiconductor Structures 审中-公开
标题翻译：包括介质层的半导体结构和包括半导体结构的电容器
公开(公告)号：US20110095397A1
公开(公告)日：2011-04-28
申请号：US12909289
申请日：2010-10-21
申请人： Suk-jin Chung , Jae-hyoung Choi , Youn-soo Kim , Jae-soon Lim , Sang-yeol Kang
发明人： Suk-jin Chung , Jae-hyoung Choi , Youn-soo Kim , Jae-soon Lim , Sang-yeol Kang
IPC分类号： H01L29/92 , H01G4/30
CPC分类号： H01L27/10852 , H01L21/02175 , H01L21/02183 , H01L21/02304 , H01L21/02362 , H01L28/40
摘要： Semiconductor structures including a first conductive layer; a dielectric layer on the first conductive layer; a second conductive layer on the dielectric layer; and a crystallized seed layer in at least one of a first portion between the first conductive layer and the dielectric layer and a second portion between the dielectric layer and the second conductive layer. Related capacitors and methods are also provided herein.
摘要翻译：包括第一导电层的半导体结构; 第一导电层上的电介质层; 介电层上的第二导电层; 以及在所述第一导电层和所述电介质层之间的第一部分中的至少一个中的结晶晶种层和所述介电层和所述第二导电层之间的第二部分。本文还提供了相关的电容器和方法。

4. 发明授权

US07531861B2 Trench capacitors with insulating layer collars in undercut regions 失效
标题翻译：带有绝缘层的沟槽电容器在底切区域
公开(公告)号：US07531861B2
公开(公告)日：2009-05-12
申请号：US12033065
申请日：2008-02-19
申请人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
发明人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
IPC分类号： H01L29/94
CPC分类号： H01L27/10867 , H01L27/10829 , H01L27/1087 , H01L29/66181 , H01L29/945
摘要： Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.
摘要翻译：提供了在底切区域中具有绝缘层套环的沟槽电容器和制造这种沟槽电容器的方法。制造沟槽电容器的一些方法包括在衬底上形成第一层。在与衬底相对的第一层上形成第二层。形成在第一和第二层的顶部上具有开口的掩模。通过从掩模中的开口去除第一层和第二层的一部分来形成第一沟槽。除去第二层下面的第一层的一部分，以在第二层下形成底切区域。在第二层下方的底切区域中形成绝缘层套环。形成第二沟槽，其通过从掩模中的开口去除衬底的一部分而从第一沟槽延伸。掩埋板沿着第二沟槽形成在衬底中。介电层形成在第二沟槽的内壁和底部上。在电介质层上的第二沟槽中形成存储电极。

5. 发明授权

US07396719B2 Method of forming high dielectric film using atomic layer deposition and method of manufacturing capacitor having the high dielectric film 有权
标题翻译：使用原子层沉积形成高电介质膜的方法和制造具有高电介质膜的电容器的方法
公开(公告)号：US07396719B2
公开(公告)日：2008-07-08
申请号：US10873256
申请日：2004-06-23
申请人： Kyoung-seok Kim , Hong-bae Park , Bong-hyun Kim , Sung-tae Kim , Jong-wan Kwon , Jung-hyun Lee , Ki-chul Kim , Jae-soon Lim , Gab-jin Nam , Young-sun Kim
发明人： Kyoung-seok Kim , Hong-bae Park , Bong-hyun Kim , Sung-tae Kim , Jong-wan Kwon , Jung-hyun Lee , Ki-chul Kim , Jae-soon Lim , Gab-jin Nam , Young-sun Kim
IPC分类号： H01L21/471
CPC分类号： H01L21/0228 , C23C16/308 , C23C16/45531 , C23C16/56 , H01L21/02175 , H01L21/02181 , H01L21/02205 , H01L21/3141 , H01L21/3142 , H01L21/3143 , H01L21/31645
摘要： A method of forming a high dielectric film using atomic layer deposition (ALD), and a method of manufacturing a capacitor having the high dielectric film, include supplying a precursor containing a metal element to a semiconductor substrate and purging a reactor; supplying an oxidizer and purging the reactor; and supplying a reaction source containing nitrogen and purging the reactor.
摘要翻译：使用原子层沉积（ALD）形成高电介质膜的方法以及制造具有高电介质膜的电容器的方法包括将含有金属元素的前体供应到半导体衬底并清洗反应器; 供应氧化剂并清洗反应器; 并供应含氮的反应源并清洗反应器。

6. 发明申请

US20080135876A1 TRENCH CAPACITORS WITH INSULATING LAYER COLLARS IN UNDERCUT REGIONS 失效
标题翻译：在内陆地区具有绝缘层的TRENCH电容器
公开(公告)号：US20080135876A1
公开(公告)日：2008-06-12
申请号：US12033065
申请日：2008-02-19
申请人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
发明人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
IPC分类号： H01L29/94
CPC分类号： H01L27/10867 , H01L27/10829 , H01L27/1087 , H01L29/66181 , H01L29/945
摘要： Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.
摘要翻译：提供了在底切区域中具有绝缘层套环的沟槽电容器和制造这种沟槽电容器的方法。制造沟槽电容器的一些方法包括在衬底上形成第一层。在与衬底相对的第一层上形成第二层。形成在第一和第二层的顶部上具有开口的掩模。通过从掩模中的开口去除第一层和第二层的一部分来形成第一沟槽。除去第二层下面的第一层的一部分，以在第二层下形成底切区域。在第二层下方的底切区域中形成绝缘层套环。形成第二沟槽，其通过从掩模中的开口去除衬底的一部分而从第一沟槽延伸。掩埋板沿着第二沟槽形成在衬底中。介电层形成在第二沟槽的内壁和底部上。在电介质层上的第二沟槽中形成存储电极。

7. 发明授权

US07354821B2 Methods of fabricating trench capacitors with insulating layer collars in undercut regions 失效
标题翻译：在底切区域制造具有绝缘层环的沟槽电容器的方法
公开(公告)号：US07354821B2
公开(公告)日：2008-04-08
申请号：US11037626
申请日：2005-01-18
申请人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
发明人： Suk-jin Chung , Seung-hwan Lee , Sung-tae Kim , Young-sun Kim , Jae-soon Lim , Young-geun Park
IPC分类号： H01L21/8242 , H01L21/336
CPC分类号： H01L27/10867 , H01L27/10829 , H01L27/1087 , H01L29/66181 , H01L29/945
摘要： Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.
摘要翻译：提供了在底切区域中具有绝缘层套环的沟槽电容器和制造这种沟槽电容器的方法。制造沟槽电容器的一些方法包括在衬底上形成第一层。在与衬底相对的第一层上形成第二层。形成在第一和第二层的顶部上具有开口的掩模。通过从掩模中的开口去除第一层和第二层的一部分来形成第一沟槽。除去第二层下面的第一层的一部分，以在第二层下形成底切区域。在第二层下方的底切区域中形成绝缘层套环。形成第二沟槽，其通过从掩模中的开口去除衬底的一部分而从第一沟槽延伸。掩埋板沿着第二沟槽形成在衬底中。介电层形成在第二沟槽的内壁和底部上。在电介质层上的第二沟槽中形成存储电极。

8. 发明授权

US07135422B2 Methods of forming a multi-layered structure using an atomic layer deposition process and methods of forming a capacitor of an integrated circuit device 有权
标题翻译：使用原子层沉积工艺形成多层结构的方法以及形成集成电路器件的电容器的方法
公开(公告)号：US07135422B2
公开(公告)日：2006-11-14
申请号：US10884507
申请日：2004-07-02
申请人： Gab-Jin Nam , Jong-Wan Kwon , Han-Mei Choi , Jae-Soon Lim , Seung-Hwan Lee , Ki-Chul Kim , Sung-Tae Kim , Young-Sun Kim
发明人： Gab-Jin Nam , Jong-Wan Kwon , Han-Mei Choi , Jae-Soon Lim , Seung-Hwan Lee , Ki-Chul Kim , Sung-Tae Kim , Young-Sun Kim
IPC分类号： H01L21/31
CPC分类号： H01L21/0228 , C23C16/403 , C23C16/405 , C23C16/45529 , H01L21/02175 , H01L21/022 , H01L21/3141 , H01L21/31604 , H01L21/31616 , H01L21/31637 , H01L21/31645 , H01L28/40 , H01L28/90
摘要： Multi-layered structures formed using atomic-layer deposition processes include multiple metal oxide layers wherein the metal oxide layers are formed without the presence of interlayer oxide layers and may include different metal oxide compositions.
摘要翻译：使用原子层沉积工艺形成的多层结构包括多个金属氧化物层，其中形成金属氧化物层而不存在层间氧化物层，并且可以包括不同的金属氧化物组合物。

9. 发明授权

US08859383B2 Method of fabricating semiconductor device having dielectric layer with improved electrical characteristics 有权
标题翻译：制造具有改善的电特性的具有电介质层的半导体器件的方法
公开(公告)号：US08859383B2
公开(公告)日：2014-10-14
申请号：US13424825
申请日：2012-03-20
申请人： Youn-soo Kim , Jae-hyoung Choi , Kyu-ho Cho , Wan-don Kim , Jae-soon Lim , Sang-yeol Kang
发明人： Youn-soo Kim , Jae-hyoung Choi , Kyu-ho Cho , Wan-don Kim , Jae-soon Lim , Sang-yeol Kang
IPC分类号： H01L21/20 , H01L49/02 , H01L21/02 , H01L21/316 , H01L21/318 , H01L27/108
CPC分类号： H01L28/56 , H01L21/02189 , H01L21/022 , H01L21/02244 , H01L21/02247 , H01L21/31683 , H01L21/318 , H01L27/1085 , H01L28/40 , H01L28/75
摘要： A semiconductor device having a dielectric layer with improved electrical characteristics and associated methods, the semiconductor device including a lower metal layer, a dielectric layer, and an upper metal layer sequentially disposed on a semiconductor substrate and an insertion layer disposed between the dielectric layer and at least one of the lower metal layer and the upper metal layer, wherein the dielectric layer includes a metal oxide film and the insertion layer includes a metallic material film.
摘要翻译：一种半导体器件，具有具有改善的电特性和相关方法的电介质层，所述半导体器件包括顺序地设置在半导体衬底上的下金属层，电介质层和上金属层，以及设置在电介质层之间的插入层下金属层和上金属层中的至少一个，其中电介质层包括金属氧化物膜，并且插入层包括金属材料膜。

10. 发明申请

US20130244445A1 Method of Fabricating Semiconductor Device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20130244445A1
公开(公告)日：2013-09-19
申请号：US13775595
申请日：2013-02-25
申请人： Min-Young Park , Youn-Soo Kim , Sang-Yeol Kang , Cha-Young Yoo , Jae-Soon Lim , Jae-Hyoung Choi
发明人： Min-Young Park , Youn-Soo Kim , Sang-Yeol Kang , Cha-Young Yoo , Jae-Soon Lim , Jae-Hyoung Choi
IPC分类号： H01L21/02
CPC分类号： H01L21/02104 , C23C16/045 , C23C16/405 , C23C16/45527 , H01L21/28282 , H01L28/40
摘要： Methods of fabricating a semiconductor device include forming a deposited film on a semiconductor substrate in a process chamber by repeatedly forming unit layers on the semiconductor substrate. The unit layer is formed by forming a preliminary unit layer on the semiconductor substrate by supplying a process material including a precursor material and film-control material into the process chamber, purging the process chamber, forming a unit layer from the preliminary unit layer, and again purging the process chamber. The precursor material includes a central atom and a ligand bonded to the central atom, and the film-control material includes a hydride of the ligand.
摘要翻译：制造半导体器件的方法包括通过在半导体衬底上重复形成单位层，在处理室中的半导体衬底上形成沉积膜。单元层通过在半导体基板上形成预备单元层而形成，该方法是将包括前体材料和薄膜控制材料的处理材料供应到处理室中，从处理室中清除处理室，从预备单元层形成单位层，以及再次清洗处理室。前体材料包括中心原子和与中心原子键合的配体，膜控制材料包括配体的氢化物。

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