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1. 发明申请

US20130056769A1 LIGHT EMITTING DIODE MODULE AND DISPLAY DEVICE USING THE SAME LIGHT EMITTING DIODE MODULE 有权
标题翻译：使用相同的发光二极管模块的发光二极管模块和显示装置
公开(公告)号：US20130056769A1
公开(公告)日：2013-03-07
申请号：US13438066
申请日：2012-04-03
申请人： Sheng-Wen CHEN , Wen-Kuei Liu , Yu-Min Hung , Tsai-Fen Lee , Yung-Hsiang Tsao
发明人： Sheng-Wen CHEN , Wen-Kuei Liu , Yu-Min Hung , Tsai-Fen Lee , Yung-Hsiang Tsao
IPC分类号： H01L33/08
CPC分类号： H05K1/0259 , G02F2001/133612 , G02F2201/50 , H01R13/6485 , H01R13/6599 , H05K1/05 , H05K2201/09781 , H05K2201/10106 , H05K2201/10189
摘要： A light emitting diode (LED) module and a display device adopting the same LED module are provided. The LED module includes a circuit substrate, a LED chip, a connector and a conductive line. The LED chip has at least three pins, and the LED chip is fixed on the circuit substrate through the pins, wherein one of the pins is defined as a no connection (NC) pin. The connector includes a non-conductive housing, at least one fixing pin and a conductor. The fixing pin is connected to the non-conductive housing, and the non-conductive housing is fixed on the circuit substrate through the said at least one fixing pin. A part of the non-conductive housing is covered with the conductor. The conductive line is disposed on the circuit substrate and is electrically connected between the conductor and the NC pin.
摘要翻译：提供了一种发光二极管（LED）模块和采用相同LED模块的显示装置。 LED模块包括电路基板，LED芯片，连接器和导线。 LED芯片具有至少三个引脚，并且LED芯片通过引脚固定在电路基板上，其中一个引脚被定义为无连接（NC）引脚。连接器包括非导电壳体，至少一个固定销和导体。固定销连接到非导电壳体，并且非导电壳体通过所述至少一个固定销固定在电路基板上。非导电壳体的一部分被导体覆盖。导线设置在电路基板上，电连接在导体和NC引脚之间。

2. 发明申请

US20110006354A1 METAL GATE STRUCTURE OF A SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的金属门结构
公开(公告)号：US20110006354A1
公开(公告)日：2011-01-13
申请号：US12754761
申请日：2010-04-06
申请人： Shiu-Ko JANGJIAN , Szu-An WU , Sheng-Wen CHEN
发明人： Shiu-Ko JANGJIAN , Szu-An WU , Sheng-Wen CHEN
IPC分类号： H01L29/78 , H01L29/49 , H01L21/28
CPC分类号： H01L29/66545 , H01L29/4966 , H01L29/517 , H01L29/66583 , H01L29/7833
摘要： A semiconductor device structure, for improving the metal gate leakage within the semiconductor device. A structure for a metal gate electrode for a n-type Field Effect Transistor includes a capping layer; a first metal layer comprising Ti and Al over the capping layer; a metal oxide layer over the first metal layer; a barrier layer over the metal oxide layer; and a second metal layer over the barrier layer.
摘要翻译：一种用于改善半导体器件内的金属栅极泄漏的半导体器件结构。用于n型场效应晶体管的金属栅电极的结构包括封盖层; 在覆盖层上包含Ti和Al的第一金属层; 第一金属层上的金属氧化物层; 金属氧化物层上的阻挡层; 和阻挡层上的第二金属层。

3. 发明申请

US20090065905A1 Conductive metal structure applied to a module IC and method of manufacturing the same 审中-公开
标题翻译：应用于模块IC的导电金属结构及其制造方法
公开(公告)号：US20090065905A1
公开(公告)日：2009-03-12
申请号：US12076966
申请日：2008-03-26
申请人： Chung-Er Huang , Shih-Meng Luo , Sheng-Wen Chen
发明人： Chung-Er Huang , Shih-Meng Luo , Sheng-Wen Chen
IPC分类号： H01L23/488 , H01L21/44
CPC分类号： H01L24/94 , H01L23/481 , H01L24/11 , H01L24/12 , H01L2224/0231 , H01L2224/0401 , H01L2224/13099 , H01L2224/274 , H01L2924/01033 , H01L2924/01087 , H01L2924/014 , H01L2924/14
摘要： A conductive metal structure applied to a module IC includes a wafer, a first insulating unit, and a first conductive unit. The wafer has a main body and a through hole passing through the main body. The first insulating unit has a first inner insulating layer formed on an inner surface of the through hole and a first outer insulating layer that is extended from the first inner insulating layer and is formed on a first bottom surface of the main body. The first conductive unit has a first inner conductive layer formed on the first inner insulating layer and at least one first conductive pad formed on the first outer insulating layer. The present invention integrates semiconductor technologies of etching and deposition and combines them with the development of the module IC in order to provide a conductive metal structure that has lower cost and is manufactured easily.
摘要翻译：施加到模块IC的导电金属结构包括晶片，第一绝缘单元和第一导电单元。晶片具有穿过主体的主体和通孔。第一绝缘单元具有形成在通孔的内表面上的第一内绝缘层和从第一内绝缘层延伸并形成在主体的第一底表面上的第一外绝缘层。第一导电单元具有形成在第一内部绝缘层上的第一内部导电层和形成在第一外部绝缘层上的至少一个第一导电焊盘。本发明集成了蚀刻和沉积的半导体技术，并且将它们与模块IC的开发相结合，以提供具有较低成本且容易制造的导电金属结构。

4. 发明申请

US20080061343A1 Metal-oxide-metal structure with improved capacitive coupling area 审中-公开
标题翻译：具有改善电容耦合面积的金属氧化物 - 金属结构
公开(公告)号：US20080061343A1
公开(公告)日：2008-03-13
申请号：US11518470
申请日：2006-09-08
申请人： Chin Kun Lan , Sheng-Wen Chen , Hung Jui Chang , Yu-Ku Lin , Ying-Lang Wang
发明人： Chin Kun Lan , Sheng-Wen Chen , Hung Jui Chang , Yu-Ku Lin , Ying-Lang Wang
IPC分类号： H01L29/94
CPC分类号： H01L23/5223 , H01L28/60 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A stacked metal-oxide-metal (MOM) capacitor structure and method of forming the same to increase an electrode/capacitor dielectric coupling area to increase a capacitance, the MOM capacitor structure including a plurality of metallization layers in stacked relationship; wherein each metallization layer includes substantially parallel spaced apart conductive electrode line portions having a first intervening capacitor dielectric; and, wherein the conductive electrode line portions are electrically interconnected between metallization layers by conductive damascene line portions formed in a second capacitor dielectric and disposed underlying the conductive electrode line portions.
摘要翻译：一种堆叠的金属氧化物金属（MOM）电容器结构及其形成方法，以增加电极/电容器介质耦合面积以增加电容，所述MOM电容器结构包括堆叠关系的多个金属化层; 其中每个金属化层包括具有第一中间电容器电介质的基本上平行的隔开的导电电极线部分; 并且其中所述导电电极线部分通过形成在第二电容器电介质中并设置在所述导电电极线部分下方的导电镶嵌线部分在金属化层之间电互连。

5. 发明授权

US07319284B2 Surface acoustic wave device and method for fabricating the same 有权
标题翻译：表面声波装置及其制造方法
公开(公告)号：US07319284B2
公开(公告)日：2008-01-15
申请号：US11219459
申请日：2005-09-02
申请人： Jyh-Shin Chen , Sheng-Wen Chen , Hui-Ling Kao , Yu-Sheng Kung , Yu-Hsin Lin , Yi-Chiuen Hu
发明人： Jyh-Shin Chen , Sheng-Wen Chen , Hui-Ling Kao , Yu-Sheng Kung , Yu-Hsin Lin , Yi-Chiuen Hu
IPC分类号： H01L41/083
CPC分类号： H03H9/02622 , H03H3/08 , Y10T29/42 , Y10T29/49155
摘要： A novel surface acoustic wave device with a decreased velocity dispersion and a low insertion loss as well as the fabrication method therefor is provided. The surface acoustic wave device includes a substrate, an insulating layer with an indentation on the substrate, a silicon layer with a first portion on the insulating layer and a second portion suspended above the indentation, a piezoelectric layer on the first and the second portions of the silicon layer, and at least an electrode on the piezoelectric layer.
摘要翻译：提供了具有降低的速度分散和低插入损耗的新型表面声波器件及其制造方法。表面声波装置包括基板，在基板上具有凹陷的绝缘层，在绝缘层上具有第一部分的硅层和悬挂在凹槽上方的第二部分，在第一和第二部分上的压电层硅层，以及压电层上的至少一个电极。

6. 发明申请

US20070052324A1 Surface acoustic wave device and method for fabricating the same 有权
标题翻译：表面声波装置及其制造方法
公开(公告)号：US20070052324A1
公开(公告)日：2007-03-08
申请号：US11219459
申请日：2005-09-02
申请人： Jyh-Shin Chen , Sheng-Wen Chen , Hui-Ling Kao , Yu-Sheng Kung , Yu-Hsin Lin , Yi-Chiuen Hu
发明人： Jyh-Shin Chen , Sheng-Wen Chen , Hui-Ling Kao , Yu-Sheng Kung , Yu-Hsin Lin , Yi-Chiuen Hu
IPC分类号： H03H9/25
CPC分类号： H03H9/02622 , H03H3/08 , Y10T29/42 , Y10T29/49155
摘要： A novel surface acoustic wave device with a decreased velocity dispersion and a low insertion loss as well as the fabrication method therefor is provided. The surface acoustic wave device includes a substrate, an insulating layer with an indentation on the substrate, a silicon layer with a first portion on the insulating layer and a second portion suspended above the indentation, a piezoelectric layer on the first and the second portions of the silicon layer, and at least an electrode on the piezoelectric layer.
摘要翻译：提供了具有降低的速度分散和低插入损耗的新型表面声波器件及其制造方法。表面声波装置包括基板，在基板上具有凹陷的绝缘层，在绝缘层上具有第一部分的硅层和悬挂在凹槽上方的第二部分，在第一和第二部分上的压电层硅层，以及压电层上的至少一个电极。

7. 发明申请

US20050133059A1 Method for cleaning a plasma enhanced CVD chamber 有权
标题翻译：清洁等离子体增强CVD室的方法
公开(公告)号：US20050133059A1
公开(公告)日：2005-06-23
申请号：US10738740
申请日：2003-12-17
申请人： Sheng-Wen Chen , Shiu-Ko Jangjian , Hung-Jui Chang , Ying-Lang Wang
发明人： Sheng-Wen Chen , Shiu-Ko Jangjian , Hung-Jui Chang , Ying-Lang Wang
IPC分类号： B08B6/00 , B08B7/00 , C23C16/44 , H01L21/00 , H01L21/30 , H01L21/3065
CPC分类号： C23C16/4405 , B08B7/00 , H01L21/67069 , Y10S134/902 , Y10S438/905
摘要： A method for plasma cleaning a CVD reactor chamber including providing a plasma enhanced CVD reactor chamber comprising residual deposited material; performing a first plasma process comprising an oxygen containing plasma; performing a second plasma process comprising an argon containing plasma; and, performing a third plasma process comprising a fluorine containing plasma.
摘要翻译：一种用于等离子体清洗CVD反应器室的方法，包括提供包含残余沉积材料的等离子体增强CVD反应器室; 执行包含含氧等离子体的第一等离子体工艺; 执行包括含氩等离子体的第二等离子体工艺; 以及执行包括含氟等离子体的第三等离子体工艺。

8. 发明授权

US08882296B2 Light emitting diode module and display device using the same light emitting diode module 有权
标题翻译：发光二极管模块和显示装置使用相同的发光二极管模块
公开(公告)号：US08882296B2
公开(公告)日：2014-11-11
申请号：US13438066
申请日：2012-04-03
申请人： Sheng-Wen Chen , Wen-Kuei Liu , Yu-Min Hung , Tsai-Fen Lee , Yung-Hsiang Tsao
发明人： Sheng-Wen Chen , Wen-Kuei Liu , Yu-Min Hung , Tsai-Fen Lee , Yung-Hsiang Tsao
IPC分类号： F21V21/002
CPC分类号： H05K1/0259 , G02F2001/133612 , G02F2201/50 , H01R13/6485 , H01R13/6599 , H05K1/05 , H05K2201/09781 , H05K2201/10106 , H05K2201/10189
摘要： A light emitting diode (LED) module and a display device adopting the same LED module are provided. The LED module includes a circuit substrate, a LED chip, a connector and a conductive line. The LED chip has at least three pins, and the LED chip is fixed on the circuit substrate through the pins, wherein one of the pins is defined as a no connection (NC) pin. The connector includes a non-conductive housing, at least one fixing pin and a conductor. The fixing pin is connected to the non-conductive housing, and the non-conductive housing is fixed on the circuit substrate through the said at least one fixing pin. A part of the non-conductive housing is covered with the conductor. The conductive line is disposed on the circuit substrate and is electrically connected between the conductor and the NC pin.
摘要翻译：提供了一种发光二极管（LED）模块和采用相同LED模块的显示装置。 LED模块包括电路基板，LED芯片，连接器和导线。 LED芯片具有至少三个引脚，并且LED芯片通过引脚固定在电路基板上，其中一个引脚被定义为无连接（NC）引脚。连接器包括非导电壳体，至少一个固定销和导体。固定销连接到非导电壳体，并且非导电壳体通过所述至少一个固定销固定在电路基板上。非导电壳体的一部分被导体覆盖。导线设置在电路基板上，电连接在导体和NC引脚之间。

9. 发明申请

US20130207213A1 Grids in Backside Illumination Image Sensor Chips and Methods for Forming the Same 有权
标题翻译：网格背面照明图像传感器芯片及其形成方法
公开(公告)号：US20130207213A1
公开(公告)日：2013-08-15
申请号：US13396426
申请日：2012-02-14
申请人： Shiu-Ko JangJian , Szu-An Wu , Sheng-Wen Chen
发明人： Shiu-Ko JangJian , Szu-An Wu , Sheng-Wen Chen
IPC分类号： H01L31/0232 , H01L31/18
CPC分类号： H01L27/1446 , H01L27/14632 , H01L27/1464 , H01L27/14685 , H01L27/14687 , H01L27/14689
摘要： A device includes a semiconductor substrate, which has a front side and a backside. A photo-sensitive device is disposed on the front side of the semiconductor substrate. A first and a second grid line are parallel to each other, and are disposed on the backside of, and overlying, the semiconductor substrate. A stacked layer includes an adhesion layer, a metal layer over the adhesion layer, and a high-refractive index layer over the metal layer. The adhesion layer, the metal layer, and the high-refractive index layer are substantially conformal, and extend on top surfaces and sidewalls of the first and the second grid lines.
摘要翻译：一种器件包括具有正面和背面的半导体衬底。光敏装置设置在半导体基板的正面上。第一和第二栅极线彼此平行，并且设置在半导体衬底的背面并且覆盖其上。堆叠层包括粘合层，粘合层上的金属层和金属层上的高折射率层。粘合层，金属层和高折射率层基本上共形，并且在第一和第二栅格线的顶表面和侧壁上延伸。

10. 发明申请

US20130121020A1 BACK-LIGHT MODULE 有权
标题翻译：背光模组
公开(公告)号：US20130121020A1
公开(公告)日：2013-05-16
申请号：US13353325
申请日：2012-01-19
申请人： Wen-Kuei Liu , Sheng-Wen Chen
发明人： Wen-Kuei Liu , Sheng-Wen Chen
IPC分类号： F21V7/04 , F21V8/00
CPC分类号： G02B6/0021 , G02B6/0018 , G02B6/0068
摘要： A back-light module including a light guide plate (LGP), first light-emitting devices, and second light-emitting devices is provided. The LGP has a top-emitting surface, a bottom surface and a side surface. The LGP has at least one indentation. The indentation has a first light-incident sidewall and a pair of second light-incident sidewalls. The second light-incident sidewalls are located on two sides of the first light-incident sidewall and adjacent to the first light-incident sidewall. Normal vectors of the second light-incident sidewalls and the first light-incident sidewall are not parallel. The first light-emitting devices are located in the indentation, and a first light beam propagating toward the first light-incident sidewall is emitted from each of the first light-emitting devices. The second light-emitting devices are located in the indentation, and a second light beam propagating toward one of the second light-incident sidewalls is emitted from each of the second light-emitting devices.
摘要翻译：提供了包括导光板（LGP），第一发光器件和第二发光器件的背光模块。 LGP具有顶部发射表面，底表面和侧表面。 LGP至少有一个缩进。凹陷具有第一光入射侧壁和一对第二光入射侧壁。第二光入射侧壁位于第一光入射侧壁的两侧并与第一光入射侧壁相邻。第二光入射侧壁和第一光入射侧壁的法线矢量不平行。第一发光装置位于凹陷中，并且朝向第一入光侧壁传播的第一光束从每个第一发光装置发射。第二发光器件位于压痕中，并且从第二发光器件的每一个发射朝向第二光入射侧壁中的一个传播的第二光束。

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