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    • 2. 发明授权
    • Method for fabricating fine pattern in semiconductor device
    • 在半导体器件中制造精细图案的方法
    • US07494599B2
    • 2009-02-24
    • US11742288
    • 2007-04-30
    • Sung-Kwon LeeSeung-Chan MoonWon-Kyu Kim
    • Sung-Kwon LeeSeung-Chan MoonWon-Kyu Kim
    • B44C1/22
    • H01L21/0332Y10T428/2826
    • A method for forming a fine pattern in a semiconductor device includes forming a first polymer layer over an etch target layer, the first polymer layer including a carbon-rich polymer layer, forming a second polymer layer over the first polymer layer, the second polymer layer including a silicon-rich polymer layer, patterning the second polymer layer, oxidizing surfaces of the patterned second polymer layer, etching the first polymer layer using the patterned second polymer layer comprising the oxidized surfaces, and etching the etch target layer using the patterned second polymer layer comprising the oxidized surfaces and the etched first polymer layer.
    • 在半导体器件中形成精细图案的方法包括在蚀刻目标层上形成第一聚合物层,第一聚合物层包括富碳聚合物层,在第一聚合物层上形成第二聚合物层,第二聚合物层 包括富含硅的聚合物层,图案化第二聚合物层,氧化图案化的第二聚合物层的表面,使用包含氧化表面的图案化的第二聚合物层蚀刻第一聚合物层,以及使用图案化的第二聚合物 层,其包含氧化表面和蚀刻的第一聚合物层。
    • 6. 发明授权
    • Light exposure mask for semiconductor devices
    • 半导体器件的曝光掩模
    • US5650250A
    • 1997-07-22
    • US569508
    • 1995-12-08
    • Seung Chan Moon
    • Seung Chan Moon
    • G03F1/00G03F7/20G03F9/00
    • G03F7/70125G03F7/70433
    • A light exposure mask for a semiconductor device having different line/space pattern widths at different mask portions in such a manner that its repeated patterns disposed at the central mask portion corresponding to the memory region of the semiconductor device have a minimum line/space width whereas those disposed at the peripheral mask portion have a line/space width larger than the minimum width, such that its non-uniform patterns disposed at the peripheral mask portion have a space width larger than the minimum width, and such that its independent pattern has a line width larger than the minimum width. With such line/space pattern widths, the light exposure mask is capable of preventing a short circuit caused by the residue of a photoresist film material after a light exposure according to the modified illumination method or caused by an excessive light exposure, forming a precise micro pattern, increasing the process redundancy, and thereby achieving an improvement in process yield and operation reliance.
    • 一种用于半导体器件的曝光掩模,其在不同掩模部分处具有不同的线/空间图案宽度,使得其布置在对应于半导体器件的存储区域的中心掩模部分处的重复图案具有最小线/空间宽度, 设置在周边掩模部分的那些具有大于最小宽度的线/空间宽度,使得其设置在周边掩模部分处的不均匀图案具有大于最小宽度的空间宽度,并且使得其独立图案具有 线宽大于最小宽度。 利用这种线/空间图案宽度,曝光掩模能够根据改进的照明方法防止光曝光后的光致抗蚀剂材料的残留导致的短路或者由于过度的曝光引起的短路,形成精确的微观 模式,增加过程冗余度,从而实现过程产量和操作依赖性的提高。