会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 4. 发明申请
    • Cylinder-Type Capacitor and Storage Device, and Method(s) for Fabricating the Same
    • 圆筒型电容器和存储装置及其制造方法
    • US20080283892A1
    • 2008-11-20
    • US12168731
    • 2008-07-07
    • Jae Hyun KANG
    • Jae Hyun KANG
    • H01L29/94H01L21/8242
    • H01L28/91G03F1/32H01L27/10817H01L27/10852
    • A one cylinder storage device and a method for fabricating a capacitor are disclosed, realizing simplified fabrication by overexposure with a mask having a plurality of holes, in which the method includes forming a contact hole in an insulating layer on a semiconductor substrate; forming a conductive layer on the insulating layer to fill the contact hole; forming a photoresist layer on the conductive layer; forming a photoresist layer pattern by overexposure and generating a side lobe phenomenon; forming a cylindrical lower electrode by patterning the conductive layer using the photoresist layer pattern as a mask; and forming a dielectric layer and an upper electrode covering the lower electrode.
    • 公开了一种单缸存储装置和电容器的制造方法,其特征在于,利用具有多个孔的掩模实现了曝光过程的简化制造,其中该方法包括在半导体基板上的绝缘层中形成接触孔; 在所述绝缘层上形成导电层以填充所述接触孔; 在导电层上形成光致抗蚀剂层; 通过过度曝光形成光致抗蚀剂层图案并产生旁瓣现象; 通过使用光致抗蚀剂层图案作为掩模对导电层进行图案化来形成圆柱形下电极; 以及形成覆盖下电极的电介质层和上电极。
    • 5. 发明申请
    • Dual damascene process and method for forming a copper interconnection layer using same
    • 双镶嵌工艺和使用其形成铜互连层的方法
    • US20070134911A1
    • 2007-06-14
    • US11634308
    • 2006-12-06
    • Jae-Hyun Kang
    • Jae-Hyun Kang
    • H01L21/4763
    • H01L21/76811H01L21/31144
    • A method for forming a copper interconnection using a dual damascene process includes forming a second insulating layer on a first insulating layer, the first insulating layer including a lower metal interconnection layer formed therein; forming a photoresist film pattern on the second insulating layer; forming a dry film resist film pattern on the photoresist film pattern; forming a via hole and a trench in the second insulator layer to expose a portion of the lower metal interconnection layer by etching the second insulating layer using the dry film resist film pattern and the photoresist film pattern as an etching mask; removing the DFR film pattern and the photoresist film pattern; forming a copper layer to fill the via hole and the trench; and planarizing the copper layer to form a copper interconnection layer. Planarizing the copper layer is performed using a chemical mechanical polishing method.
    • 使用双镶嵌工艺形成铜互连的方法包括在第一绝缘层上形成第二绝缘层,所述第一绝缘层包括在其中形成的下金属互连层; 在所述第二绝缘层上形成光致抗蚀剂图案; 在光致抗蚀剂膜图案上形成干膜抗蚀剂膜图案; 在第二绝缘体层中形成通孔和沟槽,通过使用干膜抗蚀剂膜图案和光致抗蚀剂膜图案作为蚀刻掩模蚀刻第二绝缘层来暴露下部金属互连层的一部分; 去除DFR膜图案和光刻胶膜图案; 形成铜层以填充通孔和沟槽; 并平坦化铜层以形成铜互连层。 使用化学机械研磨法进行铜层的平坦化处理。
    • 9. 发明授权
    • Cylinder-type capacitor and storage device, and method(s) for fabricating the same
    • 圆筒型电容器和存储装置及其制造方法
    • US07402486B2
    • 2008-07-22
    • US11322882
    • 2005-12-29
    • Jae Hyun Kang
    • Jae Hyun Kang
    • H01L21/8234H01L21/8244H01L21/8242
    • H01L28/91G03F1/32H01L27/10817H01L27/10852
    • A one cylinder storage device and a method for fabricating a capacitor are disclosed, realizing simplified fabrication by overexposure with a mask having a plurality of holes, in which the method includes forming a contact hole in an insulating layer on a semiconductor substrate; forming a conductive layer on the insulating layer to fill the contact hole; forming a photoresist layer on the conductive layer; forming a photoresist layer pattern by overexposure and generating a side lobe phenomenon; forming a cylindrical lower electrode by patterning the conductive layer using the photoresist layer pattern as a mask; and forming a dielectric layer and an upper electrode covering the lower electrode.
    • 公开了一种单缸存储装置和制造电容器的方法,通过具有多个孔的掩模实现过度曝光的简化制造,其中该方法包括在半导体衬底上的绝缘层中形成接触孔; 在所述绝缘层上形成导电层以填充所述接触孔; 在导电层上形成光致抗蚀剂层; 通过过度曝光形成光致抗蚀剂层图案并产生旁瓣现象; 通过使用光致抗蚀剂层图案作为掩模对导电层进行图案化来形成圆柱形下电极; 以及形成覆盖下电极的电介质层和上电极。