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1. 发明授权

US08134232B2 Heat dissipation for integrated circuit 有权
标题翻译：集成电路散热
公开(公告)号：US08134232B2
公开(公告)日：2012-03-13
申请号：US12061728
申请日：2008-04-03
申请人： Mitchel E. Lohr , Qwai H. Low
发明人： Mitchel E. Lohr , Qwai H. Low
IPC分类号： H01L23/34
CPC分类号： H01L23/4334 , H01L23/3677 , H01L2924/0002 , H01L2924/00
摘要： A packaged integrated circuit having a thermal pathway to exhaust heat from the integrated circuit. The integrated circuit is disposed on a package substrate, with an encapsulant disposed around the integrated circuit. A heat sink is disposed at least partially within the encapsulant, with at least a portion of one surface of the heat sink exposed outside of the encapsulant. The integrated circuit has an uppermost passivation layer, where the passivation layer is not electrically conductive, with a port disposed in the passivation layer. The port extends completely through the passivation layer to expose an underlying layer. A thermal pathway is disposed at least partially within the port, and makes thermal contact to both the underlying layer and the heat sink. The thermal transfer rate of the thermal pathway is greater than the thermal transfer rate either the passivation layer or the encapsulant.
摘要翻译：一种具有从该集成电路排出热量的热路径的封装集成电路。集成电路设置在封装基板上，封装件设置在集成电路周围。散热器至少部分地设置在密封剂内，散热器的一个表面的至少一部分暴露在密封剂外部。集成电路具有最上面的钝化层，其中钝化层不导电，其中端口设置在钝化层中。端口完全延伸穿过钝化层以暴露下层。热路径至少部分地设置在端口内，并且与下面的层和散热器进行热接触。热路径的热传递速率大于钝化层或密封剂的热传递速率。

2. 发明授权

US08125091B2 Wire bonding over active circuits 有权
标题翻译：有源电路引线键合
公开(公告)号：US08125091B2
公开(公告)日：2012-02-28
申请号：US12331561
申请日：2008-12-10
申请人： Qwai H. Low
发明人： Qwai H. Low
IPC分类号： H01L23/12 , H01L21/44
CPC分类号： H01L24/05 , H01L23/49811 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05124 , H01L2224/05147 , H01L2224/05557 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/13144 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45169 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/48482 , H01L2224/48499 , H01L2224/48624 , H01L2224/48644 , H01L2224/48647 , H01L2224/48655 , H01L2224/48664 , H01L2224/48724 , H01L2224/48744 , H01L2224/48747 , H01L2224/48755 , H01L2224/48764 , H01L2224/48844 , H01L2224/48847 , H01L2224/48855 , H01L2224/48864 , H01L2224/4945 , H01L2224/85051 , H01L2224/85191 , H01L2224/85205 , H01L2224/85444 , H01L2224/85447 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/01327 , H01L2924/14 , H01L2224/78 , H01L2924/00 , H01L2224/48824 , H01L2924/013
摘要： A semiconductor device includes a semiconductor die mounted over a package substrate. The die has a bond pad located thereover. A stud bump consisting substantially of a first metal is located on the bond pad. A wire consisting substantially of a different second metal is bonded to the stud bump.
摘要翻译：半导体器件包括安装在封装衬底上的半导体管芯。该模具具有位于其上的接合垫。基本上由第一金属组成的柱形凸块位于接合垫上。基本上由不同的第二金属组成的导线被接合到柱形凸块。

3. 发明授权

US06781150B2 Test structure for detecting bonding-induced cracks 有权
标题翻译：用于检测接合引起的裂纹的测试结构
公开(公告)号：US06781150B2
公开(公告)日：2004-08-24
申请号：US10229601
申请日：2002-08-28
申请人： Qwai H. Low , Ramaswamy Ranganathan , Anwar Ali , Tauman T. Lau
发明人： Qwai H. Low , Ramaswamy Ranganathan , Anwar Ali , Tauman T. Lau
IPC分类号： H01L2358
CPC分类号： H01L24/05 , H01L22/34 , H01L24/48 , H01L2224/04042 , H01L2224/05001 , H01L2224/05073 , H01L2224/05093 , H01L2224/05095 , H01L2224/05624 , H01L2224/48463 , H01L2224/85399 , H01L2924/00014 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/14 , H01L2224/45099 , H01L2924/00
摘要： An integrated circuit having a crack detection structure. A control structure is formed having interleaved electrically conductive layers and non electrically conductive layers in a vertical orientation. Electrically conductive vias are disposed vertically through all of the non electrically conductive layers, which vias electrically connect all of the electrically conductive layers one to another. A test structure is formed having a bonding pad for probing and bonding, with underlying interleaved electrically conductive layers and non electrically conductive layers disposed in a vertical orientation. At least one of the non electrically conductive layers has no vias formed therein, simulating active circuitry under other bonding pads of the integrated circuit. At least one of the interleaved electrically conductive layers of the control structure extends from within the control structure to within the test structure as a sensing layer. The sensing layer immediately underlies the at least one of the non electrically conductive layers in the test structure that has no vias formed therein. Thus, a crack in the at least one of the non electrically conductive layers in the test structure that has no vias formed therein is detectable as a leakage current between the bonding pad of the test structure and a top most electrically conductive layer of the control structure.
摘要翻译：具有裂纹检测结构的集成电路。形成具有垂直取向的交错导电层和非导电层的控制结构。导电通孔垂直地设置在所有非导电层上，通孔将所有的导电层彼此电连接。形成具有用于探测和结合的接合焊盘的测试结构，其中底层交错的导电层和以垂直取向设置的非导电层。非导电层中的至少一个在其中没有形成通孔，模拟集成电路的其它接合焊盘下的有源电路。控制结构的交错导电层中的至少一个从控制结构内延伸到作为感测层的测试结构内。感测层紧邻在其中形成有通孔的测试结构中的非导电层中的至少一个之上。因此，测试结构中没有形成通孔的非导电层中的至少一个的裂纹可以被检测为在测试结构的焊盘与控制结构的最高导电层之间的漏电流。

4. 发明授权

US5463529A High power dissipating packages with matched heatspreader heatsink assemblies 失效
标题翻译：具有匹配散热器散热器组件的大功率消散封装
公开(公告)号：US5463529A
公开(公告)日：1995-10-31
申请号：US317968
申请日：1994-10-04
申请人： Chok J. Chia , Manian Alagaratnam , Qwai H. Low , Seng-Sooi Lim
发明人： Chok J. Chia , Manian Alagaratnam , Qwai H. Low , Seng-Sooi Lim
IPC分类号： F02F7/00 , H01L23/367 , H01L23/40 , H05K7/20
CPC分类号： H01L23/40 , F02F7/00 , H01L23/3675 , H01L2924/0002 , Y10T29/4913
摘要： A removable heatsink assembly comprised of a heatsink unit and a heatspreader is provided. The heatsink unit has at least one fin and a coupling collar for radiating heat away from a packaged electronic device. The heatspreader includes a platform attached to an inner collar in thermal contact with the packaged electronic device. The platform has one or more tabs suitable for mating with one or more flanges located on the coupling collar of the heatsink unit. Coupling grooves within the flanges engage the platform of the heatspreader when the flanges are mated with the heatspreader tabs and the heatsink is turned. The heatsink can therefore be quickly and conveniently attached to or removed from the heatspreader. The present invention thus permits a wide variety of different heatsinks to be interchangeably used with a single heatspreader attached to an electronic device package.
摘要翻译：提供了由散热器单元和散热器组成的可拆卸的散热器组件。散热器单元具有至少一个翅片和用于从封装的电子设备辐射热量的联接套环。散热器包括附接到与封装的电子设备热接触的内部套环的平台。该平台具有一个或多个适合于与位于散热器单元的联接环上的一个或多个凸缘相配合的凸片。当凸缘与散热片接头配合并且散热片转动时，凸缘内的耦合凹槽接合散热器的平台。因此，散热器可以快速方便地附接到散热器或从散热器移除。因此，本发明允许各种不同的散热器与附接到电子设备封装的单个散热器可互换地使用。

5. 发明授权

US06963138B2 Dielectric stack 有权
标题翻译：电介质堆
公开(公告)号：US06963138B2
公开(公告)日：2005-11-08
申请号：US10357142
申请日：2003-02-03
申请人： Qwai H. Low , Chok J. Chia , Ramaswamy Ranganathan , Tauman T. Lau
发明人： Qwai H. Low , Chok J. Chia , Ramaswamy Ranganathan , Tauman T. Lau
IPC分类号： H01L23/485 , H01L23/532 , H01L23/48
CPC分类号： H01L24/05 , H01L23/53295 , H01L2224/05093 , H01L2224/05556 , H01L2224/05624 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/04953 , H01L2924/14 , H01L2924/181 , H01L2924/30105 , H01L2924/00
摘要： An integrated circuit with a pressure resistant current carrying structure having electrically conductive layers for carrying current. A first electrically nonconductive material at least partially surrounds the electrically conductive layers, and provides electrical insulation between the electrically conductive layers. The first electrically nonconductive material has a first degree of fragility and a first dielectric constant. A second electrically nonconductive material is disposed in a pattern within the first electrically nonconductive material and between the electrically conductive layers, and provides structural support for the first electrically nonconductive material between the electrically conductive layers. The second electrically nonconductive material has a second degree of fragility that is less than the first degree of fragility and a second dielectric constant that is greater than the first dielectric constant.
摘要翻译：一种具有耐压载流结构的集成电路，其具有用于承载电流的导电层。第一非导电材料至少部分地围绕导电层，并且在导电层之间提供电绝缘。第一非导电材料具有第一程度的脆性和第一介电常数。第二非导电材料以第一非导电材料内部和导电层之间的图案设置，并为导电层之间的第一非导电材料提供结构支撑。第二非导电材料具有小于第一脆性程度的第二脆性程度和大于第一介电常数的第二介电常数。

6. 发明授权

US06798035B1 Bonding pad for low k dielectric 有权
标题翻译：低k电介质接合垫
公开(公告)号：US06798035B1
公开(公告)日：2004-09-28
申请号：US10600255
申请日：2003-06-20
申请人： Qwai H. Low , Ramaswamy Ranganathan , Edwin M. Fulcher
发明人： Qwai H. Low , Ramaswamy Ranganathan , Edwin M. Fulcher
IPC分类号： H01L3100
CPC分类号： H01L24/05 , H01L2224/05624 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01074 , H01L2924/014 , H01L2924/14 , H01L2924/181 , H01L2924/30105 , H01L2924/00014 , H01L2924/00
摘要： A bonding pad structure having an electrically conductive capping layer. An electrically conductive first supporting layer is disposed immediately under the electrically conductive capping layer, without any intervening layers between the electrically conductive capping layer and the electrically conductive first supporting layer. The electrically conductive first supporting layer is configured as one of a sheet having no voids and a sheet having slotted voids in a first direction. An electrically conductive second supporting layer is disposed under the electrically conductive first supporting layer. The electrically conductive second supporting layer is configured as one of a sheet having slotted voids in the first direction, a sheet having slotted voids in a second direction, and a sheet having checkerboard voids.
摘要翻译：一种具有导电覆盖层的焊盘结构。导电的第一支撑层设置在导电覆盖层的正下方，在导电覆盖层和导电的第一支撑层之间没有任何中间层。导电性第一支撑层被构造为没有空隙的片材之一和在第一方向上具有开槽空隙的片材。导电的第二支撑层设置在导电的第一支撑层之下。导电性第二支撑层被构造为在第一方向上具有开槽空隙的片材之一，在第二方向上具有开槽空隙的片材和具有棋盘空隙的片材。

7. 发明授权

US6040632A Multiple sized die 失效
标题翻译：多尺寸模具
公开(公告)号：US6040632A
公开(公告)日：2000-03-21
申请号：US6784
申请日：1998-01-14
申请人： Qwai H. Low , Chok J. Chia , Seng-Sooi Lim
发明人： Qwai H. Low , Chok J. Chia , Seng-Sooi Lim
IPC分类号： H01L23/485 , H01L27/10
CPC分类号： H01L24/02 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01033 , H01L2924/01075 , H01L2924/01082 , H01L2924/14 , H01L2924/19043
摘要： A multiple-sized integrated circuit (IC) die and a method of making a multiple-sized IC die includes forming a plurality of IC dies on a semiconductor wafer. Each IC die has multiple rows of bonding pads around its periphery. Adjacent bonding pads on separate rows of each IC die are electrically connected together so that attachment to any one of the connected bond pads yields the same result. A plurality of scribe streets separate each IC die on the wafer, with the scribe street defining the width between each IC die. Rows of bonding pads reside in the scribe street area. Different rows of bonding pads may be selectively removed from the IC die by scribing the wafer so as to include one or more of the rows of bonding pads, thereby allowing one IC die design to have multiple sizes. An IC die separated from the wafer may still be sized smaller as long as there remain at least two rows of bonding pads around the periphery.
摘要翻译：多尺寸集成电路（IC）管芯和制造多尺寸IC管芯的方法包括在半导体晶片上形成多个IC管芯。每个IC芯片周围都有多排接合焊盘。每个IC管芯的独立行上的相邻接合焊盘电连接在一起，使得连接到任何一个连接的接合焊盘产生相同的结果。多个划线区将晶片上的每个IC芯片分开，划线条限定每个IC芯片之间的宽度。焊盘行位于划痕街区域。可以通过划片晶片来选择性地从IC芯片去除不同行的焊盘，以便包括一行或多行接合焊盘，从而允许一个IC管芯设计具有多个尺寸。只要在周围保持至少两排接合焊盘，则与晶片分离的IC裸片仍可具有更小的尺寸。

8. 发明授权

US5568683A Method of cooling a packaged electronic device 失效
标题翻译：冷却电子装置的方法
公开(公告)号：US5568683A
公开(公告)日：1996-10-29
申请号：US472320
申请日：1995-06-07
申请人： Chok J. Chia , Manian Alagaratnam , Qwai H. Low , Seng-Sooi Lim
发明人： Chok J. Chia , Manian Alagaratnam , Qwai H. Low , Seng-Sooi Lim
IPC分类号： F02F7/00 , H01L23/367 , H01L23/40 , H05K3/30
CPC分类号： H01L23/40 , F02F7/00 , H01L23/3675 , H01L2924/0002 , Y10T29/4913
摘要： A removable heatsink assembly comprised of a heatsink unit and a heatspreader is provided. The heatsink unit has at least one fin and a coupling collar for radiating heat away from a packaged electronic device. The heatspreader includes a platform attached to an inner collar in thermal contact with the packaged electronic device. The platform has one or more tabs suitable for mating with one or more flanges located on the coupling collar of the heatsink unit. Coupling grooves within the flanges engage the platform of the heatspreader when the flanges are mated with the heatspreader tabs and the heatsink is turned. The heatsink can therefore be quickly and conveniently attached to or removed from the heatspreader. The present invention thus permits a wide variety of different heatsinks to be interchangeably used with a single heatspreader attached to an electronic device package.
摘要翻译：提供了由散热器单元和散热器组成的可拆卸的散热器组件。散热器单元具有至少一个翅片和用于从封装的电子设备辐射热量的联接套环。散热器包括附接到与封装的电子设备热接触的内部套环的平台。该平台具有一个或多个适合于与位于散热器单元的联接环上的一个或多个凸缘相配合的凸片。当凸缘与散热片接头配合并且散热片转动时，凸缘内的耦合凹槽接合散热器的平台。因此，散热器可以快速方便地附接到散热器或从散热器移除。因此，本发明允许各种不同的散热器与附接到电子设备封装的单个散热器可互换地使用。

9. 发明授权

US08525312B2 Area array quad flat no-lead (QFN) package 有权
标题翻译：区域阵列四边形无引线（QFN）封装
公开(公告)号：US08525312B2
公开(公告)日：2013-09-03
申请号：US13208822
申请日：2011-08-12
申请人： Qwai H. Low , Chok J. Chia , Kishor Desai , Charles G. Woychik , Huailiang Wei
发明人： Qwai H. Low , Chok J. Chia , Kishor Desai , Charles G. Woychik , Huailiang Wei
IPC分类号： H01L23/495 , H01L21/50 , H01L21/60
CPC分类号： H01L23/49537 , H01L21/4821 , H01L23/3121 , H01L23/49575 , H01L23/49861 , H01L24/73 , H01L24/97 , H01L2224/0401 , H01L2224/04042 , H01L2224/16245 , H01L2224/32145 , H01L2224/32245 , H01L2224/45014 , H01L2224/48247 , H01L2224/48465 , H01L2224/48471 , H01L2224/49171 , H01L2224/73265 , H01L2224/97 , H01L2924/01322 , H01L2924/01327 , H01L2924/07811 , H01L2924/12042 , H01L2924/1434 , H01L2924/1436 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/85 , H01L2224/81 , H01L2224/83
摘要： A microelectronic assembly can include a microelectronic element and a lead frame having a first unit and a second unit overlying the first unit and assembled therewith. The first unit can have a first metal layer comprising a portion of the thickness of the lead frame and including terminals and first conductive elements extending away therefrom. The second unit can have a second metal layer comprising a portion of the thickness of the lead frame and including bond pads and second conductive elements extending away therefrom. The first and second units each can have an encapsulation supporting at least portions of the respective first and second conductive elements. At least some of the second conductive elements can overlie portions of corresponding ones of the first conductive elements and can be joined thereto. The microelectronic element can have contacts electrically connected with the bond pads of the lead frame.
摘要翻译：微电子组件可以包括微电子元件和引线框架，引线框架具有覆盖第一单元并与其组装的第一单元和第二单元。第一单元可以具有包括引线框架的厚度的一部分的第一金属层，并且包括端子和从其延伸的第一导电元件。第二单元可以具有包括引线框架的厚度的一部分的第二金属层，并且包括接合焊盘和从其延伸的第二导电元件。第一和第二单元各自可以具有支撑相应的第一和第二导电元件的至少一部分的封装。至少一些第二导电元件可以覆盖相应的第一导电元件的部分并且可以与其连接。微电子元件可以具有与引线框架的接合焊盘电连接的触点。

10. 发明申请

US20130037925A1 AREA ARRAY QFN 有权
标题翻译：区域阵列QFN
公开(公告)号：US20130037925A1
公开(公告)日：2013-02-14
申请号：US13208822
申请日：2011-08-12
申请人： Qwai H. Low , Chok J. Chia , Kishor Desai , Charles G. Woychik , Huailiang Wei
发明人： Qwai H. Low , Chok J. Chia , Kishor Desai , Charles G. Woychik , Huailiang Wei
IPC分类号： H01L23/495 , H01L21/50 , H01L21/60
CPC分类号： H01L23/49537 , H01L21/4821 , H01L23/3121 , H01L23/49575 , H01L23/49861 , H01L24/73 , H01L24/97 , H01L2224/0401 , H01L2224/04042 , H01L2224/16245 , H01L2224/32145 , H01L2224/32245 , H01L2224/45014 , H01L2224/48247 , H01L2224/48465 , H01L2224/48471 , H01L2224/49171 , H01L2224/73265 , H01L2224/97 , H01L2924/01322 , H01L2924/01327 , H01L2924/07811 , H01L2924/12042 , H01L2924/1434 , H01L2924/1436 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/85 , H01L2224/81 , H01L2224/83
摘要： A microelectronic assembly can include a microelectronic element and a lead frame having a first unit and a second unit overlying the first unit and assembled therewith. The first unit can have a first metal layer comprising a portion of the thickness of the lead frame and including terminals and first conductive elements extending away therefrom. The second unit can have a second metal layer comprising a portion of the thickness of the lead frame and including bond pads and second conductive elements extending away therefrom. The first and second units each can have an encapsulation supporting at least portions of the respective first and second conductive elements. At least some of the second conductive elements can overlie portions of corresponding ones of the first conductive elements and can be joined thereto. The microelectronic element can have contacts electrically connected with the bond pads of the lead frame.
摘要翻译：微电子组件可以包括微电子元件和引线框架，引线框架具有覆盖第一单元并与其组装的第一单元和第二单元。第一单元可以具有包括引线框架的厚度的一部分的第一金属层，并且包括端子和从其延伸的第一导电元件。第二单元可以具有包括引线框架的厚度的一部分的第二金属层，并且包括接合焊盘和从其延伸的第二导电元件。第一和第二单元各自可以具有支撑相应的第一和第二导电元件的至少一部分的封装。至少一些第二导电元件可以覆盖相应的第一导电元件的部分并且可以与其连接。微电子元件可以具有与引线框架的接合焊盘电连接的触点。

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