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    • 1. 发明授权
    • Silicon annealed wafer and silicon epitaxial wafer
    • 硅退火晶片和硅外延晶片
    • US07273647B2
    • 2007-09-25
    • US10809712
    • 2004-03-26
    • Hideshi NishikawaNobumitsu TakaseKazuyuki EgashiraHiroshi Hayakawa
    • Hideshi NishikawaNobumitsu TakaseKazuyuki EgashiraHiroshi Hayakawa
    • B32B9/04
    • C30B33/00C30B29/06H01L21/3225Y10T428/21
    • A silicon annealed wafer having a sufficient thick layer free from COP defects on the surface, and a sufficient uniform BMD density in the inside can be produced by annealing either a base material wafer having nitrogen at a concentration of less than 1×1014 atoms/cm3, COP defects having a size of 0.1 μm or less in the highest frequency of occurrence and no COP defects having a size of 0.2 μm or more, oxygen precipitates at a density of 1×104 counts/cm2 or more, and BMDs (oxygen precipitates), where the ratio of the maximum to the minimum of the BMD density in the radial direction of the wafer is 3 or less, or a base material wafer grown at specific average temperature gradients within specific temperature ranges and specific cooling times for a single crystal at a nitrogen concentration of less than 1×1014 atoms/cm3, employing the Czochralski method. Moreover, a silicon epitaxial wafer having very small defects and a uniform BMD distribution in the inside can be formed by growing an epitaxial layer on the surface of either the first type base material wafer or the second type base material wafer. Both the silicon annealed wafer and the silicon epitaxial wafer greatly reduce the rate of producing defective devices, thereby enabling the device productivity to be enhanced.
    • 具有在表面上没有COP缺陷的足够厚的厚层的硅退火晶片,并且可以通过退火具有小于1×10 14的浓度的氮的基材晶片来制造内部的足够均匀的BMD密度, / SUP>原子/ cm 3,出现发生频率的大小为0.1μm以下的COP缺陷,没有大小为0.2μm以上的COP缺陷,氧浓度为 1×10 4个/ cm 2以上的BMD(氧沉淀物),其中晶片的径向BMD密度的最大值与最小值之比 在特定温度范围内以特定平均温度梯度生长的基材晶片和氮浓度小于1×10 14原子/ cm 2的单晶的比冷却时间为3以下, 3,采用Czochralski法。 此外,可以通过在第一类型基材晶片或第二类型基材晶片的表面上生长外延层来形成具有非常小缺陷和均匀的BMD分布的硅外延晶片。 硅退火晶片和硅外延晶片都大大降低了制造缺陷器件的速率,从而能够提高器件的生产率。
    • 2. 发明授权
    • Manufacturing method of high resistivity silicon single crystal
    • 高电阻率硅单晶的制造方法
    • US07220308B2
    • 2007-05-22
    • US10828555
    • 2004-04-21
    • Nobumitsu TakaseHideshi NishikawaMakoto ItoKoujl SueokaShinsuke Sadamitsu
    • Nobumitsu TakaseHideshi NishikawaMakoto ItoKoujl SueokaShinsuke Sadamitsu
    • C30B15/20
    • C30B29/06C30B15/00
    • To suppress a fluctuation in resistivity around a target value to thereby stably manufacture high resistivity silicon single crystals having almost the same resistivity values in a manufacturing method wherein a silicon raw material is molten to manufacture a high resistivity silicon single crystal in the range of from 100 to 2000 Ω cm with a CZ method. In a case where poly-silicon produced with a Siemens method using trichlorosilane as raw material is used as the silicon raw material, an impurity concentration in the silicon raw material is selected so as to be controlled in the range of from −5 to 50 ppta method in terms of (a donor concentration—an acceptor concentration) and the selected poly-silicon is used. In a case of a MCZ method, the poly-silicon is selected in the range of from −25 to 20 ppta and the selected poly-silicon is used. Instead of the raw material, poly-silicon produced with a Siemens method using monosilane as raw material is used. Alternatively, a silicon crystal manufactured with a CZ method or a MCZ method using poly-silicon raw material is used.
    • 为了抑制围绕目标值的电阻率的波动,从而在将硅原料熔融以制造范围为100的高电阻率硅单晶的制造方法中稳定地制造具有几乎相同的电阻率值的高电阻率硅单晶 到2000欧米加厘米与CZ方法。 在使用以三氯硅烷为原料的西门子方法制造的多晶硅作为硅原料的情况下,选择硅原料中的杂质浓度以控制在-5〜50ppta的范围内 使用(供体浓度 - 受体浓度)和选择的多晶硅的方法。 在MCZ方法的情况下,多晶硅的选择范围为-25〜20ppta,使用所选择的多晶硅。 使用以硅烷为原料的西门子法生产的多晶硅代替原料。 或者,使用以CZ法制造的硅晶体或使用多晶硅原料的MCZ法。
    • 3. 发明授权
    • Method of producing epitaxial wafers
    • 生产外延片的方法
    • US06709957B2
    • 2004-03-23
    • US10173099
    • 2002-06-18
    • Eiichi AsayamaYasuo KoikeTadami TanakaToshiaki OnoMasataka HoraiHideshi Nishikawa
    • Eiichi AsayamaYasuo KoikeTadami TanakaToshiaki OnoMasataka HoraiHideshi Nishikawa
    • H01L2136
    • C30B29/06C30B15/206C30B33/00
    • The invention relates to a method of producing epitaxial wafers for the manufacture of high integration density devices capable of showing stable gettering effect. Specifically, it provides (1) a method of producing epitaxial wafers which comprises subjecting a silicon wafer sliced from a single crystal ingot grown by doping with not less than 1×1013 atoms/cm3 of nitrogen to 15 minutes to 4 hours of heat treatment at a temperature not lower than 700° C. but lower than 900° C. and then to epitaxial growth treatment. It is desirable that the above single crystal ingot have an oxygen concentration of not less than 11×1017 atoms/cm3. Further, (2) the above heat treatment is desirably carried out prior to the step of mirror polishing of silicon wafers. Furthermore, (3) it is desirable that the pulling rate be not increased in starting tail formation as compared with the pulling rate of the body in growing the above single crystal ingot. By taking these means, it is possible to produce epitaxial wafers having an almost constant, high level of gettering effect irrespective of the site of wafer slicing from the single crystal ingot and, furthermore, suppress the occurrence of defects within the epitaxial layer.
    • 本发明涉及一种生产用于制造能够显示出稳定的吸气效果的高集成度密度器件的外延晶片的方法。 具体地说,提供(1)一种外延晶片的制造方法,其特征在于,将从不少于1×10 13原子/ cm 3的氮掺杂生长的单晶锭切片的硅晶片经受15分钟〜4小时 在不低于700℃但低于900℃的温度下进行热处理,然后进行外延生长处理。 上述单晶锭的氧浓度最好不小于11×10 17原子/ cm 3。 此外,(2)上述热处理期望在硅晶片的镜面抛光步骤之前进行。 此外,(3)与在上述单晶锭生长中的本体的拉拔速度相比,起始尾部形成时的牵引速度最好不增加。 通过采用这些方法,可以制造具有几乎恒定的高水平的吸杂效应的外延晶片,而不管来自单晶锭的晶片切片的位置如何,并且还抑制外延层内的缺陷的发生。
    • 5. 发明申请
    • Manufacturing method of high resistivity silicon single crystal
    • 高电阻率硅单晶的制造方法
    • US20050000410A1
    • 2005-01-06
    • US10828555
    • 2004-04-21
    • Nobumitsu TakaseHideshi NishikawaMakoto ItoKouji SueokaShinsuke Sadamitsu
    • Nobumitsu TakaseHideshi NishikawaMakoto ItoKouji SueokaShinsuke Sadamitsu
    • C30B15/00C30B29/06C30B23/00C30B25/00C30B28/12C30B28/14
    • C30B29/06C30B15/00
    • To suppress a fluctuation in resistivity around a target value to thereby stably manufacture high resistivity silicon single crystals having almost the same resistivity values in a manufacturing method wherein a silicon raw material is molten to manufacture a high resistivity silicon single crystal in the range of from 100 to 2000 Ω cm with a CZ method. In a case where poly-silicon produced with a Siemens method using trichlorosilane as raw material is used as the silicon raw material, an impurity concentration in the silicon raw material is selected so as to be controlled in the range of from −5 to 50 ppta method in terms of (a donor concentration—an acceptor concentration) and the selected poly-silicon is used. In a case of a MCZ method, the poly-silicon is selected in the range of from −25 to 20 ppta and the selected poly-silicon is used. Instead of the raw material, poly-silicon produced with a Siemens method using monosilane as raw material is used. Alternatively, a silicon crystal manufactured with a CZ method or a MCZ method using poly-silicon raw material is used.
    • 为了抑制围绕目标值的电阻率的波动,从而在将硅原料熔融以制造范围为100的高电阻率硅单晶的制造方法中稳定地制造具有几乎相同的电阻率值的高电阻率硅单晶 到2000欧米加厘米与CZ方法。 在使用以三氯硅烷为原料的西门子方法制造的多晶硅作为硅原料的情况下,选择硅原料中的杂质浓度以控制在-5〜50ppta的范围内 使用(供体浓度 - 受体浓度)和选择的多晶硅的方法。 在MCZ方法的情况下,多晶硅的选择范围为-25〜20ppta,使用所选择的多晶硅。 使用以硅烷为原料的西门子法生产的多晶硅代替原料。 或者,使用以CZ法制造的硅晶体或使用多晶硅原料的MCZ法。
    • 6. 发明授权
    • High resistance silicon wafer and its manufacturing method
    • 高电阻硅晶片及其制造方法
    • US07397110B2
    • 2008-07-08
    • US10512405
    • 2003-04-16
    • Nobumitsu TakaseHideshi NishikawaMakoto ItoKoji SueokaShinsuke Sadamitsu
    • Nobumitsu TakaseHideshi NishikawaMakoto ItoKoji SueokaShinsuke Sadamitsu
    • H01L29/36H01L21/322
    • H01L21/3225
    • A high-resistance silicon wafer is manufactured in which a gettering ability, mechanical strength, and economical efficiency are excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is implemented on the side of a device maker. A heat treatment for forming an oxygen precipitate nucleus is performed at 500 to 900° C. for 5 hours or more in a non-oxidizing atmosphere and a heat treatment for growing an oxygen precipitate is performed at 950 to 1050° C. for 10 hours or more on a high-oxygen and carbon-doped high-resistance silicon wafer in which resistivity is 100 Ωcm or more, an oxygen concentration is 14×1017 atoms/cm3 (ASTM F-121, 1979) or more and a carbon concentration is 0.5×1016 atoms/cm3 or more. By these heat treatments, a remaining oxygen concentration in the wafer is controlled to be 12×1017 atoms/cm3 (ASTM F-121, 1979) or less. Thus, there is provided a high-resistance, low-oxygen and high-strength silicon wafer in which resistivity is 100 Ωcm or more and an oxygen precipitate (BMD) having a size of 0.2 μm is formed so as to have high density of 1×104/cm2 or more.
    • 制造高电阻硅晶片,其中吸收能力,机械强度和经济效率优异,并且在用于形成电路的热处理中有效地防止了氧热供体的产生,该电路在 设备制造商。 在非氧化性气氛中,在500〜900℃下进行形成氧沉淀核的热处理5小时以上,在950〜1050℃下进行氧沉淀的热处理10小时 以上,电阻率为100Ωm以上的高氧和碳掺杂高电阻硅晶片,氧浓度为14×10 17原子/ cm 3(以下) ASTM F-121,1979)或更高,碳浓度为0.5×10 16原子/ cm 3以上。 通过这些热处理,将晶片中的剩余氧浓度控制为12×10 17原子/ cm 3(ASTM F-121,1979)或更小。 因此,提供了电阻率为100Ωm或更大的高电阻,低氧和高强度硅晶片,并且形成具有0.2μm大小的氧沉淀物(BMD),以便具有高密度的1×10 4/4以上。
    • 7. 发明授权
    • Method for growing silicon single crystal
    • 生长硅单晶的方法
    • US07014704B2
    • 2006-03-21
    • US10455609
    • 2003-06-06
    • Toshiaki OnoTadami TanakaShigeru UmenoEiichi AsayamaHideshi Nishikawa
    • Toshiaki OnoTadami TanakaShigeru UmenoEiichi AsayamaHideshi Nishikawa
    • C30B15/20
    • C30B29/06C30B15/04C30B15/206
    • A method for growing a silicon single crystal used for semiconductor integrated circuit devices, wherein the single crystal is grown by the CZ method at a nitrogen concentration of 1×1013 atoms/cm3–1×1015 atoms/cm3 with a cooling rate of not less than 2.5° C./min at a crystal temperature of 1150° C.–1000° C., in which case, the pulling rate is adjusted such that the outside diameter of a circular region including oxidation-induced stacking faults generated at the center of a wafer which is subjected to the oxidation heat treatment at high temperature is not more than ⅗ of the wafer diameter, wherein the wafer is prepared by slicing the grown single crystal. In the growth method, the concentration of oxygen in the silicon single crystal is preferably not more than 9×1017 atoms/cm3 (ASTM '79). With this method, the silicon single crystal, in which the generation of Grown-in defects can be effectively suppressed, can be produced in a simple process without any increase in the production cost. Moreover, a specification of the oxygen concentration and the application of the outward diffusion treatment are capable of producing a wafer, which is optimally used for monitoring particles.
    • 一种生长用于半导体集成电路器件的硅单晶的方法,其中通过CZ法以1×10 3原子/ cm 3的氮浓度生长单晶。 -1×10 15原子/ cm 3,冷却速率不低于2.5℃/分钟,晶体温度为1150℃-1000℃, 在这种情况下,调整拉伸速度,使得在高温下进行氧化热处理的晶片的中心处产生的氧化诱发堆垛层错的圆形区域的外径不大于 晶片直径,其中通过对生长的单晶进行切片来制备晶片。 在生长方法中,硅单晶中氧的浓度优选不超过9×10 17原子/ cm 3(ASTM '79)。 利用这种方法,可以在简单的工艺中生产出能够有效抑制生成缺陷的硅单晶,而不会增加生产成本。 此外,氧浓度的规格和向外扩散处理的应用能够生产最佳地用于监测颗粒的晶片。
    • 8. 发明授权
    • Method of manufacturing epitaxial wafer and method of producing single crystal as material therefor
    • 制造外延晶片的方法及其制造方法
    • US06835245B2
    • 2004-12-28
    • US09883922
    • 2001-06-20
    • Toshiaki OnoTadami TanakaEiichi AsayamaHideshi NishikawaMasataka Horai
    • Toshiaki OnoTadami TanakaEiichi AsayamaHideshi NishikawaMasataka Horai
    • C30B3302
    • C30B29/06C30B15/206
    • Epitaxial wafers showing marked IG effects can be manufactured from silicon single crystals doped or not doped with nitrogen without requiring any additional heat treatment process step while reducing the density of epitaxial layer defects. According to the first manufacturing method, an epitaxial layer is allowed to grow on the surface of a wafer sliced from a single crystal produced by employing a cooling rate of not less than 7.3° C./min in the temperature range of 1200-1050° C. in the step of pulling up thereof. According to the second manufacturing method, an epitaxial layer is allowed to grow on the surface of a silicon wafer sliced from a silicon single crystal doped with 1×1012 atoms/cm3 to 1×1014 atoms/cm3 as produced by employing a cooling rate of not less than 2.7° C./min in the temperature range of 1150-1020° C. and then a cooling rate of not more than 1.2° C./min in the temperature range of 1000-850° C. in the step of pulling up thereof.
    • 显示出显着的IG效应的外延晶片可以由掺杂或不掺杂氮的单晶硅制造,而不需要任何额外的热处理工艺步骤,同时降低外延层缺陷的密度。 根据第一种制造方法,允许外延层在从在1200-1050°的温度范围内采用不低于7.3℃/分钟的冷却速率制备的单晶切片的晶片的表面上生长 C.在拉起它的步骤。 根据第二制造方法,允许外延层在从掺杂有1×10 12原子/ cm 3至1×10 14原子/ cm 3的硅单晶切片的硅晶片的表面上生长, 通过在1150-1020℃的温度范围内使用不低于2.7℃/分钟的冷却速率,然后在1000℃的温度范围内的冷却速度不超过1.2℃/ 850℃。
    • 9. 发明授权
    • Method of producing silicon single and single crystal silicon wafer
    • 硅单晶硅晶片的制造方法
    • US06337219B1
    • 2002-01-08
    • US09381685
    • 1999-12-20
    • Hideshi Nishikawa
    • Hideshi Nishikawa
    • G01R3126
    • C30B29/06C30B15/203
    • A method of manufacturing a silicon single crystal to be grown by the Czochralski method, wherein a crystal is pulled up in a CZ furnace by changing an average pulling rate for a crystal, having a predetermined length, a plurality of times, a relation between the average pulling rate and the OSF ring diameter for each pulling length is examined, an average pulling rate pattern for generation or disappearance of an OSF ring at a predetermined position is designed based on the examined results, and the single crystal is grown according to the average pulling rate pattern, and a silicon wafer not having grown-in defects is manufactured.
    • 一种通过切克劳斯基法生长的单晶硅的制造方法,其特征在于,通过改变具有规定长度的晶体的平均拉拔速度多次,在CZ炉中拉出晶体, 检查每个牵引长度的平均牵引速率和OSF环直径,基于检查结果设计在预定位置处的OSF环的产生或消失的平均牵引速率模式,并且根据平均值生长单晶 拉丝速度图案和不具有长期缺陷的硅晶片。
    • 10. 发明申请
    • High resistance silicon wafer and method for production thereof
    • 高电阻硅晶片及其制造方法
    • US20050253221A1
    • 2005-11-17
    • US10512405
    • 2003-04-16
    • Nobumitsu TakaseHideshi NishikawaMakoto ItoKoji SueokaShinsuke Sadamitsu
    • Nobumitsu TakaseHideshi NishikawaMakoto ItoKoji SueokaShinsuke Sadamitsu
    • H01L21/26H01L21/322H01L29/167H01L21/22
    • H01L21/3225
    • A high-resistance silicon wafer is manufactured in which a gettering ability, mechanical strength, and economical efficiency are excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is implemented on the side of a device maker. A heat treatment for forming an oxygen precipitate nucleus is performed at 500 to 900° C. for 5 hours or more in a non-oxidizing atmosphere and a heat treatment for growing an oxygen precipitate is performed at 950 to 1050° C. for 10 hours or more on a high-oxygen and carbon-doped high-resistance silicon wafer in which resistivity is 100 Ωcm or more, an oxygen concentration is 14×1017 atoms/cm3 (ASTM F-121, 1979) or more and a carbon concentration is 0.5×1016 atoms/cm3 or more. By these heat treatments, a remaining oxygen concentration in the wafer is controlled to be 12×1017 atoms/cm3 (ASTM F-121, 1979) or less. Thus, there is provided a high-resistance, low-oxygen and high-strength silicon wafer in which resistivity is 100 Ωcm or more and an oxygen precipitate (BMD) having a size of 0.2 μm is formed so as to have high density of 1×104/cm2 or more.
    • 制造高电阻硅晶片,其中吸收能力,机械强度和经济效率优异,并且在用于形成电路的热处理中有效地防止了氧热供体的产生,该电路在 设备制造商。 在非氧化性气氛中,在500〜900℃下进行形成氧沉淀核的热处理5小时以上,在950〜1050℃下进行氧沉淀的热处理10小时 以上,电阻率为100Ωm以上的高氧和碳掺杂高电阻硅晶片,氧浓度为14×10 17原子/ cm 3(以下) ASTM F-121,1979)或更高,碳浓度为0.5×10 16原子/ cm 3以上。 通过这些热处理,将晶片中的剩余氧浓度控制为12×10 17原子/ cm 3(ASTM F-121,1979)或更小。 因此,提供了电阻率为100Ωm或更大的高电阻,低氧和高强度硅晶片,并且形成具有0.2μm大小的氧沉淀物(BMD),以便具有高密度的1×10 4/4以上。