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    • 1. 发明授权
    • Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process
    • US06167834A
    • 2001-01-02
    • US07928642
    • 1992-08-13
    • David Nin-Kou WangJohn M. WhiteKam S. LawCissy LeungSalvador P. UmotoyKenneth S. CollinsJohn A. AdamikIlya PerlovDan Maydan
    • David Nin-Kou WangJohn M. WhiteKam S. LawCissy LeungSalvador P. UmotoyKenneth S. CollinsJohn A. AdamikIlya PerlovDan Maydan
    • C23C1600
    • C23C16/45565C23C16/402C23C16/455C23C16/45521C23C16/5096C23C16/54H01J37/32082H01J37/3244H01L21/31604
    • A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, the TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.
    • 2. 发明授权
    • Plasma processing apparatus
    • 等离子体处理装置
    • US5449410A
    • 1995-09-12
    • US98538
    • 1993-07-28
    • Mei ChangCissy Leung
    • Mei ChangCissy Leung
    • H05H1/46C23C16/02C23C16/50H01J37/32H01L21/205H01L21/302H01L21/3065H01L21/31C23C16/00
    • H01J37/3244H01J37/32082H01J37/32862H01J2237/0206H01J2237/022
    • A plasma processing apparatus has a chamber with an open top and a cover plate extending across the open top of the chamber. The cover plate has an opening therethrough. An annular shield of an electrical insulating material is secured to the cover plate around the opening and extends partially across the opening. An aluminum showerhead is within the shield and has holes therethrough through which a gas can pass into the chamber. The showerhead is connected to a source of RF voltage to provide a flow of RF power between the showerhead and an electrode within the chamber. The shield has a plurality of openings therethrough which allows the RF power to flow through the openings from the showerhead to the electrode in the event that the showerhead becomes coated with particles of an insulating material.
    • 等离子体处理装置具有一个具有开口顶部的腔室和一个延伸穿过腔室的开口顶部的盖板。 盖板具有穿过其中的开口。 电绝缘材料的环形屏蔽件围绕开口固定到盖板并且部分地延伸穿过开口。 铝制喷头位于屏蔽内,并具有穿过其中的孔,气体可通过该孔进入腔室。 淋浴头连接到RF电压源,以在淋浴喷头和腔室内的电极之间提供RF功率流。 屏蔽件具有多个穿过其中的开口,在喷头变得被绝缘材料的颗粒涂覆的情况下,允许RF功率从喷头流过电极。
    • 7. 发明授权
    • Low resistivity W using B2H6 nucleation step
    • 使用B2H6成核步骤的低电阻率W
    • US06206967B1
    • 2001-03-27
    • US09594234
    • 2000-06-14
    • Alfred MakKevin LaiCissy LeungDennis Sauvage
    • Alfred MakKevin LaiCissy LeungDennis Sauvage
    • B05C1100
    • C23C16/0281C23C16/14H01L21/28556
    • A multiple step chemical vapor deposition process for depositing a tungsten film on a substrate. A first step of the deposition process includes a nucleation step in which a process gas including a tungsten-containing source, a group III or V hydride and a reduction agent are flowed into a deposition zone of a substrate processing chamber while the deposition zone is maintained at or below a first pressure level. During this first deposition stage, other process variables are maintained at conditions suitable to deposit a first layer of the tungsten film over the substrate. Next, during a second deposition stage after the first stage, the flow of the group III or V hydride into the deposition zone is stopped, and afterwards, the pressure in the deposition zone is increased to a second pressure above the first pressure level and other process parameters are maintained at conditions suitable for depositing a second layer of the tungsten film on the substrate. In a preferred embodiment, the flow of the tungsten-containing source is stopped along with the flow of the group III or V hydride and after a period of between 5 and 30 seconds, the flow of the tungsten-containing source is restarted when the pressure is in the deposition zone is increased to the second pressure level.
    • 用于在基板上沉积钨膜的多步化学气相沉积工艺。 沉积工艺的第一步包括成核步骤,其中包含含钨源,III或V族氢化物和还原剂的工艺气体在保持沉积区的同时流入衬底处理室的沉积区 处于或低于第一压力水平。 在该第一沉积阶段期间,其它工艺变量被保持在适于将第一层钨膜沉积在衬底上的条件下。 接下来,在第一阶段之后的第二沉积阶段期间,停止将III或V族氢化物流入沉积区的流动,之后,沉积区中的压力增加到高于第一压力水平的第二压力和其它 工艺参数保持在适合于在衬底上沉积第二层钨膜的条件下。 在一个优选的实施方案中,随着III或V族氢化物的流动停止含钨源的流动,并且在5至30秒之间的时间段内,当含有钨的源的流量在压力 在沉积区中增加到第二压力水平。
    • 10. 发明授权
    • Process for PECVD of silicon oxide using TEOS decomposition
    • US4892753A
    • 1990-01-09
    • US262993
    • 1988-10-26
    • David N. WangJohn M. WhiteKam S. LawCissy LeungSalvador P. UmotoyKenneth S. CollinsJohn A. AdamikIlya PerlovDan Maydan
    • David N. WangJohn M. WhiteKam S. LawCissy LeungSalvador P. UmotoyKenneth S. CollinsJohn A. AdamikIlya PerlovDan Maydan
    • C23C16/40C23C16/44C23C16/455C23C16/509C23C16/54H01L21/314H01L21/316
    • C23C16/45565C23C16/402C23C16/455C23C16/45521C23C16/5096C23C16/54H01J37/32082H01J37/3244H01L21/31604
    • A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.