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1. 发明授权

US08003519B2 Systems and methods for back end of line processing of semiconductor circuits 有权
标题翻译：半导体电路线路处理后端系统及方法
公开(公告)号：US08003519B2
公开(公告)日：2011-08-23
申请号：US11847135
申请日：2007-08-29
申请人： Tuung Luoh , Chi-Tung Huang , Kuang-Chao Chen , Candy Jiang
发明人： Tuung Luoh , Chi-Tung Huang , Kuang-Chao Chen , Candy Jiang
IPC分类号： H01L21/4763
CPC分类号： H01L21/76843 , H01L21/76864 , H01L21/76877
摘要： A BEOL manufacturing process for forming a via process between two metal lines on a semiconductor wafer comprises depositing a portion of a first metal adhesion layer within a patterned via hole, followed by a cooling step. The cooling step is then followed by formation of the remainder of the first metal adhesion layer and formation of a second metal adhesion layer within the patterned via hole. This process of forming the remaining portion of the first metal adhesion layer can be referred to as a wafer load, unload, load (LUL) process. By using a LUL process, thermal history is minimized, which reduces Al extrusion at the via interfaces.
摘要翻译：用于在半导体晶片上的两个金属线之间形成通孔工艺的BEOL制造工艺包括在图案化的通孔内沉积第一金属粘附层的一部分，接着进行冷却步骤。然后冷却步骤之后形成第一金属粘合层的其余部分，并在图案化的通孔内形成第二金属粘合层。形成第一金属粘合层的剩余部分的这个过程可以被称为晶片负载，卸载，负载（LUL）过程。通过使用LUL工艺，可以最大限度地减少热历史，从而减少通孔界面处的Al挤压。

2. 发明授权

US07544618B2 Two-step chemical mechanical polishing process 有权
标题翻译：两步化学机械抛光工艺
公开(公告)号：US07544618B2
公开(公告)日：2009-06-09
申请号：US11419129
申请日：2006-05-18
申请人： Chun-Fu Chen , Yung-Tai Hung , Chi-Tung Huang , Yun-Chi Yang
发明人： Chun-Fu Chen , Yung-Tai Hung , Chi-Tung Huang , Yun-Chi Yang
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/31053 , C09G1/02 , H01L22/12 , H01L22/20
摘要： A chemical mechanical polishing method is disclosed. The method includes forming a film on a wafer having at least one trench structure thereon; polishing the surface of the film by providing a polishing composition to provide a first polished surface; rinsing the first polished surface with a rinse composition to provide a rinsed surface; and polishing the rinsed surface by providing a second polishing composition to provide a second polished surface.
摘要翻译：公开了一种化学机械抛光方法。该方法包括在其上具有至少一个沟槽结构的晶片上形成膜; 通过提供抛光组合物来抛光膜的表面以提供第一抛光表面; 用漂洗组合物漂洗第一抛光表面以提供漂洗表面; 并通过提供第二抛光组合物来抛光冲洗的表面以提供第二抛光表面。

3. 发明授权

US07498257B2 Methods for metal ARC layer formation 有权
标题翻译：金属ARC层形成方法
公开(公告)号：US07498257B2
公开(公告)日：2009-03-03
申请号：US11329553
申请日：2006-01-11
申请人： Hsing-Hua Chiu , Tuung Luoh , Chi-Tung Huang , Kuang-Chao Chen
发明人： Hsing-Hua Chiu , Tuung Luoh , Chi-Tung Huang , Kuang-Chao Chen
IPC分类号： H01L21/4763
CPC分类号： H01L23/53223 , H01L21/0276 , H01L21/2855 , H01L21/32051 , H01L21/32139 , H01L2924/0002 , Y10S438/952 , H01L2924/00
摘要： A process for forming an ARC layer in the fabrication of a semiconductor device comprises forming a modified ARC layer that increases the resistance to crown defects and bridging and also provides better adhesion for the ARC layer with the underlying metal layer. The modified ARC layer can comprise two titanium nitride ARC layers, a titanium nitride/titanium/titanium nitride sandwich structure, a modified titanium nitride layer, or an extended thickness titanium nitride layer.
摘要翻译：在制造半导体器件中形成ARC层的方法包括形成改进的ARC层，其增加了对冠部缺陷和桥接的抵抗性，并且还为具有下面的金属层的ARC层提供了更好的附着力。经修改的ARC层可以包括两个氮化钛ARC层，氮化钛/钛/氮化钛夹层结构，改性氮化钛层或延伸厚度的氮化钛层。

4. 发明授权

US07491621B2 Method of forming isolation structures in a semiconductor manufacturing process 有权
标题翻译：在半导体制造工艺中形成隔离结构的方法
公开(公告)号：US07491621B2
公开(公告)日：2009-02-17
申请号：US11342784
申请日：2006-01-30
申请人： Chun Fu Chen , Yung Tai Hung , Chi Tung Huang , Chen Wei Liao
发明人： Chun Fu Chen , Yung Tai Hung , Chi Tung Huang , Chen Wei Liao
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： A method for forming shallow trench isolation structures is disclosed. The methods include providing a substrate having an upper surface and having an opening extending down from said upper surface, providing a first dielectric layer over at least a portion of the upper surface of the substrate and filling the opening, providing a second dielectric layer over the first dielectric layer, and removing portions of the first and second dielectric layers, wherein the first dielectric layer has a higher index of refraction than the second dielectric layer.
摘要翻译：公开了一种用于形成浅沟槽隔离结构的方法。所述方法包括提供具有上表面并且具有从所述上表面向下延伸的开口的基板，在所述基板的上表面的至少一部分上方提供第一介电层，并填充所述开口，第一电介质层和去除第一和第二介电层的部分，其中第一介电层具有比第二介电层更高的折射率。

5. 发明授权

US07361601B2 Chemical mechanical polish process and method for improving accuracy of determining polish endpoint thereof 有权
标题翻译：化学机械抛光工艺和提高确定其抛光终点的准确性的方法
公开(公告)号：US07361601B2
公开(公告)日：2008-04-22
申请号：US11160357
申请日：2005-06-21
申请人： Chun-Fu Chen , Chi-Tung Huang , Yung-Tai Hung , Chun-Chung Huang
发明人： Chun-Fu Chen , Chi-Tung Huang , Yung-Tai Hung , Chun-Chung Huang
IPC分类号： H01L21/461
CPC分类号： B24B37/013 , B24B49/12 , H01L22/26
摘要： A method for improving accuracy of determining polish endpoint of chemical mechanical polish (CMP) process is provided. The method is performed before the CMP process. First, a test wafer with a to-be-polished layer and a material layer under the to-be-polished layer is provided. Then, a test beam with a wavelength is provided to irradiate the test wafer. The CMP process is performed to the test wafer to remove the to-be-polished layer until the material layer is exposed while the reflection of the test beam during the polish process is continuously detected. The reflection tendency is detected when the to-be-polished layer is to be completely removed and when the CMP process reaches the interface between the to-be-polished layer and the material layer. If the reflection tendency is gradually weakened, the test beam with the wavelength is chosen for the subsequent polish process.
摘要翻译：提供了一种提高化学机械抛光（CMP）工艺抛光终点确定精度的方法。该方法在CMP过程之前执行。首先，提供具有待抛光层的测试晶片和待抛光层下面的材料层。然后，提供具有波长的测试光束以照射测试晶片。对测试晶片执行CMP处理以除去待抛光层，直到材料层暴露，同时连续检测在抛光过程期间测试光束的反射。当待抛光层被完全去除并且当CMP工艺到达待抛光层和材料层之间的界面时，检测反射趋势。如果反射趋势逐渐减弱，则选择具有波长的测试光束用于随后的抛光过程。

6. 发明申请

US20070298583A1 METHOD FOR FORMING A SHALLOW TRENCH ISOLATION REGION 审中-公开
标题翻译：形成浅层分离区的方法
公开(公告)号：US20070298583A1
公开(公告)日：2007-12-27
申请号：US11426650
申请日：2006-06-27
申请人： Chia-Wei Wu , Chen-Wei Liao , Jung-Yu Hsieh , Ling-Wuu Yang , Chin-Ta Su , Chi-Tung Huang
发明人： Chia-Wei Wu , Chen-Wei Liao , Jung-Yu Hsieh , Ling-Wuu Yang , Chin-Ta Su , Chi-Tung Huang
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： A method for forming a shallow trench isolation region (STI) is disclosed. The method comprises the steps of sequentially forming a pad oxide layer and a nitride silicon layer over a provided substrate. Next, the pad oxide layer, the nitride silicon layer, and the substrate are partially etched to form a trench. An oxide liner and a nitride liner are then formed in the trench. Subsequently, a two-stage high-density plasma chemical vapor deposition process is performed to form a shallow trench isolation region.
摘要翻译：公开了一种用于形成浅沟槽隔离区域（STI）的方法。该方法包括以下步骤：在所提供的衬底上顺序地形成衬垫氧化物层和氮化硅层。接下来，对衬垫氧化物层，氮化物硅层和衬底进行部分蚀刻以形成沟槽。然后在沟槽中形成氧化物衬垫和氮化物衬垫。随后，进行两级高密度等离子体化学气相沉积工艺以形成浅沟槽隔离区域。

7. 发明申请

US20070269985A1 TWO-STEP CHEMICAL MECHANICAL POLISHING PROCESS 有权
标题翻译：两步化学机械抛光工艺
公开(公告)号：US20070269985A1
公开(公告)日：2007-11-22
申请号：US11419129
申请日：2006-05-18
申请人： Chun-Fu Chen , Yung-Tai Hung , Chi-Tung Huang , Yun-Chi Yang
发明人： Chun-Fu Chen , Yung-Tai Hung , Chi-Tung Huang , Yun-Chi Yang
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/31053 , C09G1/02 , H01L22/12 , H01L22/20
摘要： A chemical mechanical polishing method is disclosed. The method includes forming a film on a wafer having at least one trench structure thereon; polishing the surface of the film by providing a polishing composition to provide a first polished surface; rinsing the first polished surface with a rinse composition to provide a rinsed surface; and polishing the rinsed surface by providing a second polishing composition to provide a second polished surface.
摘要翻译：公开了一种化学机械抛光方法。该方法包括在其上具有至少一个沟槽结构的晶片上形成膜; 通过提供抛光组合物来抛光膜的表面以提供第一抛光表面; 用漂洗组合物漂洗第一抛光表面以提供漂洗表面; 并通过提供第二抛光组合物来抛光冲洗的表面以提供第二抛光表面。

8. 发明申请

US20070167007A1 Methods for symmetric deposition of a metal layer in the fabrication of a semiconductor device 有权
标题翻译：在半导体器件的制造中金属层的对称沉积的方法
公开(公告)号：US20070167007A1
公开(公告)日：2007-07-19
申请号：US11334610
申请日：2006-01-18
申请人： Sheng-Hui Hsieh , Ling-Wuu Yang , Chi-Tung Huang , Kuang-Chao Chen
发明人： Sheng-Hui Hsieh , Ling-Wuu Yang , Chi-Tung Huang , Kuang-Chao Chen
IPC分类号： H01L21/44
CPC分类号： H01L21/76838 , H01L23/544 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A method for symmetric deposition of metal layer over a metal layer registration key comprises using MOCVD to form the metal layer. Once the symmetric metal layer is formed, a metal layer registration key can be accurately detected and the metal layer registration key overlay shift can be improved.
摘要翻译：金属层对准沉积金属层配准密钥的方法包括使用MOCVD形成金属层。一旦形成对称金属层，就可以精确地检测金属层配准密钥，并且可以提高金属层配准密钥重叠偏移。

9. 发明申请

US20060283838A1 CHEMICAL MECHANICAL POLISH PROCESS AND METHOD FOR IMPROVING ACCURACY OF DETERMINING POLISH ENDPOINT THEREOF 有权
标题翻译：化学机械抛光工艺及其提高确定其抛光端点精度的方法
公开(公告)号：US20060283838A1
公开(公告)日：2006-12-21
申请号：US11160357
申请日：2005-06-21
申请人： Chun-Fu Chen , Chi-Tung Huang , Yung-Tai Hung , Chun-Chung Huang
发明人： Chun-Fu Chen , Chi-Tung Huang , Yung-Tai Hung , Chun-Chung Huang
IPC分类号： B44C1/22 , H01L21/461 , H01L21/302 , C03C15/00
CPC分类号： B24B37/013 , B24B49/12 , H01L22/26
摘要： A method for improving accuracy of determining polish endpoint of chemical mechanical polish (CMP) process is provided. The method is performed before the CMP process. First, a test wafer with a to-be-polished layer and a material layer under the to-be-polished layer is provided. Then, a test beam with a wavelength is provided to irradiate the test wafer. The CMP process is performed to the test wafer to remove the to-be-polished layer until the material layer is exposed while the reflection of the test beam during the polish process is continuously detected. The reflection tendency is detected when the to-be-polished layer is to be completely removed and when the CMP process reaches the interface between the to-be-polished layer and the material layer. If the reflection tendency is gradually weakened, the test beam with the wavelength is chosen for the subsequent polish process.
摘要翻译：提供了一种提高化学机械抛光（CMP）工艺抛光终点确定精度的方法。该方法在CMP过程之前执行。首先，提供具有待抛光层的测试晶片和待抛光层下面的材料层。然后，提供具有波长的测试光束以照射测试晶片。对测试晶片执行CMP处理以除去待抛光层，直到材料层暴露，同时连续检测在抛光过程期间测试光束的反射。当待抛光层被完全去除并且当CMP工艺到达待抛光层和材料层之间的界面时，检测反射趋势。如果反射趋势逐渐减弱，则选择具有波长的测试光束用于随后的抛光过程。

10. 发明申请

US20050146036A1 Method of forming a metal silicide layer on non-planar-topography polysilicon 有权
标题翻译：在非平面地形多晶硅上形成金属硅化物层的方法
公开(公告)号：US20050146036A1
公开(公告)日：2005-07-07
申请号：US10752276
申请日：2004-01-06
申请人： Chi-Tung Huang
发明人： Chi-Tung Huang
IPC分类号： C23C14/04 , C23C14/16 , C23C14/35 , C23C14/58 , H01L21/20 , H01L21/4763 , H01L21/768 , H01L23/48 , H01L29/40
CPC分类号： C23C14/046 , C23C14/165 , C23C14/3492 , C23C14/358 , C23C14/5806 , C23C14/5873 , H01L21/76889 , H01L2924/0002 , H01L2924/00
摘要： A process is described for creating a uniformly thick layer of titanium, cobalt, or nickel silicide over a layer of polysilicon that has features or a non-planar topography. A dual layer of metal is deposited onto patterned polysilicon such that the first layer covers the bottoms and tops of the non-planar topography and the second layer covers the sidewalls and tops of the non-planar topography. By heating the metal, etching away any un-reacted metal, and heating the result a second time, a metal silicide layer of uniform thickness, reduced stress and reduced resistivity is formed.
摘要翻译：描述了一种用于在具有特征或非平面形貌的多晶硅层上产生均匀厚的钛，钴或镍硅化物层的工艺。将双层金属沉积到图案化多晶硅上，使得第一层覆盖非平面形貌的底部和顶部，并且第二层覆盖非平面形貌的侧壁和顶部。通过加热金属，蚀刻掉任何未反应的金属，并且第二次加热结果，形成均匀厚度的金属硅化物层，减少的应力和降低的电阻率。

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