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1. 发明申请

US20080029478A1 CHEMICAL MECHANICAL POLISHING PROCESS FOR FORMING SHALLOW TRENCH ISOLATION STRUCTURE 有权
标题翻译：化学机械抛光工艺形成浅层分离结构
公开(公告)号：US20080029478A1
公开(公告)日：2008-02-07
申请号：US11863665
申请日：2007-09-28
申请人： Chia-Jung Hsu , Art Yu , Hsiao-Ling Lu , Teng-Chun Tsai
发明人： Chia-Jung Hsu , Art Yu , Hsiao-Ling Lu , Teng-Chun Tsai
IPC分类号： B44C1/22
CPC分类号： H01L21/76229 , H01L21/31053
摘要： A shallow trench isolation (STI) multistage chemical mechanical polishing (CMP) method for forming a shallow trench isolation structure is provided. The substrate comprising a dense region and an isolation region, a silicon nitride layer formed over the substrate, a plurality of trenches formed in the silicon nitride layer and the substrate, an oxide layer formed over the substrate, filling the trenches, wherein a width of the trenches in the dense region is smaller than that in the isolation region. A first polishing step is performed to remove a portion of the silicon oxide layer until a thickness of the remaining portion of the oxide layer reaches a predetermined thickness. A second polishing step is performed to remove a portion of the remaining portion of the silicon oxide layer until the silicon nitride layer is exposed.
摘要翻译：提供了一种用于形成浅沟槽隔离结构的浅沟槽隔离（STI）多级化学机械抛光（CMP）方法。所述基板包括致密区域和隔离区域，在所述基板上形成的氮化硅层，形成在所述氮化硅层和所述基板中的多个沟槽，形成在所述基板上方的填充所述沟槽的氧化物层，密集区域中的沟槽小于隔离区域中的沟槽。执行第一抛光步骤以除去氧化硅层的一部分直到氧化物层的剩余部分的厚度达到预定厚度。执行第二抛光步骤以去除氧化硅层的剩余部分的一部分，直到暴露氮化硅层。

2. 发明申请

US20060258158A1 Polish method for semiconductor device planarization 审中-公开
标题翻译：用于半导体器件平面化的抛光方法
公开(公告)号：US20060258158A1
公开(公告)日：2006-11-16
申请号：US11488791
申请日：2006-07-19
申请人： Zong Lin , Art Yu , Chia Hsu , Teng-Chun Tsai
发明人： Zong Lin , Art Yu , Chia Hsu , Teng-Chun Tsai
IPC分类号： H01L21/302
CPC分类号： H01L21/7684 , H01L21/31053 , H01L21/76229 , H01L21/76232
摘要： A polish method for planarization is disclosed. The method uses a combination of a traditional oxide CMP and HSP-CMP (High Selectivity and Planarization) with a fix abrasive pad to meet the requirements of the CMP process for a device feature dimension under 0.18 micron even to 0.09 micron. By using a first polish step with a conventional polish pad and an oxide polish slurry, the non-uniformity of the over-fill thickness of the STI dielectric layer can be firstly removed and a much more smooth and uniform topography favorable for the HSP-CMP process the fix abrasive polishing pad can be obtained. Then the HSP-CMP process with the fix abrasive polishing pad can be performed to provide a planarized surface with accurate dimension control.
摘要翻译：公开了一种用于平坦化的抛光方法。该方法使用传统氧化物CMP和HSP-CMP（高选择性和平面化）与固定磨料垫的组合，以满足在0.18微米甚至0.09微米下的器件特征尺寸的CMP工艺的要求。通过使用具有常规抛光垫和氧化物抛光浆料的第一抛光步骤，可以首先除去STI介电层的过度填充厚度的不均匀性，并且对HSP-CMP有利的更平滑和均匀的形貌可以获得固定磨料抛光垫的工艺。然后可以执行具有固定磨料抛光垫的HSP-CMP工艺，以提供具有精确尺寸控制的平坦化表面。

3. 发明授权

US06797190B2 Wafer carrier assembly for a chemical mechanical polishing apparatus and a polishing method using the same 有权
标题翻译：用于化学机械抛光装置的晶片载体组件和使用其的抛光方法
公开(公告)号：US06797190B2
公开(公告)日：2004-09-28
申请号：US10383983
申请日：2003-03-06
申请人： Chia-Lin Hsu , Art Yu , Shih-Hsun Hsu , Hsueh-Chung Chen
发明人： Chia-Lin Hsu , Art Yu , Shih-Hsun Hsu , Hsueh-Chung Chen
IPC分类号： B24D1100
CPC分类号： B24B37/30
摘要： A wafer carrier assembly for a chemical mechanical polishing apparatus and a polishing method using the same are provided. The present wafer carrier assembly comprises a first plate, a second plate and a flexible membrane. The first plate has a plurality of protrusions formed on a bottom surface thereof and the second plate has a plurality of apertures passing through. Each of the protrusions is matched with one of the apertures to enable the first plate and the second plate to detachably combine together. The flexible membrane is positioned under the second plate and contacts it. A surface of the flexible membrane opposite to the surface of the flexible membrane contacting the second plate provides a wafer-receiving surface.
摘要翻译：提供了一种用于化学机械抛光装置的晶片载体组件和使用其的抛光方法。本晶片载体组件包括第一板，第二板和柔性膜。第一板具有在其底表面上形成的多个突起，并且第二板具有穿过的多个孔。每个突起与其中一个孔匹配，以使得第一板和第二板能够可拆卸地组合在一起。柔性膜定位在第二板下方并与其接触。与柔性膜的与第二板接触的表面相对的柔性膜的表面提供了晶片接收表面。

4. 发明授权

US06638391B1 Wafer carrier assembly for a chemical mechanical polishing apparatus and a polishing method using the same 有权
标题翻译：用于化学机械抛光装置的晶片载体组件和使用其的抛光方法
公开(公告)号：US06638391B1
公开(公告)日：2003-10-28
申请号：US10177306
申请日：2002-06-19
申请人： Chia-Lin Hsu , Art Yu , Shih-Hsun Hsu , Hsueh-Chung Chen
发明人： Chia-Lin Hsu , Art Yu , Shih-Hsun Hsu , Hsueh-Chung Chen
IPC分类号： H01L21302
CPC分类号： B24B37/30
摘要： A wafer carrier assembly for a chemical mechanical polishing apparatus and a polishing method using the same are provided. The present wafer carrier assembly comprises a first plate, a second plate and a flexible membrane. The first plate has a plurality of protrusions formed on a bottom surface thereof and the second plate has a plurality of apertures passing through. Each of the protrusions is matched with one of the apertures to enable the first plate and the second plate to detachably combine together. The flexible membrane is positioned under the second plate and contacts it. A surface of the flexible membrane opposite to the surface of the flexible membrane contacting the second plate provides a wafer-receiving surface.
摘要翻译：提供了一种用于化学机械抛光装置的晶片载体组件和使用其的抛光方法。本晶片载体组件包括第一板，第二板和柔性膜。第一板具有在其底表面上形成的多个突起，并且第二板具有穿过的多个孔。每个突起与其中一个孔匹配，以使得第一板和第二板能够可拆卸地组合在一起。柔性膜定位在第二板下方并与其接触。与柔性膜的与第二板接触的表面相对的柔性膜的表面提供了晶片接收表面。

5. 发明授权

US07544305B2 Chemical mechanical polishing process for forming shallow trench isolation structure 有权
标题翻译：用于形成浅沟槽隔离结构的化学机械抛光工艺
公开(公告)号：US07544305B2
公开(公告)日：2009-06-09
申请号：US11863665
申请日：2007-09-28
申请人： Chia-Jung Hsu , Art Yu , Hsiao-Ling Lu , Teng-Chun Tsai
发明人： Chia-Jung Hsu , Art Yu , Hsiao-Ling Lu , Teng-Chun Tsai
IPC分类号： B44C1/22
CPC分类号： H01L21/76229 , H01L21/31053
摘要： A shallow trench isolation (STI) multistage chemical mechanical polishing (CMP) method for forming a shallow trench isolation structure is provided. The substrate comprising a dense region and an isolation region, a silicon nitride layer formed over the substrate, a plurality of trenches formed in the silicon nitride layer and the substrate, an oxide layer formed over the substrate, filling the trenches, wherein a width of the trenches in the dense region is smaller than that in the isolation region. A first polishing step is performed to remove a portion of the silicon oxide layer until a thickness of the remaining portion of the oxide layer reaches a predetermined thickness. A second polishing step is performed to remove a portion of the remaining portion of the silicon oxide layer until the silicon nitride layer is exposed.
摘要翻译：提供了一种用于形成浅沟槽隔离结构的浅沟槽隔离（STI）多级化学机械抛光（CMP）方法。所述基板包括致密区域和隔离区域，在所述基板上形成的氮化硅层，形成在所述氮化硅层和所述基板中的多个沟槽，形成在所述基板上方的填充所述沟槽的氧化物层，密集区域中的沟槽小于隔离区域中的沟槽。执行第一抛光步骤以除去氧化硅层的一部分直到氧化物层的剩余部分的厚度达到预定厚度。执行第二抛光步骤以去除氧化硅层的剩余部分的一部分，直到暴露氮化硅层。

6. 发明授权

US07172970B2 Polish method for semiconductor device planarization 有权
标题翻译：用于半导体器件平面化的抛光方法
公开(公告)号：US07172970B2
公开(公告)日：2007-02-06
申请号：US10384641
申请日：2003-03-11
申请人： Zong Huei Lin , Art Yu , Chia Rung Hsu , Teng-Chun Tsai
发明人： Zong Huei Lin , Art Yu , Chia Rung Hsu , Teng-Chun Tsai
IPC分类号： H01L21/461 , H01L21/469
CPC分类号： H01L21/7684 , H01L21/31053 , H01L21/76229 , H01L21/76232
摘要： A polish method for planarization is disclosed. The method uses a combination of a traditional oxide CMP and HSP-CMP (High Selectivity and Planarization) with a fix abrasive pad to meet the requirements of the CMP process for a device feature dimension under 0.18 micron even to 0.09 micron. By using a first polish step with a conventional polish pad and an oxide polish slurry, the non-uniformity of the over-fill thickness of the STI dielectric layer can be firstly removed and a much more smooth and uniform topography favorable for the HSP-CMP process the fix abrasive polishing pad can be obtained. Then the HSP-CMP process with the fix abrasive polishing pad can be performed to provide a planarized surface with accurate dimension control.
摘要翻译：公开了一种用于平坦化的抛光方法。该方法使用传统氧化物CMP和HSP-CMP（高选择性和平面化）与固定磨料垫的组合，以满足在0.18微米甚至0.09微米下的器件特征尺寸的CMP工艺的要求。通过使用具有常规抛光垫和氧化物抛光浆料的第一抛光步骤，可以首先除去STI介电层的过度填充厚度的不均匀性，并且对HSP-CMP有利的更平滑和均匀的形貌可以获得固定磨料抛光垫的工艺。然后可以执行具有固定磨料抛光垫的HSP-CMP工艺，以提供具有精确尺寸控制的平坦化表面。

7. 发明授权

US07294575B2 Chemical mechanical polishing process for forming shallow trench isolation structure 有权
标题翻译：用于形成浅沟槽隔离结构的化学机械抛光工艺
公开(公告)号：US07294575B2
公开(公告)日：2007-11-13
申请号：US10752362
申请日：2004-01-05
申请人： Chia-Rung Hsu , Art Yu , Hsiao-Ling Lu , Teng-Chun Tsai
发明人： Chia-Rung Hsu , Art Yu , Hsiao-Ling Lu , Teng-Chun Tsai
IPC分类号： H01L31/461
CPC分类号： H01L21/76229 , H01L21/31053
摘要： A shallow trench isolation (STI) multistage chemical mechanical polishing (CMP) method for forming a shallow trench isolation structure is provided. The substrate comprising a dense region and an isolation region, a silicon nitride layer formed over the substrate, a plurality of trenches formed in the silicon nitride layer and the substrate, an oxide layer formed over the substrate, filling the trenches, wherein a width of the trenches in the dense region is smaller than that in the isolation region. A first polishing step is performed to remove a portion of the silicon oxide layer until a thickness of the remaining portion of the oxide layer reaches a predetermined thickness. A second polishing step is performed to remove a portion of the remaining portion of the silicon oxide layer until the silicon nitride layer is exposed.
摘要翻译：提供了一种用于形成浅沟槽隔离结构的浅沟槽隔离（STI）多级化学机械抛光（CMP）方法。所述基板包括致密区域和隔离区域，在所述基板上形成的氮化硅层，形成在所述氮化硅层和所述基板中的多个沟槽，形成在所述基板上方的填充所述沟槽的氧化物层，密集区域中的沟槽小于隔离区域中的沟槽。执行第一抛光步骤以除去氧化硅层的一部分直到氧化物层的剩余部分的厚度达到预定厚度。执行第二抛光步骤以去除氧化硅层的剩余部分的一部分，直到暴露氮化硅层。

8. 发明申请

US20050148184A1 Chemical mechanical polishing process for forming shallow trench isolation structure 有权
标题翻译：用于形成浅沟槽隔离结构的化学机械抛光工艺
公开(公告)号：US20050148184A1
公开(公告)日：2005-07-07
申请号：US10752362
申请日：2004-01-05
申请人： Chia-Rung Hsu , Art Yu , Hsiao-Ling Lu , Teng-Chun Tsai
发明人： Chia-Rung Hsu , Art Yu , Hsiao-Ling Lu , Teng-Chun Tsai
IPC分类号： H01L21/302 , H01L21/3105 , H01L21/461 , H01L21/762
CPC分类号： H01L21/76229 , H01L21/31053
摘要： A shallow trench isolation (STI) multistage chemical mechanical polishing (CMP) method for forming a shallow trench isolation structure is provided. The substrate comprising a dense region and an isolation region, a silicon nitride layer formed over the substrate, a plurality of trenches formed in the silicon nitride layer and the substrate, an oxide layer formed over the substrate, filling the trenches, wherein a width of the trenches in the dense region is smaller than that in the isolation region. A first polishing step is performed to remove a portion of the silicon oxide layer until a thickness of the remaining portion of the oxide layer reaches a predetermined thickness. A second polishing step is performed to remove a portion of the remaining portion of the silicon oxide layer until the silicon nitride layer is exposed.
摘要翻译：提供了一种用于形成浅沟槽隔离结构的浅沟槽隔离（STI）多级化学机械抛光（CMP）方法。所述基板包括致密区域和隔离区域，在所述基板上形成的氮化硅层，形成在所述氮化硅层和所述基板中的多个沟槽，形成在所述基板上方的填充所述沟槽的氧化物层，密集区域中的沟槽小于隔离区域中的沟槽。执行第一抛光步骤以除去氧化硅层的一部分直到氧化物层的剩余部分的厚度达到预定厚度。执行第二抛光步骤以去除氧化硅层的剩余部分的一部分，直到暴露氮化硅层。

9. 发明申请

US20050101233A1 Polishing element 审中-公开
标题翻译：抛光元件
公开(公告)号：US20050101233A1
公开(公告)日：2005-05-12
申请号：US10718466
申请日：2003-11-19
申请人： Teng-Chun Tsai , Chia-Rung Hsu , Art Yu , Gene Li
发明人： Teng-Chun Tsai , Chia-Rung Hsu , Art Yu , Gene Li
IPC分类号： B24B37/04 , B24D13/14 , B24B5/00
CPC分类号： B24B37/26 , B24B37/245
摘要： A polishing element comprising a polishing platen, a polishing sub-pad and a polishing pad is provided. The polishing sub-pad is set up over the polishing platen and the polishing pad is set up over the polishing sub-pad. A first surface of the polishing sub-pad interfaces with the polishing pad and a second surface of the polishing sub-pad interfaces with the platen. Either the first surface or the second surface of the polishing sub-pad is an undulating surface.
摘要翻译：提供了包括研磨台板，抛光辅助垫和抛光垫的抛光元件。抛光辅助垫被设置在抛光平台上，抛光垫被设置在抛光子垫上。抛光子焊盘的第一表面与抛光垫相接，并且抛光子焊盘的第二表面与压板接合。抛光辅助垫的第一表面或第二表面是起伏的表面。

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