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81. 发明授权

US06378201B1 Method for making a printed circuit board 失效
标题翻译：制造印刷电路板的方法
公开(公告)号：US06378201B1
公开(公告)日：2002-04-30
申请号：US08497614
申请日：1995-06-30
申请人： Yutaka Tsukada , Shuhei Tsuchida
发明人： Yutaka Tsukada , Shuhei Tsuchida
IPC分类号： H01K310
CPC分类号： H05K3/4602 , H05K1/0265 , H05K3/0023 , H05K3/181 , H05K3/426 , H05K3/429 , H05K3/4661 , H05K2201/0352 , H05K2201/09327 , H05K2201/09509 , H05K2203/1438 , H05K2203/1581 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： A multilayer printed circuit board and a corresponding fabrication method are disclosed, which circuit board achieves a relatively high degree of wiring density and a relatively high degree of wiring design freedom. These advantages are obtained in the inventive printed circuit board by electrically connecting power conductors or ground conductors using through holes. On the other hand, signal conductors in any two adjacent signal wiring layers are electrically connected using via holes extending only through an intervening electrically insulating layer. Preferably, the electrically insulating layer is a layer of photosensitive resin and the via holes are formed using conventional photolithographic techniques.
摘要翻译：公开了一种多层印刷电路板和相应的制造方法，该电路板实现相对高的布线密度和相对高的布线设计自由度。通过使用通孔电连接电源导体或接地导体，在本发明的印刷电路板中获得这些优点。另一方面，任何两个相邻信号布线层中的信号导体使用仅通过中间电绝缘层延伸的通孔电连接。优选地，电绝缘层是感光树脂层，并且通孔使用常规的光刻技术形成。

82. 发明申请

US20010007289A1 Full additive process with filled plated through holes 有权
公开(公告)号：US20010007289A1
公开(公告)日：2001-07-12
申请号：US09778702
申请日：2001-02-07
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Anilkumar C. Bhatt , Voya R. Markovich , Irving Memis , William E. Wilson
IPC分类号： H01R012/04 , H05K001/00
CPC分类号： H05K3/0094 , B32B7/04 , H05K1/0306 , H05K1/113 , H05K3/0023 , H05K3/045 , H05K3/184 , H05K3/4053 , H05K3/4069 , H05K3/426 , H05K3/427 , H05K3/4605 , H05K2201/0154 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , H05K2201/10734 , H05K2203/0191 , H05K2203/025 , H05K2203/0278 , H05K2203/0338 , H05K2203/0353 , H05K2203/1152 , Y10T29/49126 , Y10T29/49144 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： A method provides for additive plating on a subcomposite having filled plated through holes. Fine-line circuitry is achieved via electroless deposition onto a dielectric substrate after the through hole is plated and filled. Fine-line circuitry may be routed over landless, plated through holes thereby increasing the aspect ratio and the available surface area for additional components and wiring.

83. 发明授权

US06212769B1 Process for manufacturing a printed wiring board 失效
标题翻译：制造印刷电路板的工艺
公开(公告)号：US06212769B1
公开(公告)日：2001-04-10
申请号：US09343077
申请日：1999-06-29
申请人： Christina M. Boyko , Robert J. Day , Kristen A. Stauffer
发明人： Christina M. Boyko , Robert J. Day , Kristen A. Stauffer
IPC分类号： H05K330
CPC分类号： H05K3/426 , H05K3/108 , H05K3/181 , H05K3/381 , H05K2203/1152 , H05K2203/122 , Y10T29/49155 , Y10T29/49165 , Y10T29/49167
摘要： The present invention teaches a simplified process for fabricating high density printed wiring boards using a semi-additive process. A roughened copper foil is laminated to a dielectric substrate. The foil is subsequently removed from the dielectric to create a roughened, irregular surface on the dielectric substrate. Vertical angle through holes and blind holes are formed in the substrate. A uniform copper commoning layer is electrolessly plated to the roughened dielectric substrate and through holes. A photoresist is applied on the surface of the electroless plated layer and irradiated through a mask having printed circuit features. After developing the photoresist the uncovered electroless layer is electrolytically plated to create the final features and circuitry. After stripping the remaining photoresist the unplated electroless copper layer is etched to electronically isolate the copper features and circuitry lines.
摘要翻译：本发明教导了使用半添加法制造高密度印刷线路板的简化方法。将粗糙化的铜箔层叠到电介质基板上。随后从电介质中去除箔以在电介质基底上产生粗糙的不规则表面。在基板上形成垂直角通孔和盲孔。将均匀的铜共同层无电镀在粗糙化的电介质基片和通孔上。将光致抗蚀剂施加在化学镀层的表面上并通过具有印刷电路特征的掩模照射。在显影光致抗蚀剂之后，未覆盖的化学镀层被电解以产生最终特征和电路。在剥离剩余的光致抗蚀剂之后，蚀刻未镀覆的无电解铜层以电绝缘铜特征和电路线。

84. 发明授权

US6004619A Process for manufacturing printed circuit boards 失效
标题翻译：印刷电路板制造工艺
公开(公告)号：US6004619A
公开(公告)日：1999-12-21
申请号：US965853
申请日：1997-11-07
申请人： Siegfrid Dippon , Walter Olbrich
发明人： Siegfrid Dippon , Walter Olbrich
IPC分类号： H05K3/42 , H05K3/00 , H05K3/02 , H05K3/04 , H05K3/10 , H05K3/14 , H05K3/18 , H05K3/38 , B05D5/12
CPC分类号： H05K3/143 , H05K3/107 , H05K2201/0376 , H05K2201/09036 , H05K3/0032 , H05K3/048 , H05K3/146 , H05K3/388 , H05K3/426 , H05K3/428 , Y10T29/49165
摘要： Process for manufacturing circuit boards in which a masking layer (2) is applied to a carrier substrate (1) of insulating material and after producing openings for soldering pads, conductor traces, and through or blind holes, in accordance with a preferred embodiment by laser ablation, a thin electrically conductive layer (5) is applied to the surface of the carrier substrate including the masking layer. Subsequently, the masking layer (2) and the conductive layer deposited thereon, for example copper, are removed and the remaining metal surfaces (6) are chemically reinforced to produce the desired thickness. The process permits the production of dense structures using few process steps and without additional abrasion steps.
摘要翻译：用于制造电路板的方法，其中掩模层（2）施加到绝缘材料的载体基板（1）上，并且根据优选实施例通过激光产生用于焊盘，导体迹线和通孔或盲孔的开口在包括掩模层的载体衬底的表面上施加薄的导电层（5）。随后，去除掩蔽层（2）和沉积在其上的导电层，例如铜，并且剩余的金属表面（6）被化学强化以产生所需的厚度。该方法允许使用很少的工艺步骤生产致密结构，而不需要额外的磨损步骤。

85. 发明授权

US5935405A Process for producing rigid and flexible circuits 失效
标题翻译：生产刚性和柔性电路的工艺
公开(公告)号：US5935405A
公开(公告)日：1999-08-10
申请号：US926111
申请日：1997-09-09
申请人： Gerhard-Dieter Wolf , Friedrich Jonas
发明人： Gerhard-Dieter Wolf , Friedrich Jonas
IPC分类号： H05K3/10 , H05K3/18 , H05K3/42 , C25D5/02
CPC分类号： H05K3/188 , C25D5/022 , H05K3/108 , H05K2201/0329 , H05K2203/1142 , H05K3/426
摘要： Rigid or flexible circuits of electrically conductor tracks can be produced on flexible or rigid, non-conductive support materials bya) coating the surfaces of the support materials including existing drill holes with a primer and a conductive polymer, preferably poly-3,4-ethylendioxythiophene, which may contain binders,b) applying an electroplating resist in the form of the negative image of the conductor tracks,c) metallizing by electroplating the surface kept free by the electroplating resist, including existing drill holes, in the form of the positive image of the conductor tracks,d) removing the electroplating resist ande) removing the conductive polymer, which had been below the electroplating resist, or converting it to a non-conductive form, wherein the conductor tracks are electrically interconnected during the metallizing step by the layer of conductive polymer, thereby avoiding the need to individually contact each conductor track.
摘要翻译：电导体轨道的刚性或柔性电路可以通过以下方式在柔性或刚性的非导电支撑材料上制造：a）用底漆和导电聚合物涂覆包括现有钻孔的载体材料的表面，优选聚3,4- 乙烯二氧噻吩，其可以包含粘合剂，b）以导体轨迹的负像形式施加电镀抗蚀剂，c）通过电镀由电镀抗蚀剂保持的表面（包括现有的钻孔）以阳性形式进行金属化导体轨迹的图像，d）去除电镀抗蚀剂，以及e）去除已经在电镀抗蚀剂下面的导电聚合物，或将其转换成非导电形式，其中导体轨道在金属化步骤期间电互连，导电聚合物层，从而避免需要单独接触每个导体轨道。

86. 发明授权

US5896655A Method for manufacturing electrically conductive lead-throughs in metallized plastic housings 失效
标题翻译：用于在金属化塑料外壳中制造导电引线的方法
公开(公告)号：US5896655A
公开(公告)日：1999-04-27
申请号：US834749
申请日：1997-04-03
申请人： Dieter Knodler
发明人： Dieter Knodler
IPC分类号： H01R43/20 , H05K1/11 , H05K3/04 , H05K3/30 , H05K3/34 , H05K3/42 , H05K9/00 , H01R43/00
CPC分类号： H05K1/116 , H01R43/20 , H05K3/045 , H05K9/0018 , H05K2201/0715 , H05K2201/09036 , H05K2201/09045 , H05K2201/09118 , H05K2201/09827 , H05K2201/09845 , H05K2201/10303 , H05K2201/10871 , H05K3/308 , H05K3/3447 , H05K3/426 , Y10T29/49139 , Y10T29/49153 , Y10T29/49211 , Y10T29/49222
摘要： A method for the manufacture of electrically conductive lead-throughs for metallized plastic housings. Elevations around the lead-through holes in the housing part are formed at the time of making the housing part (e.g. by injection molding). The entire surface of the housing part is then metallized and the metallization on the elevations around the lead-through holes is removed by mechanical processes that act in one plane and where the lower metallization areas remain unaffected on account of the difference in level. Finally, the metal pins are attached in the lead-through holes by soldering or glueing.
摘要翻译：一种用于制造用于金属化塑料外壳的导电引线的方法。在制造壳体部分时（例如通过注模）形成壳体部分中的引导孔周围的高度。然后将壳体部分的整个表面进行金属化，并且通过在一个平面中起作用的机械工艺去除引线通孔周围的高度上的金属化，并且由于水平差异，下部金属化区域保持不受影响。最后，金属销通过焊接或胶合连接在导通孔中。

87. 发明授权

US5454927A Ceramic substrates with highly conductive metal vias 失效
标题翻译：具有高导电性金属通孔的陶瓷基板
公开(公告)号：US5454927A
公开(公告)日：1995-10-03
申请号：US294263
申请日：1994-08-23
申请人： Kenneth Credle , Christopher G. Wolf , John McConnell
发明人： Kenneth Credle , Christopher G. Wolf , John McConnell
IPC分类号： H05K1/03 , H05K3/10 , H05K3/40 , H05K3/42 , C25D5/02 , C25D5/50
CPC分类号： H05K3/426 , H05K3/4038 , H05K1/0306 , H05K2201/09563 , H05K2201/09736 , H05K2203/025 , H05K2203/1105 , H05K2203/128 , H05K3/108
摘要： A ceramic substrate is provided with filled via holes for electrical or thermal feedthrough to or from an electronic device, each via hole having at least one dimension from about 4 to about 50 mils. The via holes are filled with copper, silver or gold for high conductivity and the filling is without visible voids at a magnification of 1000 diameters. The filling is preferably hermetic and is achieved by first electrodepositing metal into the holes and extending therefrom as dumbbell shaped plugs and then heating the substrate to the melting point of the metal so that metal from the dumbbell ends enters the connecting portion within the via hole to seal any aperture therein.
摘要翻译：陶瓷基板上设置有用于向或从电子设备供电或热馈送的填充通孔，每个通孔具有约4至约50密耳的至少一个尺寸。通孔填充有铜，银或金，用于高导电性，并且填充在1000直径的放大倍率下不具有可见的空隙。填充物优选是气密的，并且通过首先将金属电沉积到孔中并作为哑铃形塞从其中延伸，然后将基底加热到金属的熔点，使得来自哑铃末端的金属进入通孔内的连接部分，密封其中的任何孔。

88. 发明授权

US5447996A Adhesive comprising cured amino resin powder for printed circuit board 失效
标题翻译：粘合剂包括用于印刷电路板的固化的氨基树脂粉末
公开(公告)号：US5447996A
公开(公告)日：1995-09-05
申请号：US248209
申请日：1994-05-24
申请人： Motoo Asai , Chie Onishi
发明人： Motoo Asai , Chie Onishi
IPC分类号： C08G59/18 , C08G59/38 , C08L63/00 , C09J7/00 , C09J163/00 , H01B3/40 , H05K3/00 , H05K3/18 , H05K3/38 , H05K3/42 , H05K3/46 , C09J7/02 , C09J161/24 , C09J161/28
CPC分类号： H05K3/4661 , C08G59/18 , C08G59/38 , C08L63/00 , C09J163/00 , C09J7/00 , H01B3/40 , H05K3/387 , H05K2201/0154 , H05K2201/0212 , H05K2203/0143 , H05K2203/066 , H05K2203/0773 , H05K2203/0789 , H05K2203/0796 , H05K3/0035 , H05K3/181 , H05K3/184 , H05K3/426 , H05K3/4644 , Y10S428/901 , Y10S525/934 , Y10S525/935 , Y10T428/24843 , Y10T428/24893 , Y10T428/24917 , Y10T428/24926 , Y10T442/674
摘要： There are disclosed an adhesive obtained by dispersing a cured amino resin fine powder soluble in acid or oxidizing agent into an uncured heat-resistant resin matrix hardly soluble in acid or oxidizing agent when being subjected to a curing treatment as well as a printed circuit board using this adhesive and a method of producing the same. The adhesive has excellent properties such as resistance to chemicals, heat resistance, electric properties, hardness and adhesion property owing to the use of the amino resin fine powder. Therefore, the printed circuit board using such an adhesive is not influenced by service circumstance and is high in the connection reliability without forming short circuit between patterns. Furthermore, in the method of producing the printed circuit board, the adhesive is provided in form of a sheet-or a prepreg, whereby the printed circuit board can be produced easily and cheaply.
摘要翻译：公开了一种粘合剂，其通过将可溶于酸或氧化剂的固化的氨基树脂细粉末分散在难溶于酸或氧化剂的未固化的耐热树脂基质中，以及使用该粘合剂及其制造方法。粘合剂由于使用氨基树脂细粉而具有优异的性能，如耐化学性，耐热性，电性能，硬度和粘合性。因此，使用这种粘合剂的印刷电路板不受服务环境的影响，连接可靠性高，不会形成图案之间的短路。此外，在制造印刷电路板的方法中，粘合剂以片状或预浸料的形式提供，从而可以容易且便宜地制造印刷电路板。

89. 发明授权

US5355019A Devices with tape automated bonding 失效
标题翻译：带胶带自动粘接的设备
公开(公告)号：US5355019A
公开(公告)日：1994-10-11
申请号：US845898
申请日：1992-03-04
申请人： Harold E. Fuchs
发明人： Harold E. Fuchs
IPC分类号： H01L21/60 , H01L21/48 , H01L23/498 , H01L23/538 , H05K1/00 , H05K1/11 , H05K3/00 , H05K3/24 , H05K3/42 , H01L23/48 , H01L29/44 , H01L29/52 , H01L29/60
CPC分类号： H01L23/5389 , H01L21/486 , H01L23/4985 , H05K1/112 , H01L2224/16 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/15173 , H05K1/0393 , H05K2201/0154 , H05K2201/0344 , H05K2201/10674 , H05K2203/0455 , H05K3/0032 , H05K3/243 , H05K3/426
摘要： Disclosed is a method for fabricating devices, and the resulting products, using Tape Automated Bonding (TAB) technology. Via holes are formed through a flexible insulating layer, such as polyimide, and are plated through when conductive fingers are formed on one surface of the layer. The resulting structure is then bonded to a semiconductor chip by means of the conductive pads formed on the surface of the insulating layer opposite to the conductive fingers.
摘要翻译：公开了一种用于制造器件的方法，以及使用带式自动接合（TAB）技术的所得产品。通过柔性绝缘层（例如聚酰亚胺）形成通孔，并且当在该层的一个表面上形成导电指状物时，通孔被电镀。然后通过形成在与导电指状物相对的绝缘层的表面上的导电焊盘将所得结构结合到半导体芯片。

90. 发明授权

US5162260A Stacked solid via formation in integrated circuit systems 失效
标题翻译：集成电路系统中堆叠固体通孔形成
公开(公告)号：US5162260A
公开(公告)日：1992-11-10
申请号：US638885
申请日：1991-01-07
申请人： Jacques Leibovitz , Maria L. Cobarruviaz , Kenneth D. Scholz , Clinton C. Chao
发明人： Jacques Leibovitz , Maria L. Cobarruviaz , Kenneth D. Scholz , Clinton C. Chao
IPC分类号： H01L23/522 , H05K3/00 , H05K3/24 , H05K3/38 , H05K3/42 , H05K3/46
CPC分类号： H05K3/421 , H01L23/5226 , H05K3/4647 , H01L2924/0002 , H01L2924/3011 , H05K2201/0154 , H05K2201/09563 , H05K2203/0542 , H05K2203/0733 , H05K3/0041 , H05K3/243 , H05K3/388 , H05K3/423 , H05K3/426 , H05K3/467
摘要： A method of forming solid copper vias in a dielectric layer permits stacked vias in a multi-chip carrier. A dielectric layer is deposited over a substrate and lines of a first interconnect layer formed on the substrate. An aperture formed in the dielectric layer is filled with copper by deposition to form a hollow via. Using a photoresist mask, the hollow via is filled solid by electroplating a second amount of copper. The photoresist is then stripped and excess copper extending from the via is polished flat. A second interconnect layer can be formed on the resulting structure. The foregoing steps can be iterated to build a multi-layer structure with stacked vias.
摘要翻译：在介电层中形成固体铜通孔的方法允许在多芯片载体中的堆叠通孔。电介质层沉积在衬底上并形成在衬底上的第一互连层的线。通过沉积形成在电介质层中的孔用铜填充以形成中空的通孔。使用光致抗蚀剂掩模，通过电镀第二量的铜来填充固体的中空孔。然后剥离光致抗蚀剂并且从通孔延伸的多余的铜被抛光平坦。可以在所得结构上形成第二互连层。可以迭代上述步骤以构建具有堆叠通孔的多层结构。

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