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81. 发明授权

US06381316B2 Enhanced communication platform and related communication method using the platform 有权
标题翻译：增强通信平台和相关通信方式使用该平台
公开(公告)号：US06381316B2
公开(公告)日：2002-04-30
申请号：US09851382
申请日：2001-05-09
申请人： Simon James Joyce , Prafulla C. Gupta , Manohar S. Vaidya , Rajesh Alla , Ashok K. Reddy , Sree Ram Murphy Ayyala , Richa Gupta , Alok Kaushal , Jampana Lakshmi Jagannadha Siva Kumara Verma , Prasad Undavalli , Kondal Rao Nallajerla , Sivaramayya Bonajiri , Krishna Mohan Sistla , Amba Prasad Gudipati , Biswajit Sundar Ray , Raghuram Govind , Janaki Rama Raju , Kalluri Veerabhadra Rao , Sathi Devi Venkata Ravi , Ram Kuma Mambakkam Kachapesvaran , Surya Sekhar Velpuri , Bhanumurthy Nallagonda
发明人： Simon James Joyce , Prafulla C. Gupta , Manohar S. Vaidya , Rajesh Alla , Ashok K. Reddy , Sree Ram Murphy Ayyala , Richa Gupta , Alok Kaushal , Jampana Lakshmi Jagannadha Siva Kumara Verma , Prasad Undavalli , Kondal Rao Nallajerla , Sivaramayya Bonajiri , Krishna Mohan Sistla , Amba Prasad Gudipati , Biswajit Sundar Ray , Raghuram Govind , Janaki Rama Raju , Kalluri Veerabhadra Rao , Sathi Devi Venkata Ravi , Ram Kuma Mambakkam Kachapesvaran , Surya Sekhar Velpuri , Bhanumurthy Nallagonda
IPC分类号： H04M1500
CPC分类号： G06Q20/405 , G06Q20/00 , G06Q20/32 , G06Q20/3224 , G06Q20/325 , G06Q20/347 , G06Q20/363 , G06Q20/3821 , G06Q20/4016 , G06Q20/403 , G06Q20/409 , G07F7/0866 , G07F7/10 , G07F7/1025 , G07F7/122 , H04L63/10 , H04L63/126 , H04M15/00 , H04M15/68 , H04M15/8038 , H04M15/854 , H04M2215/0196 , H04M2215/32 , H04M2215/34 , H04M2215/7442 , H04M2215/8166 , H04Q3/0029 , H04Q2213/13003 , H04Q2213/1305 , H04Q2213/13093 , H04Q2213/13095 , H04Q2213/13098 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13109 , H04Q2213/1313 , H04Q2213/13134 , H04Q2213/1315 , H04Q2213/13152 , H04Q2213/13176 , H04Q2213/13204 , H04Q2213/1322 , H04Q2213/1324 , H04Q2213/13274 , H04Q2213/13282 , H04Q2213/1332 , H04Q2213/13331 , H04Q2213/1334 , H04Q2213/13345 , H04Q2213/13349 , H04Q2213/13372 , H04Q2213/13377 , H04Q2213/13389 , H04Q2213/13405 , H04W12/10 , H04W12/12
摘要： An advanced intelligent communication system that provides subscriber-requested, advanced communication services through existing communication switches even in those circumstances in which the hardware communication switch is not configured to provide such communication services. The system supports the use of personal identification number access cards for use in fixed and mobile markets from any communication device located anywhere in the world and provides flexible call processing and switching services that deliver enhanced computer telephony capabilities utilizing standard communication equipment and operating systems.
摘要翻译：一种先进的智能通信系统，即使在硬件通信交换机未配置为提供这种通信服务的情况下，也可通过现有通信交换机提供用户请求的高级通信服务。该系统支持使用位于世界任何地方的任何通信设备在固定和移动市场中使用的个人识别号码接入卡，并提供使用标准通信设备和操作系统提供增强的计算机电话能力的灵活呼叫处理和交换服务。

82. 发明授权

US06381247B1 Service independent switch interface 有权
标题翻译：服务独立开关接口
公开(公告)号：US06381247B1
公开(公告)日：2002-04-30
申请号：US09215464
申请日：1998-12-17
申请人： Ernst August Munter , Chris W. L. Hobbs
发明人： Ernst August Munter , Chris W. L. Hobbs
IPC分类号： H04L1256
CPC分类号： H04Q11/04 , H04Q2213/1301 , H04Q2213/1302 , H04Q2213/1304 , H04Q2213/13076 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13109 , H04Q2213/13204 , H04Q2213/13213 , H04Q2213/1329 , H04Q2213/13296 , H04Q2213/1332 , H04Q2213/13322 , H04Q2213/13389
摘要： A switch interface connected between a fiber optic cable and a switching fabric includes a line interface block, a fabric interface block, and ingress and egress data transfer blocks coupled independently between the line interface and fabric interface blocks. The ingress data transfer block has a cross-connection block connected to the line interface block, four memories, two processors, and the fabric interface block. With use of the cross-connection block, at any one time, one memory is coupled to the line interface block, one memory is coupled to one processor, one memory is coupled to the other processor, and the last memory is coupled to the fabric interface. Controlled by a memory control, the memories rotate which block each is coupled to, so that each memory is coupled to every block within a single cycle. Therefore, data information units traversing the ingress data transfer block do not require to be transferred between memories during the processing stages. The egress data transfer block operates in a similar fashion.
摘要翻译：连接在光纤电缆和交换结构之间的交换接口包括线接口块，结构接口块，以及独立地在线路接口和接口块之间耦合的入口和出口数据传输块。入口数据传输块具有连接到线路接口块，四个存储器，两个处理器和结构接口块的交叉连接块。使用交叉连接块，在任何一个时间，一个存储器耦合到线路接口块，一个存储器耦合到一个处理器，一个存储器耦合到另一个处理器，并且最后一个存储器耦合到该结构接口。由存储器控制控制，存储器旋转哪个块被耦合到，使得每个存储器在单个周期内耦合到每个块。因此，在处理阶段期间，不需要在存储器之间传送通过入口数据传送块的数据信息单元。出口数据传输块以类似的方式操作。

83. 发明授权

US06381239B1 Multiple application switching platform and method 有权
标题翻译：多应用交换平台和方法
公开(公告)号：US06381239B1
公开(公告)日：2002-04-30
申请号：US09125217
申请日：1998-08-13
申请人： Roger F. Atkinson , Simon S. Ng , Robert J. Siefert , William Ashley , Kenneth A. Beckman , Raymond Klein
发明人： Roger F. Atkinson , Simon S. Ng , Robert J. Siefert , William Ashley , Kenneth A. Beckman , Raymond Klein
IPC分类号： H04Q1104
CPC分类号： H04Q11/0407 , H04M3/005 , H04M3/007 , H04M9/025 , H04Q3/5455 , H04Q2213/13003 , H04Q2213/1305 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13109 , H04Q2213/1313 , H04Q2213/13174 , H04Q2213/13176 , H04Q2213/13191 , H04Q2213/13204 , H04Q2213/13209 , H04Q2213/13213 , H04Q2213/13292 , H04Q2213/13299 , H04Q2213/13305 , H04Q2213/1332 , H04Q2213/13322 , H04Q2213/1334 , H04Q2213/13376 , H04Q2213/13381
摘要： A multiple application switching platform includes a switch having a distributed open architecture and incorporating redundancy for enhanced fault tolerance. The switch includes at least one shelf having a midplane (1) containing message buses and TDM data buses (A and B). Shelves may be interconnected to form a group wherein various circuit cards are connected to each shelf midplane. The circuit cards (4, 5 and 6) perform call processing wherein each card within a group accessing a data bus is pre-assigned a unique set of time slots for each data bus within which that card may transmit onto that data bus. Each circuit card further includes an identification number that enables each card an opportunity to transmit onto a message bus (A and B). The circuit cards (4, 5 and 6) include line or trunk switch cards that function as an independent switch to interface line or trunks to a shelf midplane. Communications between lines or trunks connected to any group shelf is facilitated by switch cards communicating with each other via messages sent over the message buses (A and B).
摘要翻译：多应用交换平台包括具有分布式开放架构的交换机并且包括用于增强的容错的冗余。交换机包括至少一个具有包含消息总线和TDM数据总线（A和B）的中平面（1）的机架。搁板可以互连以形成一组，其中各个电路卡连接到每个货架中平面。电路卡（4,5和6）执行呼叫处理，其中访问数据总线的组内的每个卡被预分配了用于该卡可以在该数据总线上发送的每个数据总线的唯一的一组时隙。每个电路卡还包括使每个卡有机会发送到消息总线（A和B）上的标识号。电路卡（4,5和6）包括线路或中继交换机卡，其作为独立开关，将线路或中继线连接到货架中间板。通过通过消息总线（A和B）发送的消息彼此通信的交换卡来促进连接到任何组架的线路或中继线之间的通信。

84. 发明申请

US20020044566A1 PACKAGE HAVING FACILITY FOR PERFORMING MUTUAL CONVERSION AMONG DIFFERENT KINDS OF SIGNALING SIGNALS, TIME-DIVISION MULTIPLEXER EQUIPPED WITH PACKAGE, AND SPEECH HANDLING NETWORK USING TIME-DIVISION MULTIPLEXER 失效
公开(公告)号：US20020044566A1
公开(公告)日：2002-04-18
申请号：US08938258
申请日：1997-09-26
发明人： KIMIHIDE ONO
IPC分类号： H04L012/28
CPC分类号： H04J3/12 , H04J3/1635 , H04Q11/0407 , H04Q2213/13034 , H04Q2213/13141 , H04Q2213/13176 , H04Q2213/13204 , H04Q2213/13213 , H04Q2213/13216 , H04Q2213/13292 , H04Q2213/1332 , H04Q2213/1334 , H04Q2213/13378 , H04Q2213/13395
摘要： A package for performing mutual conversion between a first signaling signal and a second signaling signal, including a first signaling signal converting unit for outputting mutually converted first and second signaling signals and outputting a current state information based on preceding state information and current first and second signaling signals; a second signaling state holding unit for holding the current state information up to the next frame; and a timer unit for detecting that a current state information matching with the predetermined state information appears and outputting a time-out signal after an elapse of a predetermined time. Further, this package is included to realize a time-division multiplexer. By this, in a speech handling network in which exchanges of different kinds of signaling signal systems are mixed, the mixing thereof is easily and simply enabled by an introduction of the package equipped with the signaling signal conversion facility.

85. 发明授权

US06373848B1 Architecture for a multi-port adapter with a single media access control (MAC) 失效
标题翻译：具有单媒体访问控制（MAC）的多端口适配器的体系结构
公开(公告)号：US06373848B1
公开(公告)日：2002-04-16
申请号：US09123899
申请日：1998-07-28
申请人： Samuel Steven Allison , Kenneth James Barker
发明人： Samuel Steven Allison , Kenneth James Barker
IPC分类号： H04L1256
CPC分类号： H04Q11/0471 , H04L29/06 , H04L69/32 , H04L69/324 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13141 , H04Q2213/13174 , H04Q2213/13202 , H04Q2213/13209 , H04Q2213/13214 , H04Q2213/13215 , H04Q2213/13216 , H04Q2213/1329 , H04Q2213/13299 , H04Q2213/1332 , H04Q2213/13322 , H04Q2213/13389
摘要： A multi-port adapter having a single MAC chip has reduced logic circuits for transferring data between a host system and a TDM communication system. The MAC chip includes a transmit MAC and a receive MAC, each coupled at one end to a port multiplexer through an interface and at the other end to respective storage registers. The port multiplexer is coupled to the Physical Layer of each port. Transmit and receive state registers track the state of each port in the transfer of data in the transmit and receive directions. The storage registers are coupled through a host bus interface to a host bus and to the host system. Control logic is coupled to the storage register to control the transfer of data between the system and the storage registers. A port selector coupled between the multiplexer and the transmit and receive state registers selects ports for transfer of data in succession. On each chip clock cycle, the port selector selects a state machine register to determine the state of the MACs for processing the data and a section of the FIFO's to write or read data for the selected port. At the end of the cycle, the state registers are set and stay set until selected again. The process repeats for each port in a cyclic manner. Once data is accumulated in the receive storage register, control logic reads the data of the host bus. Once space is available in the transmit storage register, the control logic writes data from the host system to the transmit storage register.
摘要翻译：具有单个MAC芯片的多端口适配器具有用于在主机系统和TDM通信系统之间传送数据的减少的逻辑电路。 MAC芯片包括发送MAC和接收MAC，每个MAC在一端通过接口耦合到端口多路复用器，另一端通过相应的存储寄存器耦合。端口复用器耦合到每个端口的物理层。发送和接收状态寄存器跟踪发送和接收方向中数据传输中每个端口的状态。存储寄存器通过主机总线接口耦合到主机总线和主机系统。控制逻辑耦合到存储寄存器以控制系统和存储寄存器之间的数据传输。耦合在多路复用器和发送和接收状态寄存器之间的端口选择器选择用于连续传输数据的端口。在每个芯片时钟周期中，端口选择器选择一个状态机寄存器来确定用于处理数据的MAC的状态以及FIFO的一部分来写入或读取所选端口的数据。在循环结束时，状态寄存器被设置并保持置位，直到再次选择。该过程以循环方式重复每个端口。一旦数据在接收存储寄存器中累积，控制逻辑读取主机总线的数据。一旦发送存储寄存器中有空间，控制逻辑将数据从主机系统写入发送存储寄存器。

86. 发明申请

US20020039409A1 Voice-data telephonic interface control system 审中-公开
公开(公告)号：US20020039409A1
公开(公告)日：2002-04-04
申请号：US09835146
申请日：2001-04-13
申请人： Ronald A. Katz Technology Licensing, L.P.
发明人： Ronald A. Katz
IPC分类号： H04M011/00
CPC分类号： G07C11/00 , A63F2003/086 , G07C15/005 , G07C15/006 , H04M3/36 , H04M3/38 , H04M3/42042 , H04M3/42059 , H04M3/436 , H04M3/46 , H04M3/493 , H04M3/51 , H04M3/5166 , H04M11/00 , H04M2201/40 , H04M2203/2016 , H04M2242/22 , H04Q3/002 , H04Q3/54533 , H04Q3/5455 , H04Q3/54591 , H04Q3/665 , H04Q3/72 , H04Q3/74 , H04Q2213/13034 , H04Q2213/13072 , H04Q2213/1309 , H04Q2213/13091 , H04Q2213/13093 , H04Q2213/13095 , H04Q2213/13096 , H04Q2213/13097 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13107 , H04Q2213/1316 , H04Q2213/13173 , H04Q2213/13175 , H04Q2213/13178 , H04Q2213/13204 , H04Q2213/1322 , H04Q2213/13256 , H04Q2213/1328 , H04Q2213/1332 , H04Q2213/13349 , H04Q2213/1337 , H04Q2213/13375 , H04Q2213/13376 , H04Q2213/13377
摘要： In an audio-digital telephone interface system, selective operation prompts a caller with oral instructions to provide: digital control signals, digital data signals (numeric) or audio signals. Inbound and outbound operations are involved and inbound callers are qualified as by automatic number identification (ANI) signals and consumable key operation. A data cell is loaded in accordance with an operating program and the resulting data packet is flagged depending on the presence of audio signals. Data packets are returned to storage, as for subsequent addressing to call up, as to process or cue a caller. The illustrative format receives and organizes order data for goods or services or to isolate a subset or a sub-subset of callers.

87. 发明授权

US06335936B1 Wide area communication networking 有权
标题翻译：广域通信网络
公开(公告)号：US06335936B1
公开(公告)日：2002-01-01
申请号：US09296954
申请日：1999-04-22
申请人： Robert Wesley Bossemeyer, Jr. , Dale Brian Halling , Scott Christopher Goering , Michael George Gorman , Denise Violetta Kagan , Jeffrey Neumann , Michael Steven Pickard , Michael Tisiker , Bruce Edward Stuckman
发明人： Robert Wesley Bossemeyer, Jr. , Dale Brian Halling , Scott Christopher Goering , Michael George Gorman , Denise Violetta Kagan , Jeffrey Neumann , Michael Steven Pickard , Michael Tisiker , Bruce Edward Stuckman
IPC分类号： H04L1256
CPC分类号： H04Q11/0428 , H04L12/2856 , H04L12/2883 , H04L12/2889 , H04L12/4608 , H04L12/5692 , H04L12/66 , H04L29/06 , H04L69/08 , H04M7/0069 , H04M7/1215 , H04M11/062 , H04Q11/04 , H04Q2213/13003 , H04Q2213/13034 , H04Q2213/13039 , H04Q2213/13076 , H04Q2213/13093 , H04Q2213/13096 , H04Q2213/13099 , H04Q2213/13175 , H04Q2213/13196 , H04Q2213/13202 , H04Q2213/13204 , H04Q2213/13209 , H04Q2213/1329 , H04Q2213/13296 , H04Q2213/13298 , H04Q2213/13299 , H04Q2213/1332 , H04Q2213/1334 , H04Q2213/13384 , H04Q2213/13389 , H04Q2213/13399
摘要： A wide area communications network (500) includes a first digital subscriber line (502). A first network interface device (504) connects to the digital subscriber line (502). The first network interface device (504) separates an ISDN channel (508) from a digital subscriber channel (510). An ISDN telephone (508) is connected to the network interface device (504). A protocol translator (512) is connected to the network interface device (504) by the digital subscriber channel (510). A hub (514) is connected to the protocol translator (512). A plurality of devices (516, 518) is connected to the hub (514). A digital subscriber line access multiplexer (506) is connected to the first digital subscriber line (502). The digital subscriber line access multiplexer (506) separates the digital subscriber channel from the ISDN channel (522). A public switched telephone network (523) is connected to the ISDN channel (522). An asynchronous transfer mode network (526) is connected to the DSLAM (506) by a first virtual circuit (524) of the digital subscriber channel. An ISP (528) is connected to the DSLAM (506) by a second virtual circuit (530) of the digital subscriber channel. A LAN 532 is connected to the ATM network (526) by the first virtual circuit (524).
摘要翻译：广域通信网络（500）包括第一数字用户线路（502）。第一网络接口设备（504）连接到数字用户线路（502）。第一网络接口设备（504）将ISDN信道（508）与数字用户信道（510）分离。 ISDN电话（508）连接到网络接口设备（504）。协议转换器（512）由数字用户信道（510）连接到网络接口设备（504）。集线器（514）连接到协议转换器（512）。多个设备（516,518）连接到集线器（514）。数字用户线路接入复用器（506）连接到第一数字用户线路（502）。数字用户线接入复用器（506）将数字用户信道与ISDN信道（522）分离。公共交换电话网络（523）连接到ISDN信道（522）。异步传输模式网络（526）由数字用户信道的第一虚拟电路（524）连接到DSLAM（506）。 ISP（528）通过数字用户信道的第二虚拟电路（530）连接到DSLAM（506）。 LAN 532通过第一虚拟电路（524）连接到ATM网络（526）。

88. 发明申请

US20010055310A1 Signal processing apparatus 审中-公开
标题翻译：信号处理装置
公开(公告)号：US20010055310A1
公开(公告)日：2001-12-27
申请号：US09923061
申请日：2001-08-06
发明人： Noboru Kobayashi , Naoji Fujino , Hideaki Kurihara , Mitsuru Tsuboi , Teruyuki Sato , Fumiaki Nishida
IPC分类号： H04B007/212 , H04L012/43
CPC分类号： H04Q11/0421 , H04Q2213/13034 , H04Q2213/13056 , H04Q2213/13103 , H04Q2213/13107 , H04Q2213/13216 , H04Q2213/13292 , H04Q2213/13299 , H04Q2213/1332 , H04Q2213/13322 , H04Q2213/13376 , H04Q2213/13396
摘要： A signal processing apparatus for assigning channels to a plurality of DSP's to be used comprises a control circuit for controlling the DSP's, a library for storing a plurality of signal processing algorithms, and a channel assignment table. The control circuit, when an assignment designation of a channel and an algorithm for each of the DSP's is received, compares the designated algorithm with the algorithms having been already downloaded to the DSP's based on the table, thereby downloading only an algorithm required to be newly downloaded from the library to the DSP's or between the DSP's and assigning the downloaded algorithm to the received channel. The channel assignment table can fixedly/variably store a relationship between processing positions (time slots) in addition to the relationship between the channels and the DSP's. In the presence of an empty processing position in a DSP, the algorithm is newly downloaded from the concerned DSP, while in the absence of an empty processing position in a DSP, the algorithm is downloaded from another DSP, and then the table is updated.
摘要翻译：用于向要使用的多个DSP分配信道的信号处理装置包括用于控制DSP的控制电路，用于存储多个信号处理算法的库和信道分配表。控制电路当接收到每个DSP的通道的分配指定和算法时，根据该表将指定的算法与已经下载到DSP的算法进行比较，从而仅下载需要新的算法从库中下载到DSP或DSP之间，并将下载的算法分配给接收的通道。频道分配表除了频道和DSP之间的关系之外，可以固定/可变地存储处理位置（时隙）之间的关系。在DSP中存在空处理位置的情况下，该算法从相关DSP新下载，而在DSP中没有空处理位置时，该算法从另一个DSP下载，然后更新表。

89. 发明授权

US06334153B2 Passing a communication control block from host to a local device such that a message is processed on the device 有权
标题翻译：将通信控制块从主机传递到本地设备，以便在设备上处理消息
公开(公告)号：US06334153B2
公开(公告)日：2001-12-25
申请号：US09748936
申请日：2000-12-26
申请人： Laurence B. Boucher , Stephen E. J. Blightman , Peter K. Craft , David A. Higgen , Clive M. Philbrick , Daryl D. Starr
发明人： Laurence B. Boucher , Stephen E. J. Blightman , Peter K. Craft , David A. Higgen , Clive M. Philbrick , Daryl D. Starr
IPC分类号： G06F1516
CPC分类号： H04L69/169 , G06F5/10 , H04L29/06 , H04L29/12009 , H04L29/12018 , H04L45/00 , H04L45/245 , H04L49/90 , H04L49/901 , H04L49/9063 , H04L49/9094 , H04L61/10 , H04L61/25 , H04L67/10 , H04L67/325 , H04L67/327 , H04L67/34 , H04L69/08 , H04L69/12 , H04L69/16 , H04L69/161 , H04L69/162 , H04L69/163 , H04L69/165 , H04L69/166 , H04L69/168 , H04L69/18 , H04L69/22 , H04L69/32 , H04Q3/0029 , H04Q2213/13093 , H04Q2213/13103 , H04Q2213/13204 , H04Q2213/13299 , H04Q2213/1332 , H04Q2213/13345
摘要： A system for protocol processing in a computer network has an intelligent network interface card (INIC) or communication processing device (CPD) associated with a host computer. The INIC provides a fast-path that avoids protocol processing for most large multi-packet messages, greatly accelerating data communication. The INIC also assists the host for those message packets that are chosen for processing by host software layers. A communication control block for a message is defined that allows DMA controllers of the INIC to move data, free of headers, directly to or from a destination or source in the host. The context is stored in the INIC as a communication control block (CCB) that can be passed back to the host for message processing by the host. The INIC contains specialized hardware circuits that are much faster at their specific tasks than a general purpose CPU. A preferred embodiment includes a trio of pipelined processors with separate processors devoted to transmit, receive and management processing, with full duplex communication for four fast Ethernet nodes.
摘要翻译：计算机网络中用于协议处理的系统具有与主计算机相关联的智能网络接口卡（INIC）或通信处理设备（CPD）。 INIC提供了一种快速路径，避免了大多数大数据包消息的协议处理，大大加速了数据通信。 INIC还协助主机处理由主机软件层进行处理的消息包。定义了消息的通信控制块，允许INIC的DMA控制器将头文件的数据直接移动到主机中的目的地或源的目的地或来源。上下文作为通信控制块（CCB）存储在INIC中，该控制块可以被传送回主机以进行主机的消息处理。 INIC包含专门的硬件电路，其特定任务比通用CPU快得多。优选实施例包括三个流水线处理器，其具有专用于发送，接收和管理处理的独立处理器，具有用于四个快速以太网节点的全双工通信。

90. 发明申请

US20010047433A1 Obtaining a destination address so that a network interface device can write network data without headers directly into host memory 有权
标题翻译：获取目标地址，以便网络接口设备可以将头文件直接写入主机内存
公开(公告)号：US20010047433A1
公开(公告)日：2001-11-29
申请号：US09789366
申请日：2001-02-20
申请人： Alacritech, Inc.
发明人： Laurence B. Boucher , Stephen E.J. Blightman , Peter K. Craft , David A. Higgen , Clive M. Philbrick , Daryl D. Starr
IPC分类号： G06F015/16 , G06F013/10 , H04L012/66
CPC分类号： H04L49/9063 , G06F5/10 , H04L29/06 , H04L29/12009 , H04L29/12018 , H04L49/90 , H04L49/901 , H04L49/9042 , H04L61/10 , H04L67/10 , H04L67/325 , H04L67/327 , H04L67/34 , H04L69/08 , H04L69/12 , H04L69/16 , H04L69/161 , H04L69/162 , H04L69/163 , H04L69/166 , H04L69/22 , H04L69/32 , H04Q3/0029 , H04Q2213/13093 , H04Q2213/13103 , H04Q2213/13204 , H04Q2213/13299 , H04Q2213/1332 , H04Q2213/13345
摘要： A Network Interface device (NI device) coupled to a host computer receives a multi-packet message from a network (for example, the Internet) and DMAs the data portions of the various packets directly into a destination in application memory on the host computer. The address of the destination is determined by supplying a first part of the first packet to an application program such that the application program returns the address of the destination. The address is supplied by the host computer to the NI device so that the NI device can DMA the data portions of the various packets directly into the destination. In some embodiments the NI device is an expansion card added to the host computer, whereas in other embodiments the NI device is a part of the host computer.
摘要翻译：耦合到主计算机的网络接口设备（NI设备）从网络（例如，因特网）接收多分组消息，并且将各种分组的数据部分直接DMA到主计算机上的应用存储器中的目的地。通过将第一分组的第一部分提供给应用程序来确定目的地的地址，使得应用程序返回目的地的地址。地址由主机提供给NI设备，以便NI设备可以将各种数据包的数据部分直接DMA到目的地。在一些实施例中，NI设备是添加到主计算机的扩展卡，而在其他实施例中，NI设备是主计算机的一部分。

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