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81. 发明申请

US20100044853A1 SYSTEM-IN-PACKAGE WITH THROUGH SUBSTRATE VIA HOLES 审中-公开
标题翻译：通过底座的系统包装
公开(公告)号：US20100044853A1
公开(公告)日：2010-02-25
申请号：US12523053
申请日：2008-01-14
申请人： Ronald Dekker , Jean-Marc Yannou , Nicolaas J. A. Van Veen
发明人： Ronald Dekker , Jean-Marc Yannou , Nicolaas J. A. Van Veen
IPC分类号： H01L23/538 , H01L21/50 , H05K1/11
CPC分类号： H01L23/49827 , B81C1/00087 , B81C1/00238 , H01L23/13 , H01L23/481 , H01L23/49833 , H01L25/0657 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/056 , H01L2224/16225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06572 , H01L2924/00014 , H01L2924/1461 , H01L2924/3011 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： The present invention relates to a system-in-package that comprises an integration substrate with a thickness of less than 100 micrometer and a plurality of through-substrate vias, which have an aspect ratio larger than 5. A first chip is attached to the integration substrate and arranged between the integration substrate and a support, which is suitable for mechanically supporting the integration substrate during processing and handling. The system-in-package can be fabricated according to the invention without a through-substrate-hole etching step. The large aspect ratio implies reduced lateral extensions, which allow increasing the integration density and decreasing lead inductances.
摘要翻译：本发明涉及一种包括厚度小于100微米的整合衬底和多个贯穿衬底通孔的系统级封装，其具有大于5的长宽比。第一芯片附接到集成基板并且布置在整合基板和支撑件之间，该支撑件适用于在加工和处理期间机械地支撑整合基板。根据本发明，可以制造系统级封装，而无需通过基板孔蚀刻步骤。大的纵横比意味着减小的横向延伸，这允许增加积分密度并减少引线电感。

82. 发明申请

US20100042010A1 ELECTRICALLY ISOLATED CATHETER WITH WIRELESS SENSORS 有权
标题翻译：电动隔离导管与无线传感器
公开(公告)号：US20100042010A1
公开(公告)日：2010-02-18
申请号：US12519817
申请日：2007-12-19
申请人： Ronald Dekker , Antoon Marie Henrie Tombeur , Theodorus Martinus Michielsen
发明人： Ronald Dekker , Antoon Marie Henrie Tombeur , Theodorus Martinus Michielsen
IPC分类号： A61B5/0432 , H01S4/00
CPC分类号： A61B5/0031 , A61B5/0215 , A61B5/027 , A61B5/03 , A61B5/042 , A61B5/1459 , A61B5/1473 , A61B2560/0219
摘要： A local power-delivery/data-reception unit is installed within an insertion end of a sealed catheter. The local power-delivery/data-reception unit wirelessly powers a separately sealed sensor that is attached to the insertion end and configured for wirelessly sending a data signal to the local power-delivery/data-reception unit. The catheter may further feature a remote power-delivery/data-reception unit disposed within the handle and configured for wirelessly communicating with the local power-delivery/data-reception unit and a controller for controlling the sensor.
摘要翻译：局部送电/数据接收单元安装在密封导管的插入端内。本地供电/数据接收单元无线地对附接到插入端的单独密封的传感器供电，并被配置为将数据信号无线发送到本地电力传送/数据接收单元。导管还可以具有设置在手柄内并被配置为与本地供电/数据接收单元无线通信的远程电力传送/数据接收单元和用于控制传感器的控制器。

83. 发明授权

US07173323B2 Semiconductor device with a protective security coating comprising multiple alternating metal layers 有权
标题翻译：具有包括多个交替金属层的保护性安全涂层的半导体器件
公开(公告)号：US07173323B2
公开(公告)日：2007-02-06
申请号：US10508745
申请日：2003-03-20
申请人： Robertus Adrianus Maria Wolters , Petra Elisabeth De Jongh , Ronald Dekker
发明人： Robertus Adrianus Maria Wolters , Petra Elisabeth De Jongh , Ronald Dekker
IPC分类号： H01L23/06
CPC分类号： H01L23/573 , G06K19/07372 , H01L23/28 , H01L27/02 , H01L2924/0002 , Y10S257/922 , H01L2924/00
摘要： The semiconductor device comprises a substrate (10) with a first (1) and an opposed second side (2), at which first side a plurality of transistors and interconnects is present, which are covered by a protective security covering (16), which device is further provided with bond pad regions (14). The protective security covering (16) comprises a substantially non-transparent and substantially chemically inert security coating (16), and the bond pad regions (14) are accessible from the second side of the substrate (10). The semiconductor device can be suitable made with a substrate transfer technique, in which a second substrate (24) is provided at the protective security covering (16).
摘要翻译：半导体器件包括具有第一（1）和相对的第二侧（2）的衬底（10），第一侧上存在多个晶体管和互连，其被保护性安全覆盖物（16）覆盖，器件还设置有接合焊盘区域（14）。保护性保护罩（16）包括基本上不透明且基本上化学惰性的安全涂层（16），并且接合焊盘区域（14）可从衬底（10）的第二侧接近。该半导体器件可以适合用衬底转移技术制成，其中第二衬底（24）设置在保护性防护罩（16）处。

84. 发明授权

US06775350B2 Method of examining a wafer of semiconductor material by means of X-rays 有权
标题翻译：通过X射线检查半导体材料的晶片的方法
公开(公告)号：US06775350B2
公开(公告)日：2004-08-10
申请号：US10242924
申请日：2002-09-13
申请人： Catharina Huberta Henrica Emons , Henricus Godefridus Rafael Maas , Theodorus Martinus Michielsen , Ronald Dekker , Antonius Johannes Janssen , Ingrid Annemarie Rink
发明人： Catharina Huberta Henrica Emons , Henricus Godefridus Rafael Maas , Theodorus Martinus Michielsen , Ronald Dekker , Antonius Johannes Janssen , Ingrid Annemarie Rink
IPC分类号： G01N2320
CPC分类号： G01N23/225 , G01N23/223 , G01N2223/076 , H01L22/12
摘要： A method of examining a wafer of crystalline semiconductor material by means of X-rays, in which method a surface of the wafer is scanned by means of an X-ray beam and secondary radiation generated by said X-ray beam is detected. Prior to the examination the surface of the wafer which is to be scanned by the X-ray beam during the examination is glued to a substrate, after which crystalline semiconductor material is removed at the side which is then exposed, removal taking place as far as the top layer which adjoins the surface. The top layer can thus be examined without the examination being affected by crystal defects or impurities present in layers of the wafer which are situated underneath the top layer.
摘要翻译：通过X射线检查晶体半导体材料的晶片的方法，其中通过X射线束扫描晶片的表面，并且检测由所述X射线束产生的二次辐射。在检查之前，将在检查期间由X射线束扫描的晶片的表面胶合到基底上，然后在暴露的一侧去除结晶半导体材料，然后将其移除至邻接表面的顶层。因此可以检查顶层，而不检查晶体缺陷或存在于位于顶层下方的晶片层中的杂质。

85. 发明授权

US06562694B2 Method of manufacturing a semiconductor device comprising semiconductor elements formed in a toplayer of a silicon wafer situated on a buried insulating layer 失效
标题翻译：制造半导体器件的方法，其包括形成在位于掩埋绝缘层上的硅晶片的搭配者中的半导体元件
公开(公告)号：US06562694B2
公开(公告)日：2003-05-13
申请号：US09746027
申请日：2000-12-21
申请人： Ronald Dekker , Henricus Godefridus Rafael Maas , Cornelis Eustatius Timmering , Pascal Henri Leon Bancken
发明人： Ronald Dekker , Henricus Godefridus Rafael Maas , Cornelis Eustatius Timmering , Pascal Henri Leon Bancken
IPC分类号： H01L2176
CPC分类号： H01L21/76264 , H01L21/76283
摘要： A method of manufacturing a semiconductor device including semiconductor elements having semiconductor zones (17, 18, 24, 44, 45) formed in a top layer (4) of a silicon wafer (1) situated on a buried insulating layer (2). In this method, a first series of process steps are carried out, commonly referred to as front-end processing, wherein, inter alia, the silicon wafer is heated to temperatures above 700° C. Subsequently, trenches (25) are formed in the top layer, which extend as far as the buried insulating layer and do not intersect pn-junctions. After said trenches have been filled with insulating material (26, 29), the semiconductor device is completed in a second series of process steps, commonly referred to as back-end processing, wherein the temperature of the wafer does not exceed 400° C. The trenches are filled in a deposition process wherein the wafer is heated to a temperature which does not exceed 500° C. In this manner, a semiconductor device can be made comprising semiconductor elements having very small and shallow semiconductor zones.
摘要翻译：一种制造半导体器件的方法，该半导体器件包括形成在位于掩埋绝缘层（2）上的硅晶片（1）的顶层（4）中的半导体区域（17,18,24,44,45）的半导体元件。在该方法中，执行第一系列工艺步骤，通常称为前端处理，其中特别地，将硅晶片加热至高于700℃的温度。随后，形成沟槽（25）顶层，其延伸至掩埋绝缘层并且不与pn结相交。在所述沟槽已经填充有绝缘材料（26,29）之后，半导体器件在第二系列工艺步骤中完成，通常称为后端处理，其中晶片的温度不超过400℃。在沉积工艺中填充沟槽，其中将晶片加热到不超过500℃的温度。以这种方式，可以制造半导体器件，其包括具有非常小且浅的半导体区域的半导体元件。

86. 发明授权

US06437420B1 Semiconductor elements for semiconductor device 失效
标题翻译：半导体元件半导体元件
公开(公告)号：US06437420B1
公开(公告)日：2002-08-20
申请号：US09613227
申请日：2000-07-10
申请人： Freerk Van Rijs , Ronald Dekker
发明人： Freerk Van Rijs , Ronald Dekker
IPC分类号： H01L27082
CPC分类号： H01L23/645 , H01L2224/02381 , H01L2224/05001 , H01L2224/05011 , H01L2224/05023 , H01L2224/05085 , H01L2224/05568 , H01L2224/16 , H01L2924/01078 , H01L2924/01079 , H01L2924/1305 , H01L2924/3011 , H01L2924/00
摘要： The invention relates to a semiconductor device (100) with a semiconductor body (10) comprising at least one semiconductor element (H) with an active area (A) and a coil (20) coupled to said element (H). The coil (20) and a further coil (21) jointly form a transformer (F). The semiconductor body (10) is secured to a carrier plate (30) which comprises an electrically insulating material and is covered with a conductor track (21). According to the invention, the further coil (21) is positioned on the carrier plate (30) and is formed by the conductor track (21) and electrically separated from the coil (20). In this way, a-device (100) is obtained which is easier to manufacture than the known device. Moreover, the communication between the element (H) and the outside world does not involve an electrical coupling and hence, for example, bonding wires, are not necessary. The invention is particularly advantageous for a (discrete) bipolar transistor, which can suitably be used for surface mounting. The invention further comprises an easy method of manufacturing a device (100) according to the invention.
摘要翻译：本发明涉及具有半导体本体（10）的半导体器件（100），该半导体本体（10）包括至少一个具有有源区（A）的半导体元件（H）和耦合到所述元件（H）的线圈（20）。线圈（20）和另外的线圈（21）共同形成变压器（F）。半导体本体（10）固定在承载板（30）上，承载板（30）包括电绝缘材料并被导体轨道（21）覆盖。根据本发明，另外的线圈（21）位于承载板（30）上并且由导体轨道（21）形成并与线圈（20）电隔离。以这种方式，获得比已知装置更容易制造的装置（100）。此外，元件（H）和外界之间的连通不涉及电耦合，因此例如不需要接合线。本发明对于可以适当地用于表面安装的（分立的）双极晶体管是特别有利的。本发明还包括一种制造根据本发明的装置（100）的简单方法。

87. 发明授权

US06355972B1 Semiconductor device and method of manufacturing same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06355972B1
公开(公告)日：2002-03-12
申请号：US09585826
申请日：2000-06-01
申请人： Freerk Van Rijs , Ronald Dekker , Dave Michel Henrique Hartskeerl
发明人： Freerk Van Rijs , Ronald Dekker , Dave Michel Henrique Hartskeerl
IPC分类号： H01L2970
CPC分类号： H01L29/42304 , H01L23/4824 , H01L29/41708 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to a semiconductor device comprising a bipolar transistor having a collector (1), a base (2) and an emitter (3) at its active area (A). The semiconductor body (10) of the device is covered with an insulating layer (20). At least a part of a base connection conductor (5) and an emitter connection conductor (6) extend over the insulating layer (20) and lead to a base connection area (8) and an emitter connection area (9), respectively. The known transistor is characterized by poor gain, particularly at high frequencies and at high power. A device according to the invention is characterized in that the emitter connection area (8) and the base connection area (9), viewed in projection, are present on the same side of the active area (A), the emitter connection conductor (6) is divided into two or more sub-conductors (6A, 6B) and the base connection conductor (5) is divided into one or more further sub-conductors (5) which are present between the sub-conductors (6A, 6B) and form a co-planar transmission line (T) therewith. In this way, the inductance of the emitter connection conductor (6) is reduced considerably, resulting in a much higher gain, particularly at high frequencies and high power. Preferably, the semiconductor body (A) is interrupted at the area of the transmission line (T) and is glued to an insulating substrate (40).
摘要翻译：本发明涉及一种包括在其有源区（A）上具有集电极（1），基极（2）和发射极（3）的双极晶体管的半导体器件。该器件的半导体本体（10）被绝缘层（20）覆盖。基极连接导体（5）和发射极连接导体（6）的至少一部分分别延伸到绝缘层（20）上，并分别导向基极连接区域（8）和发射极连接区域（9）。已知的晶体管的特征在于增益不良，特别是在高频和高功率下。根据本发明的装置的特征在于，在投影中观察到的发射极连接区域（8）和基座连接区域（9）存在于有源区域（A）的相同侧，发射极连接导体（6））分成两个或更多个分导体（6A，6B），并且基极连接导体（5）被分成一个或多个另外的分导体（5），它们分别存在于分导体（6A，6B）和与其形成共面传输线（T）。以这种方式，发射极连接导体（6）的电感显着降低，导致高得多的增益，特别是在高频和高功率下。优选地，半导体本体（A）在传输线（T）的区域处被中断，并且被粘合到绝缘衬底（40）上。

88. 发明授权

US5828122A Semiconductor body with a substrate glued to a support body 失效
标题翻译：具有胶合到支撑体上的基底的半导体体
公开(公告)号：US5828122A
公开(公告)日：1998-10-27
申请号：US815253
申请日：1997-03-12
申请人： Henricus G. R. Maas , Ronald Dekker , Theodorus M. Michielsen , Wilhelmus T. A. J. Van Den Einden
发明人： Henricus G. R. Maas , Ronald Dekker , Theodorus M. Michielsen , Wilhelmus T. A. J. Van Den Einden
IPC分类号： H01L27/12 , H01L21/02 , H01L21/58 , H01L23/04 , H01L23/10 , H01L23/16 , H01L23/64 , H01L29/00
CPC分类号： H01L24/83 , H01L23/04 , H01L23/10 , H01L24/26 , H01L2224/8319 , H01L2224/8385 , H01L2924/01013 , H01L2924/01058 , H01L2924/07802
摘要： A semiconductor device comprises a substrate (1) with a plane surface (4) on which a layer structure (2) is formed in a number of layers (5, 7, 9, 13, 15, 17). The side of the substrate on which the layer structure was formed is fastened to a plane support body (18) by means of a glue layer (19) which encompasses spacer elements (20). These spacer elements are fastened to the surface of the substrate and all have the same height measured from the surface (4). In fastening the substrate to the support body, glue is provided and the substrate is pressed onto the support body so that the pressure is evenly distributed over the spacer elements.
摘要翻译：半导体器件包括具有平面（4）的基板（1），层结构（2）在多个层（5,7,9,13,15,17）上形成。其上形成有层结构的基板的侧面通过包围间隔元件（20）的胶层（19）固定在平面支撑体（18）上。这些间隔元件固定在基片的表面上，并且都具有从表面（4）测量的相同的高度。在将基底固定到支撑体上时，提供胶水并将基底压在支撑体上，使得压力均匀地分布在间隔元件上。

89. 发明授权

US5753537A Method of manufacturing a semiconductor device for surface mounting 失效
标题翻译：制造用于表面安装的半导体器件的方法
公开(公告)号：US5753537A
公开(公告)日：1998-05-19
申请号：US792338
申请日：1997-01-31
申请人： Ronald Dekker , Henricus G. R. Maas , Martinus P. J. G. Versleijen
发明人： Ronald Dekker , Henricus G. R. Maas , Martinus P. J. G. Versleijen
IPC分类号： H01L21/60 , H01L21/68 , H01L21/762 , H01L23/48 , H01L23/482 , H01L21/44
CPC分类号： H01L21/76264 , H01L21/6835 , H01L23/481 , H01L23/4822 , H01L24/11 , H01L24/13 , H01L21/76289 , H01L2221/68359 , H01L2221/68363 , H01L2221/68377 , H01L2224/1308 , H01L2224/13099 , H01L2224/131 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01033 , H01L2924/01061 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/10329 , H01L2924/12032 , H01L2924/12036 , H01L2924/12042 , H01L2924/1301 , H01L2924/14 , H01L2924/30105
摘要： The invention relates to a method of manufacturing a semiconductor device (1) for surface mounting. Such a method is known, whereby such a semiconductor device is manufactured in that a semiconductor body with a semiconductor element is mounted on a metal lead frame with metal package leads, after which contact surfaces of the semiconductor element are connected to the package leads by means of bonding wires. It is found that semiconductor devices of small dimensions are difficult to realize by this known method, while in addition the manufacture of integrated circuits with very many package leads is comparatively expensive owing to the many connections which are to be made between the integrated circuits and the package leads. According to the invention, the semiconductor devices are packaged while they are still on a slice of semiconductor material, while the package leads are formed from the semiconductor material. In the method according to the invention, the semiconductor devices are manufactured without the necessity of a lead frame, bonding wires, or metal package leads. Thanks to the IC technologies at the wafer level, such as photolithography, etching, etc., the method according to the invention renders possible semiconductor devices of very small dimensions. In addition, integrated circuits with very many package leads can be manufactured in a simple manner without additional steps being necessary. The method according to the invention is thus comparatively inexpensive.
摘要翻译：本发明涉及制造用于表面安装的半导体器件（1）的方法。这种方法是已知的，由此制造这样的半导体器件，其中具有半导体元件的半导体本体安装在具有金属封装引线的金属引线框架上，之后半导体元件的接触表面通过装置连接到封装引线的接合线。发现通过这种已知的方法难以实现小尺寸的半导体器件，而另外由于在集成电路和集成电路之间需要进行许多连接，所以具有非常多的封装引线的集成电路的制造相当昂贵包装线根据本发明，半导体器件在它们仍然在半导体材料片上时被封装，而封装引线由半导体材料形成。在根据本发明的方法中，半导体器件被制造而不需要引线框架，接合线或金属封装引线。由于晶圆级的IC技术，例如光刻，蚀刻等，根据本发明的方法使得可能的尺寸非常小的半导体器件成为可能。此外，具有非常多的封装引线的集成电路可以以简单的方式制造而无需额外的步骤。因此，根据本发明的方法相对便宜。

90. 发明授权

US5405789A Method of manufacturing a semiconductor device whereby a laterally bounded semiconductor zone is formed in a semiconductor body in a self-aligning manner 失效
标题翻译：制造半导体器件的方法，由此横向界限的半导体区以自对准方式形成在半导体本体中
公开(公告)号：US5405789A
公开(公告)日：1995-04-11
申请号：US141888
申请日：1993-10-22
申请人： Ronald Dekker , Henricus G. R. Maas , Armand Pruijmboom , Wilhelmus T. A. J. Van Den Einden
发明人： Ronald Dekker , Henricus G. R. Maas , Armand Pruijmboom , Wilhelmus T. A. J. Van Den Einden
IPC分类号： H01L21/28 , H01L21/331 , H01L21/335 , H01L21/336 , H01L21/8249 , H01L29/78 , H01L21/265
CPC分类号： H01L29/66303 , H01L21/28 , H01L21/8249 , H01L29/66416
摘要： A method of manufacturing a semiconductor device with a semiconductor element which includes a semiconductor zone (19) situated below an electrode (18) and adjoining a surface (5) of a semiconductor body (1), which semiconductor zone substantially does not project outside the electrode (18) in lateral direction. The electrode (18) is here formed on the surface (5) of the semiconductor body (1), after which semiconductor material adjoining the surface (5) and not covered by the electrode (18) is removed by an etching treatment, whereby the position of the semiconductor zone (19) below the electrode (18) is defined. Before the electrode (18) is formed, a surface zone (16) adjoining the surface (5) is formed in the semiconductor body (1) with a depth and a doping such as are desired for the semiconductor zone (19) to be formed below the electrode (18), after which the electrode (18) is formed on this surface zone and, during the etching treatment, the portion of the surface zone (16) not covered by the electrode (18) is etched away through its entire thickness. Conducting materials such as aluminium or aluminium alloys may be used for the electrode (18), i.e. materials which are not resistant to temperatures necessary for forming semiconductor zones through diffusion.
摘要翻译：一种制造具有半导体元件的半导体器件的方法，该半导体元件包括位于电极（18）下方并邻接半导体本体（1）的表面（5）的半导体区（19），该半导体区基本上不会突出在半导体本体电极（18）。此时，电极（18）形成在半导体本体（1）的表面（5）上，然后通过蚀刻处理去除邻接表面（5）并且未被电极（18）覆盖的半导体材料，由此，限定电极（18）下方的半导体区域（19）的位置。在形成电极（18）之前，在半导体本体（1）中形成与表面（5）相邻的表面区域（16），以形成半导体区域（19）所需的深度和掺杂在电极（18）的下方，之后在该表面区域上形成电极（18），并且在蚀刻处理期间，未被电极（18）覆盖的表面区域（16）的部分通过其整个厚度。可以使用诸如铝或铝合金的导电材料用于电极（18），即不耐受通过扩散形成半导体区域所需的温度的材料。

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