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1. 发明授权

US06815802B2 Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology 有权
标题翻译：在硅/硅锗外延层中引入碳以提高Si-Ge双极技术的产量
公开(公告)号：US06815802B2
公开(公告)日：2004-11-09
申请号：US10122857
申请日：2002-04-15
申请人： Jack Oon Chu , Douglass Duane Coolbaugh , James Stuart Dunn , David R. Greenberg , David L. Harame , Basanth Jagannathan , Robb Allen Johnson , Louis D. Lanzerotti , Kathryn Turner Schonenberg , Ryan Wayne Wuthrich
发明人： Jack Oon Chu , Douglass Duane Coolbaugh , James Stuart Dunn , David R. Greenberg , David L. Harame , Basanth Jagannathan , Robb Allen Johnson , Louis D. Lanzerotti , Kathryn Turner Schonenberg , Ryan Wayne Wuthrich
IPC分类号： H01L27082
CPC分类号： H01L29/66242 , H01L21/02381 , H01L21/02447 , H01L21/02529 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L29/1004 , H01L29/161 , H01L29/7378
摘要： A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe base region formed on a portion of said collector region; and an emitter region of said first conductivity type formed over a portion of said base region, wherein said collector region and said base region include carbon continuously therein. The SiGe base region is further doped with boron.

2. 发明授权

US06809400B2 Composite pinin collector structure for heterojunction bipolar transistors 有权
标题翻译：用于异质结双极晶体管的复合pinin集电极结构
公开(公告)号：US06809400B2
公开(公告)日：2004-10-26
申请号：US10389230
申请日：2003-03-14
申请人： Eric Harmon , Jerry Woodall , Hironori Tsukamoto , David Salzman
发明人： Eric Harmon , Jerry Woodall , Hironori Tsukamoto , David Salzman
IPC分类号： H01L27082
CPC分类号： H01L29/0821 , H01L29/7371
摘要： This disclosure describes a structure for transistor devices formed from compound semiconductor materials; and particularly for heterojuntion bipolar transistors (HBTs); and more particularly for the collector structure of a double HBT (DHBT). The invention enables high output power at high frequency operation, of high frequency operation at high output power.
摘要翻译：本公开描述了由化合物半导体材料形成的晶体管器件的结构; 特别是用于异质双极晶体管（HBT）; 更具体地涉及双HBT（DHBT）的收集器结构。本发明能够实现高输出功率的高频运行时的高输出功率。

3. 发明授权

US06798040B2 Power semiconductor switch 有权
标题翻译：功率半导体开关
公开(公告)号：US06798040B2
公开(公告)日：2004-09-28
申请号：US09873227
申请日：2001-06-04
申请人： Daniel Reznik
发明人： Daniel Reznik
IPC分类号： H01L27082
CPC分类号： H01L29/7395 , H01L29/1095
摘要： An IGBT structure includes successive regions whose conductivities have alternating signs. The structure is dimensioned for punch-through and is provided with two buffer layers. As a result, the component becomes symmetrically blocking and is suitable as a semiconductor switch, e.g., for converters.
摘要翻译： IGBT结构包括电导率具有交替符号的连续区域。该结构的尺寸用于穿透，并且设置有两个缓冲层。结果，该部件变得对称地阻塞，并且适合作为半导体开关，例如用于转换器。

4. 发明授权

US06777783B2 Insulated gate bipolar transistor 有权
公开(公告)号：US06777783B2
公开(公告)日：2004-08-17
申请号：US10298514
申请日：2002-11-19
申请人： Tadashi Matsuda
发明人： Tadashi Matsuda
IPC分类号： H01L27082
CPC分类号： H01L29/0696 , H01L29/4238 , H01L29/7397
摘要： An insulated gate bipolar transistor includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type formed on a top surface of the first semiconductor layer, a base layer of the first conductivity type formed on a top surface of the second semiconductor layer, a plurality of gate electrodes each of which is buried in a trench with a gate insulation film interposed therebetween, the trench being formed in the base layer to a depth reaching said second semiconductor layer from a surface of the base layer, each the gate electrode having an upper surface of a rectangular pattern with different widths in two orthogonal directions, the gate electrodes being disposed in a direction along a short side of the rectangular pattern, and emitter layers of the second conductivity type formed in the surface of the base layer to oppose both end portions of each the gate electrode in a direction along a long side of the rectangular pattern.

5. 发明授权

US06770952B2 Integrated process for high voltage and high performance silicon-on-insulator bipolar devices 有权
公开(公告)号：US06770952B2
公开(公告)日：2004-08-03
申请号：US10132817
申请日：2002-04-25
申请人： Jeffrey A. Babcock , Gregory E Howard , Angelo Pinto , Phillipp Steinmann , Scott G. Balster
发明人： Jeffrey A. Babcock , Gregory E Howard , Angelo Pinto , Phillipp Steinmann , Scott G. Balster
IPC分类号： H01L27082
CPC分类号： H01L29/66265 , H01L21/84 , H01L27/0826 , H01L27/1203 , H01L29/0692 , H01L29/0821 , H01L29/7317
摘要： High-voltage bipolar transistors (30, 60) in silicon-on-insulator (SOI) integrated circuits are disclosed. In one disclosed embodiment, an collector region (28) is formed in epitaxial silicon (24, 25) disposed over a buried insulator layer (22). A base region (32) and emitter (36) are disposed over the collector region (28). Buried collector region (31) are disposed in the epitaxial silicon (24) away from the base region (32). The transistor may be arranged in a rectangular fashion, as conventional, or alternatively by forming an annular buried collector region (31). According to another disclosed embodiment, a high voltage transistor (60) includes a central isolation structure (62), so that the base region (65) and emitter region (66) are ring-shaped to provide improved performance. A process for fabricating the high voltage transistor (30, 60) simultaneously with a high performance transistor (40) is also disclosed.

6. 发明授权

US06762480B2 Thin gallium-arsenide-antimonide base heterojunction bipolar transistor (HBT) having improved gain 有权
公开(公告)号：US06762480B2
公开(公告)日：2004-07-13
申请号：US09796299
申请日：2001-02-27
申请人： Nicolas J. Moll , Colombo R. Bolognesi
发明人： Nicolas J. Moll , Colombo R. Bolognesi
IPC分类号： H01L27082
CPC分类号： H01L29/0817 , H01L29/1004 , H01L29/7371
摘要： An HBT having an InP collector, a GaAsSb base and an InP emitter in which the base is constructed using a thin layer of GaAsSb. The thin base layer can be constructed of a GaAsSb material with a composition having a bulk lattice constant that matches the bulk lattice constant of the material of the collector. The thickness of the GaAsSb base layer is less than 49 nm, and preferably less that about 20 nm. Alternatively, the thin base layer is of a GaAsSb composition that includes a higher As content, resulting in a low conduction band energy discontinuity at the emitter-base junction. Such a GaAsSb base layer has a lattice constant that conforms to the lattice constant of the collector because it is thinly grown so as to be pseudomorphically “strained” over the collector. A high base doping level is used to reduce the sheet resistivity and lower the base series resistance that results from the thinly grown base layer.

7. 发明授权

US06703687B2 Bipolar transistor and method for manufacturing the same 失效
标题翻译：双极晶体管及其制造方法
公开(公告)号：US06703687B2
公开(公告)日：2004-03-09
申请号：US10141113
申请日：2002-05-09
申请人： Hun Joo Hahm
发明人： Hun Joo Hahm
IPC分类号： H01L27082
CPC分类号： H01L29/735 , H01L29/732
摘要： A bipolar transistor and a method for manufacturing the bipolar transistor are provided. The bipolar transistor includes a collector region including a semiconductor substrate doped with a first conductive dopant, an intrinsic base region low-density doped with a second conductive dopant on the semiconductor substrate, the second conductive dopant being contrary to the first conductive dopant, an extrinsic base region high-density doped with the second conductive dopant on a first portion of the upper surface of the intrinsic base region and formed in a single well with at least two branched lower terminals, an emitter region doped with the first conductive dopant on a second portion of the upper surface of the intrinsic base region, the second portion spaced from the first portion by a designated interval, a collector electrode formed on the lower surface of the semiconductor substrate, an emitter electrode formed on the upper surface of the emitter region, and a base electrode formed on the upper surface of the extrinsic base region.
摘要翻译：提供了双极晶体管和制造双极晶体管的方法。所述双极晶体管包括集电极区域，所述集电极区域包括掺杂有第一导电掺杂剂的半导体衬底，在所述半导体衬底上掺杂有第二导电掺杂剂的低密度本征基极区域，所述第二导电掺杂物与所述第一导电掺杂剂相反，在所述本征基极区的上表面的第一部分上掺杂有所述第二导电掺杂剂的基底区域，并且形成在具有至少两个分支的下部末端的单个阱中，在第二导电掺杂剂上掺杂有所述第一导电掺杂剂的发射极区域本征基区的上表面的一部分，第二部分与第一部分隔开指定的间隔，形成在半导体衬底的下表面上的集电极，形成在发射极区的上表面上的发射电极，以及形成在外部基极区域的上表面上的基极。

8. 发明授权

US06683366B1 Bipolar transistor and related structure 有权
标题翻译：双极晶体管及相关结构
公开(公告)号：US06683366B1
公开(公告)日：2004-01-27
申请号：US10163386
申请日：2002-06-04
申请人： Klaus F. Schuegraf
发明人： Klaus F. Schuegraf
IPC分类号： H01L27082
CPC分类号： H01L29/66242
摘要： According to one exemplary embodiment, a bipolar transistor, such as a heterojunction bipolar transistor (“HBT”), comprises a base having a top surface. The HBT further comprises a first inner spacer and a second inner spacer situated on the top surface of the base. The HBT further comprises a first outer spacer situated adjacent to the first inner spacer and a second outer spacer situated adjacent to the second inner spacer on the top surface of the base. According to this exemplary embodiment, the HBT further comprises an emitter situated between the first and second inner spacers. The HBT may further comprise an intermediate oxide layer situated on the first and second outer spacers. The HBT may further comprise an amorphous layer situated on said intermediate oxide layer. The HBT may also comprise an antireflective coating layer on the amorphous layer.
摘要翻译：根据一个示例性实施例，诸如异质结双极晶体管（“HBT”）的双极晶体管包括具有顶表面的基极。 HBT还包括位于基座的顶表面上的第一内隔离物和第二内间隔物。所述HBT还包括位于所述第一内隔板附近的第一外间隔件和位于所述基座顶表面上邻近所述第二内间隔件的第二外间隔件。根据该示例性实施例，HBT还包括位于第一和第二内隔板之间的发射器。 HBT还可以包括位于第一和第二外隔离物上的中间氧化物层。 HBT还可以包括位于所述中间氧化物层上的非晶层。 HBT还可以包括在非晶层上的抗反射涂层。

9. 发明授权

US06680522B1 Semiconductor device with reduced electrical variation 失效
标题翻译：具有降低的电气变化的半导体器件
公开(公告)号：US06680522B1
公开(公告)日：2004-01-20
申请号：US09474504
申请日：1999-12-29
申请人： Fumihiko Sato
发明人： Fumihiko Sato
IPC分类号： H01L27082
CPC分类号： H01L29/66287 , H01L29/66242 , H01L29/66901 , H01L29/7322
摘要： An object of the invention is to minimize variation in characteristics of a vertical bipolar transistor. An insulating side wall spacer composed of a silicon nitride film 10 and a silicon oxide film 9 is formed on the side surface of an opening 101 formed in a base electrode polysilicon film 7. The thickness (=WD) of the insulating side wall spacer is made thicker than the maximum thickness (=WF) within a range of variation in thickness of a polycrystalline film 12 grown from the side surface of the base electrode polysilicon film 7 exposed inside the opening 101 (namely, WD>WF). The size of an opening for forming an emitter electrode polysilicon film 16 on an intrinsic base 11 is not influenced by the thickness of a polycrystalline film 12 epitaxially growing from the side surface of the polysilicon film 7 for the base electrode, but is defined by the side wall spacer formed on a portion of the side surface of the base electrode polysilicon film. Therefore, emitter area hardly disperses, and electric characteristics become stable.
摘要翻译：本发明的一个目的是最小化垂直双极晶体管的特性变化。在形成于基极多晶硅膜7的开口101的侧面形成有由氮化硅膜10和氧化硅膜9构成的绝缘侧壁隔离物。绝缘侧壁隔片的厚度（= WD）为在从开口101内露出的基极电极多晶硅膜7的侧面（即WD> WF）生长的多晶膜12的厚度变化范围内，比最大厚度（= WF）更厚。用于在本征基极11上形成发射电极多晶硅膜16的开口的尺寸不受从用于基极的多晶硅膜7的侧表面外延生长的多晶膜12的厚度的影响，而是由侧壁隔离物形成在基极多晶硅膜的侧表面的一部分上。因此，发射极区域几乎不分散，电特性变得稳定。

10. 发明授权

US06653714B2 Lateral bipolar transistor 失效
标题翻译：侧面双极晶体管
公开(公告)号：US06653714B2
公开(公告)日：2003-11-25
申请号：US10300440
申请日：2002-11-20
申请人： Toshinobu Matsuno , Takeshi Fukuda , Katsunori Nishii , Kaoru Inoue , Daisuke Ueda
发明人： Toshinobu Matsuno , Takeshi Fukuda , Katsunori Nishii , Kaoru Inoue , Daisuke Ueda
IPC分类号： H01L27082
CPC分类号： H01L29/66242 , H01L29/7317
摘要： A lateral bipolar transistor includes: a substrate; a first insulative region formed on the substrate; a first semiconductor region of a first conductivity type selectively formed on the first insulative region; a second insulative region formed so as to substantially cover the first semiconductor region; and a second semiconductor region of a second conductivity type different from the first conductivity type, a second semiconductor region being selectively formed, wherein: the second insulative region has a first opening which reaches a surface of the first semiconductor region, and the first semiconductor region has a second opening which reaches the underlying first insulative region, the second opening being provided in a position corresponding to the first opening of the second insulative region; the second semiconductor region is formed so as to fill the first opening and the second opening, thereby functioning as a base region; a lower portion of the second semiconductor region which at least fills the second opening is formed by lateral growth from a face of the first semiconductor region defining a side wall of the second opening; and the first semiconductor region includes an emitter region and a collector region formed therein.
摘要翻译：横向双极晶体管包括：衬底; 形成在所述基板上的第一绝缘区域; 选择性地形成在所述第一绝缘区域上的第一导电类型的第一半导体区域; 形成为基本上覆盖所述第一半导体区域的第二绝缘区域; 以及与第一导电类型不同的第二导电类型的第二半导体区域，选择性地形成第二半导体区域，其中：第二绝缘区域具有到达第一半导体区域的表面的第一开口，第一半导体区域具有到达下面的第一绝缘区域的第二开口，第二开口设置在与第二绝缘区域的第一开口对应的位置; 第二半导体区域形成为填充第一开口和第二开口，从而起基底区域的作用; 至少填充第二开口的第二半导体区域的下部通过从限定第二开口的侧壁的第一半导体区域的表面横向生长形成; 并且第一半导体区域包括形成在其中的发射极区域和集电极区域。

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