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71. 发明申请

US20070049053A1 Pretreatment processes within a batch ALD reactor 失效
标题翻译：一批ALD反应器中的预处理过程
公开(公告)号：US20070049053A1
公开(公告)日：2007-03-01
申请号：US11213161
申请日：2005-08-26
申请人： Maitreyee Mahajani
发明人： Maitreyee Mahajani
IPC分类号： H01L21/31
CPC分类号： H01L21/3141 , C23C16/0218 , C23C16/405 , C23C16/45531 , C23C16/45546 , H01L21/3142
摘要： Embodiments of the invention provide methods for forming a material on a substrate which includes exposing a plurality of substrates within a batch process chamber to a first oxidizing gas during a pretreatment process, exposing the substrates sequentially to a precursor and a second oxidizing gas during an ALD cycle and repeating the ALD cycle to form a material on the substrates. In a preferred example, a hafnium precursor is used during the ALD process to form a hafnium-containing material, such as hafnium oxide. In one example, the first and second oxidizing gases are the same oxidizing gases. In a preferred example, the first and second oxidizing gases are different oxidizing gases, such that the pretreatment process contains ozone and the ALD process contains water vapor.
摘要翻译：本发明的实施例提供了在衬底上形成材料的方法，其包括在预处理过程中将批处理室内的多个衬底暴露于第一氧化气体，在ALD期间将衬底依次暴露于前体和第二氧化气体循环并重复ALD循环以在基底上形成材料。在优选的实施例中，在ALD工艺期间使用铪前体以形成含铪的材料，例如氧化铪。在一个实例中，第一和第二氧化气体是相同的氧化气体。在优选的实施例中，第一和第二氧化气体是不同的氧化气体，使得预处理过程含有臭氧，并且ALD工艺含有水蒸气。

72. 发明授权

US07132129B2 Method of forming a diamond coating on an iron-based substrate and use of an iron-based substrate for hosting a CVD diamond coating 失效
标题翻译：在铁基基材上形成金刚石涂层的方法以及使用用于承载CVD金刚石涂层的铁基底板
公开(公告)号：US07132129B2
公开(公告)日：2006-11-07
申请号：US10931795
申请日：2004-08-31
申请人： Wilhelmus Johannes Jacobus van Enckevort , Johannes Jacobus Schermer , Josephus Gerardus Buijnsters , Prabhakaran Shankar , Johannes Joseph ter Meulen
发明人： Wilhelmus Johannes Jacobus van Enckevort , Johannes Jacobus Schermer , Josephus Gerardus Buijnsters , Prabhakaran Shankar , Johannes Joseph ter Meulen
IPC分类号： C23C16/00
CPC分类号： C23C28/044 , C23C16/0218 , C23C16/0281 , C23C16/27 , C23C28/046
摘要： A method of forming a diamond coating on an iron-based substrate, comprising: providing an iron based substrate with an outer layer which substantially comprises metal borides; and depositing the diamond coating on the outer layer using a process of Chemical Vapor Deposition (CVD). An outer layer may be formed by deposition, by depositing a metal layer which is capable of being boronized followed by boronizing the metal layer, or by boronizing the iron-based substrate. The invention is also related to the use of an iron-based substrate comprising an outer layer with borides for hosting a CVD diamond coating.
摘要翻译：一种在铁基基材上形成金刚石涂层的方法，包括：提供基本上包含金属硼化物的外层的铁基基材; 以及使用化学气相沉积（CVD）的方法将金刚石涂层沉积在外层上。可以通过沉积形成外层，通过沉积能够硼化的金属层，然后硼化金属层，或通过硼化铁基底材来形成。本发明还涉及使用包含具有硼化物的外层的铁基底座来承载CVD金刚石涂层。

73. 发明申请

US20060105114A1 Multi-layer high quality gate dielectric for low-temperature poly-silicon TFTs 审中-公开
标题翻译：用于低温多晶硅TFT的多层高质量栅极电介质
公开(公告)号：US20060105114A1
公开(公告)日：2006-05-18
申请号：US10990185
申请日：2004-11-16
申请人： John White
发明人： John White
IPC分类号： C23C16/00 , H05H1/24
CPC分类号： C23C8/36 , C23C16/0218 , C23C16/402
摘要： A method and apparatus that is useful for forming a high quality gate dielectric layer in MOS TFT devices using a high density plasma oxidation (HDPO) process. The HDPO process forms a good interface and then a second layer, which has good bulk electrical properties, is deposited at a higher deposition rate over the HDPO layer. In one embodiment a thin HDPO process layer is formed over the channel, source and drain regions to form a high quality dielectric interface and then one or more dielectric layers are deposited on the HDPO layer to form a high quality gate dielectric layer. The HDPO process generally entails using an inductively and/or capacitively coupled RF energy transmitting device to generate and control the plasma generated over the surface of the substrate and injecting a gas containing an oxidizing source to grow the interfacial layer. A second dielectric layer may then be deposited on the surface of the substrate using a CVD or plasma enhanced CVD deposition process. Aspects of the present invention also provide a cluster tool that contains at least one specialized plasma processing chamber that is capable of depositing a high quality gate dielectric layer. The cluster tool is advantageous because it supports both the pre-processing steps, such as, preheating the substrate, pre-cleaning the surface of the substrate prior to processing, and cool down after processing, all in a single controlled environment.
摘要翻译：一种用于在使用高密度等离子体氧化（HDPO）工艺的MOS TFT器件中形成高质量栅极电介质层的方法和装置。 HDPO工艺形成良好的界面，然后在HDPO层上以更高的沉积速率沉积具有良好体积电特性的第二层。在一个实施例中，在沟道，源极和漏极区域之上形成薄的HDPO处理层以形成高质量的电介质界面，然后在HDPO层上沉积一个或多个介电层以形成高质量的栅极电介质层。 HDPO工艺通常需要使用感应和/或电容耦合的RF能量传输装置来产生和控制在衬底的表面上产生的等离子体，并且注入含有氧化源的气体以生长界面层。然后可以使用CVD或等离子体增强CVD沉积工艺将第二电介质层沉积在衬底的表面上。本发明的方面还提供一种包含能够沉积高质量栅极电介质层的至少一个专用等离子体处理室的簇工具。集群工具是有利的，因为它支持预处理步骤，例如预热衬底，在处理之前预清洁衬底的表面，以及在处理之后，在单个受控环境中冷却。

74. 发明授权

US06905543B1 Methods of forming tungsten nucleation layer 有权
标题翻译：形成钨成核层的方法
公开(公告)号：US06905543B1
公开(公告)日：2005-06-14
申请号：US10174628
申请日：2002-06-19
申请人： James A. Fair , Nerissa Taylor , Junghwan Sung
发明人： James A. Fair , Nerissa Taylor , Junghwan Sung
IPC分类号： C23C16/02 , C23C16/14 , C23C16/455 , C30B25/14
CPC分类号： C23C16/14 , C23C16/0218 , C23C16/45525
摘要： The nucleation delay in the formation of a tungsten layer on a substrate is reduced or eliminated by alternative processes. In one process the substrate is exposed to atomic hydrogen before the tungsten nucleation layer is formed. In the other process the substrate is exposed to a boron hydride such as diborane (B2H6) before the nucleation layer is formed. The process works effectively to reduce or eliminate the tungsten nucleation delay on a variety of surfaces, including silicon, silicon dioxide, silicon nitride and titanium nitride.
摘要翻译：通过替代方法减少或消除了在基底上形成钨层的成核延迟。在一个过程中，在形成钨成核层之前，将衬底暴露于原子氢。在另一方法中，在形成成核层之前，将基底暴露于硼氢化物如乙硼烷（B 2 H 6 H 6）。该工艺有效地减少或消除了各种表面上的钨成核延迟，包括硅，二氧化硅，氮化硅和氮化钛。

75. 发明申请

US20050070128A1 Post-deposition treatment to enhance properties of Si-O-C low K films 有权
标题翻译：后沉积处理以提高Si-O-C低K膜的性能
公开(公告)号：US20050070128A1
公开(公告)日：2005-03-31
申请号：US10990251
申请日：2004-11-15
申请人： Li-Qun Xia , Frederic Gaillard , Ellie Yieh , Tian Lim
发明人： Li-Qun Xia , Frederic Gaillard , Ellie Yieh , Tian Lim
IPC分类号： C23C16/02 , C23C16/40 , C23C16/56 , H01L21/3105 , H01L21/314 , H01L21/316 , H01L21/31
CPC分类号： H01L21/02126 , C23C16/0218 , C23C16/401 , C23C16/56 , H01L21/02071 , H01L21/02203 , H01L21/02211 , H01L21/02271 , H01L21/02274 , H01L21/02312 , H01L21/02337 , H01L21/0234 , H01L21/02362 , H01L21/3105 , H01L21/3146 , H01L21/31604 , H01L21/31612 , H01L21/31633 , H01L21/76807 , H01L21/76826 , H01L21/76837 , Y10S438/931
摘要： A method for providing a dielectric film having enhanced adhesion and stability. The method includes a post deposition treatment that densifies the film in a reducing atmosphere to enhance stability if the film is to be cured ex-situ. The densification generally takes place in a reducing environment while heating the substrate. The densification treatment is particularly suitable for silicon-oxygen-carbon low dielectric constant films that have been deposited at low temperature.
摘要翻译：一种用于提供具有增强的粘合性和稳定性的电介质膜的方法。该方法包括在还原气氛中使膜致密化的后沉积处理，以提高如果该膜不原位固化的稳定性。致密化通常在还原环境中进行，同时加热基底。致密化处理特别适用于在低温下沉积的硅 - 氧 - 碳低介电常数膜。

76. 发明申请

US20050064097A1 Method of forming a diamond coating on an iron-based substrate and use of such an iron-based substrate for hosting a CVD diamond coating 失效
标题翻译：在铁基底上形成金刚石涂层的方法，以及使用这种用于承载CVD金刚石涂层的铁基基材
公开(公告)号：US20050064097A1
公开(公告)日：2005-03-24
申请号：US10931795
申请日：2004-08-31
申请人： Wilhelmus Jacobus van Enckevort , Johannes Schermer , Josephus Buijnsters , Prabhakaran Shankar , Johannes ter Meulen
发明人： Wilhelmus Jacobus van Enckevort , Johannes Schermer , Josephus Buijnsters , Prabhakaran Shankar , Johannes ter Meulen
IPC分类号： C23C8/70 , C23C8/80 , C23C16/02 , C23C16/27 , C23C28/04 , C23C16/26
CPC分类号： C23C28/044 , C23C16/0218 , C23C16/0281 , C23C16/27 , C23C28/046
摘要： A method of forming a diamond coating on an iron-based substrate, comprising: providing an iron based substrate with an outer layer which substantially comprises metal borides; and depositing the diamond coating on the outer layer using a process of Chemical Vapor Deposition (CVD). The outer layer may be formed by deposition, by depositing a metal layer which is capable of being boronized followed by boronizing said metal layer, or by boronizing said iron-based substrate. The invention is also related to the use of an iron-based substrate comprising an outer layer with substantially borides for hosting a CVD diamond coating.
摘要翻译：一种在铁基基材上形成金刚石涂层的方法，包括：提供基本上包含金属硼化物的外层的铁基基材; 以及使用化学气相沉积（CVD）的方法将金刚石涂层沉积在外层上。外层可以通过沉积形成，通过沉积能够硼化的金属层，然后硼化所述金属层，或通过硼化所述铁基底材。本发明还涉及使用包含基本上硼化物的外层的铁基基材来承载CVD金刚石涂层。

77. 发明授权

US06858547B2 System and method for forming a gate dielectric 失效
标题翻译：用于形成栅极电介质的系统和方法
公开(公告)号：US06858547B2
公开(公告)日：2005-02-22
申请号：US10256563
申请日：2002-09-27
申请人： Craig R. Metzner , Shreyas S. Kher , Shixue Han
发明人： Craig R. Metzner , Shreyas S. Kher , Shixue Han
IPC分类号： C23C16/02 , C23C16/40 , C23C16/56 , H01L21/316 , H01L21/31
CPC分类号： H01L21/02307 , C23C14/083 , C23C14/10 , C23C14/5806 , C23C14/5826 , C23C14/5853 , C23C14/586 , C23C16/0218 , C23C16/0227 , C23C16/405 , C23C16/56 , H01L21/02148 , H01L21/02181 , H01L21/022 , H01L21/02205 , H01L21/02271 , H01L21/02337 , H01L21/28194 , H01L21/3141 , H01L21/3143 , H01L21/31604 , H01L21/31612 , H01L21/3162 , H01L21/31645 , H01L21/31683 , H01L29/517 , H01L29/78
摘要： A method of forming a dielectric stack on a pre-treated surface. The method comprises pre-cleaning a semiconductor wafer to remove native oxide, such as by applying hydroflouric acid to form an HF-last surface, pre-treating the HF-last surface with ozonated deionized water, forming a dielectric stack on the pre-treated surface and providing a flow of NH3 in a process zone surrounding the wafer. Alternately, the method includes pre-treating the HF-last surface with NH3, forming the stack after the pre-treating, and providing a flow of N2 in a process zone surrounding the wafer after the forming. The method also includes pre-treating the HF-last surface using an in-situ steam generation process, forming the stack on the pre-treated surface, and annealing the wafer after the forming. The pre-treating includes providing an inert gas flow in a process zone surrounding the HF-last surface, reacting hydrogen with an oxidizer in the process zone for a very short duration, and providing an inert gas flew in the process zone after the reacting.
摘要翻译：在预处理表面上形成电介质叠层的方法。该方法包括预先清洁半导体晶片以除去天然氧化物，例如通过施加氢氟酸来形成HF-最后的表面，用臭氧化的去离子水预处理HF-最后的表面，在预处理过的表面，并在围绕晶片的工艺区域中提供NH 3流。或者，该方法包括用NH 3预处理HF-最后表面，在预处理之后形成堆叠，并且在成形之后在晶片周围的处理区域中提供N2流。该方法还包括使用原位蒸汽产生过程预处理HF-最后的表面，在预处理的表面上形成叠层，以及在成形后退火晶片。预处理包括在围绕HF最后表面的处理区域中提供惰性气体流，使处理区中的氢与氧化剂反应非常短的时间，并且在反应之后在处理区中提供惰性气体。

78. 发明申请

US20050009371A1 System and method for forming a gate dielectric 失效
公开(公告)号：US20050009371A1
公开(公告)日：2005-01-13
申请号：US10913941
申请日：2004-08-06
申请人： Craig Metzner , Shreyas Kher , Shixue Han
发明人： Craig Metzner , Shreyas Kher , Shixue Han
IPC分类号： C23C16/02 , C23C16/40 , C23C16/56 , H01L21/316 , H01L21/469
CPC分类号： H01L21/02307 , C23C14/083 , C23C14/10 , C23C14/5806 , C23C14/5826 , C23C14/5853 , C23C14/586 , C23C16/0218 , C23C16/0227 , C23C16/405 , C23C16/56 , H01L21/02148 , H01L21/02181 , H01L21/022 , H01L21/02205 , H01L21/02271 , H01L21/02337 , H01L21/28194 , H01L21/3141 , H01L21/3143 , H01L21/31604 , H01L21/31612 , H01L21/3162 , H01L21/31645 , H01L21/31683 , H01L29/517 , H01L29/78
摘要： A method of forming a dielectric stack on a pre-treated surface. The method comprises pre-cleaning a semiconductor wafer to remove native oxide, such as by applying hydroflouric acid to form an HF-last surface, pre-treating the HF-last surface with ozonated deionized water, forming a dielectric stack on the pre-treated surface and providing a flow of NH3 in a process zone surrounding the wafer. Alternately, the method includes pre-treating the HF-last surface with NH3, forming the stack after the pre-treating, and providing a flow of N2 in a process zone surrounding the wafer after the forming. The method also includes pre-treating the HF-last surface using an in-situ steam generation process, forming the stack on the pre-treated surface, and annealing the wafer after the forming. The pre-treating includes providing an inert gas flow in a process zone surrounding the HF-last surface, reacting hydrogen with an oxidizer in the process zone for a very short duration, and providing an inert gas flew in the process zone after the reacting.

79. 发明申请

US20040266142A1 Method and device for the production of thin epiatctic semiconductor layers 失效
标题翻译：用于生产薄上层半导体层的方法和装置
公开(公告)号：US20040266142A1
公开(公告)日：2004-12-30
申请号：US10484975
申请日：2004-08-16
发明人： Bernd Tillack , Dirk Wolansky , Georg Ritter , Thomas Grabolla
IPC分类号： C30B001/00 , H01L021/20 , H01L021/36
CPC分类号： H01L21/02529 , C23C16/0218 , C23C16/54 , H01L21/02532 , H01L21/0262 , H01L21/02658
摘要： System for producing diffusion-inhibiting epitaxial semiconductor layers, by means of which thin diffusion-inhibiting, epitaxial semiconductor layers can be produced on large semiconductor substrates at a high throughput. The surfaces of the semiconductor substrates to be coated are first cleaned, and the substrates are then heated in a low pressure batch reactor to a first temperature (prebake temperature). The surfaces to be coated are next subjected to a hydrogen prebake operation at a first reactor pressure. In the next step the semiconductor substrates are heated in a low pressure hot or warm wall batch reactor to a second temperature (deposition temperature) lower than the first temperature, and after a condition of thermodynamic equilibrium is reached the diffusion-inhibiting semiconductor layers are deposited on the surfaces to be coated in a chemical gaseous deposition process (CVD) at a second reactor pressure higher than, equal to or lower than the first reactor pressure.
摘要翻译：用于制造扩散抑制外延半导体层的系统，通过该系统，可以在大的半导体衬底上以高通量产生薄的扩散抑制性外延半导体层。首先清洁待涂覆的半导体衬底的表面，然后将衬底在低压间歇反应器中加热到第一温度（预烘烤温度）。待涂覆的表面接下来在第一反应器压力下进行氢预烘烤操作。在下一步骤中，将半导体衬底在低压热或温壁间歇反应器中加热到低于第一温度的第二温度（沉积温度），并且在达到热力学平衡条件之后，沉积扩散抑制半导体层在高于等于或低于第一反应器压力的第二反应器压力下在化学气相沉积工艺（CVD）中待涂覆的表面上。

80. 发明申请

US20040247947A1 Method for fabricating a III nitride film, an underlayer for fabricating a III nitride film and a method for fabricating the same underlayer 有权
标题翻译：制造III族氮化物膜的方法，用于制造III族氮化物膜的底层及其制造方法
公开(公告)号：US20040247947A1
公开(公告)日：2004-12-09
申请号：US10891340
申请日：2004-07-14
申请人： NGK Insulators, Ltd.
发明人： Keiichiro Asai , Tomohiko Shibata , Yukinori Nakamura , Mitsuhiro Tanaka
IPC分类号： B32B009/00
CPC分类号： C30B25/18 , C23C16/0218 , C23C16/303 , H01L21/0237 , H01L21/0242 , H01L21/02458 , H01L21/02494 , H01L21/02502 , H01L21/02516 , H01L21/0254 , H01L21/0262 , H01L21/02658
摘要： A method for fabricating a Group III nitride film is provided, including the steps of preparing a substrate, forming an underfilm and then forming the Group III nitride film on the underfilm. The underfilm is a Group III nitride including at least 50 atomic percent of elemental Al for each of the Group III elements of the underfilm Group III nitride. The surface of the underfilm includes a contoured portion and a flat region, and less than 50% of the surface is occupied by the flat region.
摘要翻译：提供了一种制造III族氮化物膜的方法，包括以下步骤：制备衬底，形成底膜，然后在底膜上形成III族氮化物膜。该底膜是包含III族氮化物的III族元素中的每一种元素的至少50原子％的III族氮化物。底膜的表面包括轮廓部分和平坦区域，并且小于表面的50％被平坦区域占据。

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