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71. 发明授权

US6114235A Multipurpose cap layer dielectric 失效
标题翻译：多功能盖层电介质
公开(公告)号：US6114235A
公开(公告)日：2000-09-05
申请号：US924571
申请日：1997-09-05
申请人： David K. Foote , Minh Van Ngo , Christopher F. Lyons , Fei Wang , Raymond T. Lee , William G. En , Susan H. Chen , Darin A. Chan
发明人： David K. Foote , Minh Van Ngo , Christopher F. Lyons , Fei Wang , Raymond T. Lee , William G. En , Susan H. Chen , Darin A. Chan
IPC分类号： H01L21/027 , H01L21/311 , H01L21/314 , H01L21/768 , H01L21/44
CPC分类号： H01L21/0276 , H01L21/31144 , H01L21/76802 , H01L21/76829 , H01L21/7684 , H01L21/3145 , Y10S438/945
摘要： A multipurpose cap layer serves as a bottom anti-reflective coating (BARC) during the formation of a resist mask, a hardmask during subsequent etching processes, a hardened surface during subsequent deposition and planarization processes, and optionally as a diffusion barrier to mobile ions from subsequently deposited materials.
摘要翻译：在形成抗蚀剂掩模，后续蚀刻工艺期间的硬掩模，随后的沉积和平坦化工艺期间的硬化表面，以及任选地作为对移动离子的扩散阻挡层，多功能盖层用作底部抗反射涂层（BARC）随后沉积材料。

72. 发明授权

US5744537A Antireflective coating films 失效
标题翻译：顶级抗反射涂膜
公开(公告)号：US5744537A
公开(公告)日：1998-04-28
申请号：US863678
申请日：1997-05-27
申请人： William R. Brunsvold , George J. Hefferon , Christopher F. Lyons , Wayne M. Moreau , Robert L. Wood
发明人： William R. Brunsvold , George J. Hefferon , Christopher F. Lyons , Wayne M. Moreau , Robert L. Wood
IPC分类号： G03F7/11 , C08L27/12 , G03F7/00 , G03F7/09 , H01L21/027 , H01L21/30
CPC分类号： G03F7/091 , G03F7/092 , Y10T428/3154
摘要： Enhanced fidelity of pattern transfer of aqueous developable photoresist compositions is achieved with top antirefective coatings which are fluorine-containing and have a refractive index approximately equal to the square root of the underlying photoresist and which are removable in the developer for the photoresist.
摘要翻译：水性可显影光致抗蚀剂组合物的图案转印的增强的保真度是通过含氟的顶部抗有效涂层实现的，其折射率近似等于下面光致抗蚀剂的平方根，并且可在光致抗蚀剂的显影剂中除去。

73. 发明授权

US5482817A Mid and deep-uv antireflection coatings and methods for use thereof 失效
标题翻译：中，深紫外防反射涂层及其使用方法
公开(公告)号：US5482817A
公开(公告)日：1996-01-09
申请号：US315318
申请日：1994-09-29
申请人： Robert R. Dichiara , Christopher F. Lyons , Ratnasabapathy Sooriyakumaran , Gary T. Spinillo , Kevin M. Welsh , Robert L. Wood
发明人： Robert R. Dichiara , Christopher F. Lyons , Ratnasabapathy Sooriyakumaran , Gary T. Spinillo , Kevin M. Welsh , Robert L. Wood
IPC分类号： G03F7/11 , G03F7/09 , H01L21/027 , H01L21/30 , G03C5/00
CPC分类号： G03F7/091 , Y10S522/904
摘要： An antireflective coating composition (ARC) for use with chemically amplified photoresist compositions comprising a polymer composition which is highly absorbent to mid and deep UV radiation, which is substantially inert to contact reactions with a chemically amplified photoresist composition, and which is insoluble in the developer for the chemically amplified photoresist composition.
摘要翻译：一种用于化学放大光致抗蚀剂组合物的抗反射涂料组合物（ARC），其包含对中和深紫外线辐射具有高吸收性的聚合物组合物，其对于与化学放大的光致抗蚀剂组合物的接触反应基本上是惰性的，并且不溶于显影剂用于化学放大光致抗蚀剂组合物。

74. 发明授权

US06864024B1 Real-time control of chemically-amplified resist processing on wafer 失效
标题翻译：化学放大抗蚀剂加工在晶圆上的实时控制
公开(公告)号：US06864024B1
公开(公告)日：2005-03-08
申请号：US10302225
申请日：2002-11-22
申请人： Christopher F. Lyons , Bharath Rangarajan
发明人： Christopher F. Lyons , Bharath Rangarajan
IPC分类号： A61N5/00 , G03C5/00 , G03F7/038 , G03F7/039 , G03F9/00
CPC分类号： G03F7/0382 , G03F7/0392
摘要： One aspect of the present invention relates to a system and method for controlling environmental acid scavengers in real time during pattern exposure of a chemically amplified resist-clad wafer. The system includes a semiconductor wafer comprising a chemically amplified resist layer formed over a substrate layer, wherein a first portion of the resist layer has been removed to expose an area of the substrate layer in order to form a probe area; an exposure system programmed to implement an exposure process to transfer a device pattern onto at least a second portion of the resist layer; and a monitoring system adapted to detect chemical signals about the probe area in order to control the integrity of the resist layer during the exposure process. The method involves feeding data back to the on-going exposure process in order to effect an immediate change in the process.
摘要翻译：本发明的一个方面涉及在化学放大的抗蚀剂包覆晶片的图案曝光期间实时控制环境酸清除剂的系统和方法。该系统包括半导体晶片，其包括在衬底层上形成的化学放大抗蚀剂层，其中已除去抗蚀剂层的第一部分以暴露衬底层的区域以形成探针区域; 曝光系统被编程为实现曝光过程以将装置图案转印到抗蚀剂层的至少第二部分上; 以及适于检测关于探针区域的化学信号以便在曝光过程期间控制抗蚀剂层的完整性的监测系统。该方法涉及将数据馈送回正在进行的曝光过程，以便立即改变过程。

75. 发明授权

US06829040B1 Lithography contrast enhancement technique by varying focus with wavelength modulation 有权
标题翻译：通过波长调制改变焦点的平版印刷对比度增强技术
公开(公告)号：US06829040B1
公开(公告)日：2004-12-07
申请号：US10703643
申请日：2003-11-07
申请人： Jongwook Kye , Ivan Lalovic , Christopher F. Lyons , Ramkumar Subramanian
发明人： Jongwook Kye , Ivan Lalovic , Christopher F. Lyons , Ramkumar Subramanian
IPC分类号： G03B2742
CPC分类号： G03F7/70575 , G03F7/703 , G03F7/70333
摘要： A projection lithography system exposes a photo sensitive material on a surface of a semiconductor substrate that includes surface height variations between a high level and a low level. The system comprises an illumination source projecting illumination within a narrow wavelength band centered about a nominal wavelength on an optic path towards the substrate during an exposure period. A wavelength modulation system within the optic path comprises means for chromatically separating the narrow wavelength band into at least two sub-bands, the first sub-band being smaller than the narrow wavelength band and centered about a first sub-band wavelength and the second sub-band being smaller than the narrow wavelength band and centered about a second sub-band wavelength and means for passing each of the first sub-band and the second sub-band during distinct time periods within the exposure period.
摘要翻译：投影光刻系统在半导体衬底的表面上曝光感光材料，其包括高电平和低电平之间的表面高度变化。该系统包括照射源，其在曝光期间内以在光路上朝着衬底的标称波长为中心的窄波长带内投射照明。光路内的波长调制系统包括用于将窄波段色带分离成至少两个子带的装置，第一子带小于窄波段并以第一子带波长为中心，第二子带带窄于窄波长带并以第二子带波长为中心，以及用于在曝光周期内的不同时间段内通过第一子带和第二子带中的每一个的装置。

76. 发明授权

US06654660B1 Controlling thermal expansion of mask substrates by scatterometry 有权
标题翻译：通过散射法控制掩模基板的热膨胀
公开(公告)号：US06654660B1
公开(公告)日：2003-11-25
申请号：US10287292
申请日：2002-11-04
申请人： Bhanwar Singh , Christopher F. Lyons , Bharath Rangarajan , Khoi A. Phan , Ramkumar Subramanian
发明人： Bhanwar Singh , Christopher F. Lyons , Bharath Rangarajan , Khoi A. Phan , Ramkumar Subramanian
IPC分类号： G06F1900
CPC分类号： G03F7/70425 , G03F7/70875
摘要： One aspect of the present invention relates to a system and method for controlling thermal expansion on an EUV mask during EUV photolithography. The system includes an EUV photolithography system for irradiating one or more layers of a wafer through one or more gratings of a patterned EUV mask, whereby heat accumulates on at least a portion of the patterned EUV mask during the irradiation of the one or more layers of the wafer; an EUV mask inspection system for monitoring the one or more gratings on the mask to detect expansion therein, the inspection system producing data relating to the mask; and a temperature control system operatively coupled to the inspection system for making adjustments to the EUV photolithography system in order to compensate for the detected expansion on the mask. The method involves employing feedback and feed forward control to optimize the current and future EUV photolithography processes.
摘要翻译：本发明的一个方面涉及一种用于在EUV光刻期间控制EUV掩模上的热膨胀的系统和方法。该系统包括用于通过图案化的EUV掩模的一个或多个光栅照射晶片的一个或多个层的EUV光刻系统，由此在图案化的EUV掩模的照射期间在图案化的EUV掩模的至少一部分上积聚热量晶圆; 用于监视所述掩模上的所述一个或多个光栅以检测其中的扩展的EUV掩模检查系统，所述检查系统产生与所述掩模有关的数据; 以及温度控制系统，其可操作地耦合到所述检查系统，以对EUV光刻系统进行调整，以便补偿所述掩模上检测到的膨胀。该方法涉及采用反馈和前馈控制来优化当前和未来的EUV光刻工艺。

77. 发明授权

US06599810B1 Shallow trench isolation formation with ion implantation 有权
标题翻译：浅沟隔离形成与离子注入
公开(公告)号：US06599810B1
公开(公告)日：2003-07-29
申请号：US09186078
申请日：1998-11-05
申请人： Nick Kepler , Olov Karlsson , Larry Wang , Basab Bandyopadhyay , Effiong Ibok , Christopher F. Lyons
发明人： Nick Kepler , Olov Karlsson , Larry Wang , Basab Bandyopadhyay , Effiong Ibok , Christopher F. Lyons
IPC分类号： H01L2176
CPC分类号： H01L21/76237 , H01L21/26586 , H01L21/76235
摘要： An insulated trench isolation structure is formed by ion implanting impurities proximate to the trench edges for enhancing the oxidation rate and, hence, increasing the thickness of the oxide at the trench edges. Embodiments include ion implanting impurities prior to growing an oxide liner. The resulting thick oxide on the trench edges avoids overlap of a subsequently deposited polysilicon layer and breakdown problems attendant upon a thinned gate oxide at the trench edges.
摘要翻译：通过离子注入靠近沟槽边缘的杂质形成绝缘沟槽隔离结构，以增强氧化速率，并因此增加沟槽边缘处氧化物的厚度。实施例包括在生长氧化物衬垫之前的离子注入杂质。沟槽边缘上产生的厚氧化物避免随后沉积的多晶硅层的重叠以及伴随沟槽边缘处的薄化栅极氧化物的破坏问题。

78. 发明授权

US06326319B1 Method for coating ultra-thin resist films 有权
标题翻译：超薄抗蚀剂膜的涂布方法
公开(公告)号：US06326319B1
公开(公告)日：2001-12-04
申请号：US09609746
申请日：2000-07-03
申请人： Christopher L. Pike , Khanh B. Nguyen , Christopher F. Lyons
发明人： Christopher L. Pike , Khanh B. Nguyen , Christopher F. Lyons
IPC分类号： H01F1002
CPC分类号： H01L21/02312 , G03F7/16 , G03F7/162 , H01L21/02109 , H01L21/02307 , H01L21/312 , H01L21/3125
摘要： There is provided a method for applying a lower viscosity coating liquid onto a semiconductor wafer substrate so as to prevent adhesion loss and to maintain low defect level characteristics. This is achieved by priming the substrate with a bonding agent at a temperature in the range of 18° C. to 50° C. for a short amount of time. This is performed prior to the application of a liquid solvent. As a result, there is overcome the problems of poor adhesion to the substrates and high defect levels in the coated UTR films.
摘要翻译：提供了一种将低粘度涂布液施加到半导体晶片衬底上以防止粘附损失并保持低缺陷水平特性的方法。这是通过用粘合剂在18℃至50℃的温度范围内引发基底短时间来实现的。这是在施加液体溶剂之前进行的。结果，克服了在涂覆的UTR膜中对基材的粘附性差和高缺陷水平的问题。

79. 发明授权

US06287959B1 Deep submicron metallization using deep UV photoresist 失效
标题翻译：深亚微米金属化使用深紫外光致抗蚀剂
公开(公告)号：US06287959B1
公开(公告)日：2001-09-11
申请号：US09065352
申请日：1998-04-23
申请人： Christopher F. Lyons , Bhanwar Singh
发明人： Christopher F. Lyons , Bhanwar Singh
IPC分类号： H01L214763
CPC分类号： H01L21/0276 , H01L21/31116 , H01L21/3144 , H01L21/76802 , Y10S438/952 , Y10S438/97
摘要： Reflection of incident optical radiation from a highly reflective metal layer (12), such as aluminum, copper or titanium, into a photoresist layer (16) is reduced by interposing a layer of silicon oxynitride (14) between the metal and photoresist layers. The silicon oxynitride layer (14) is pre-treated with an oxidizing plasma to deplete surface nitrogen and condition the silicon oxynitride layer (14) to be more compatible with deep ultraviolet photoresists. The silicon oxynitride layer (14) further serves as an etch stop in the formation of interconnect openings (40), such as vias, contacts and trenches. The interconnect opening (40) is filled with a second metallization layer to achieve multi-layer electrical interconnection.
摘要翻译：通过在金属和光致抗蚀剂层之间插入一层氮氧化硅（14），将来自诸如铝，铜或钛的高反射金属层（12）的入射光辐射反射到光致抗蚀剂层（16）中。氮氧化硅层（14）用氧化等离子体进行预处理以消除表面氮，并且使氮氧化硅层（14）与深紫外光致抗蚀剂更相容。氧氮化硅层（14）还用作形成互连开口（40）的蚀刻停止层，例如通路，触点和沟槽。互连开口（40）填充有第二金属化层以实现多层电互连。

80. 发明授权

US06270929B1 Damascene T-gate using a relacs flow 有权
标题翻译：大马士革T门使用相关资料流
公开(公告)号：US06270929B1
公开(公告)日：2001-08-07
申请号：US09619789
申请日：2000-07-20
申请人： Christopher F. Lyons , Ramkumar Subramanian , Bhanwar Singh , Marina Plat
发明人： Christopher F. Lyons , Ramkumar Subramanian , Bhanwar Singh , Marina Plat
IPC分类号： H01L21302
CPC分类号： H01L21/28114 , H01L21/0273 , H01L21/0338 , H01L21/31144 , H01L21/76802 , H01L29/42376
摘要： A method for fabricating a T-gate structure is provided. A structure is provided that has a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer and an insulating layer over the gate oxide layer. A photoresist layer is formed over the insulating layer. An opening is the formed extending through the photoresist layer and partially into the insulating layer. The opening in the insulating layer extends from a top surface of the insulating layer to a first depth. The photoresist layer is swelled to reduce the size of the opening in the photoresist layer. The opening is then extended in the insulating layer from the first depth to a second depth. The opening is wider from the top surface of the insulating layer to the first depth than the opening is from the first depth to the second depth. The opening is then filled with a conductive material to form a T-gate structure.
摘要翻译：提供了一种制造T型栅结构的方法。提供一种结构，其具有硅层，该硅层具有栅极氧化物层，栅极氧化物层上的多晶硅层和栅极氧化物层上的绝缘层。在绝缘层上形成光致抗蚀剂层。开口形成为延伸穿过光致抗蚀剂层并部分地进入绝缘层。绝缘层中的开口从绝缘层的顶表面延伸到第一深度。光致抗蚀剂层被膨胀以减小光致抗蚀剂层中的开口的尺寸。然后将开口在绝缘层中从第一深度延伸到第二深度。开口从绝缘层的顶表面到比第一深度从第一深度到第二深度的第一深度更宽。然后用导电材料填充开口以形成T形栅结构。

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