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71. 发明申请

US20090031262A1 MASK PATTERN FORMATION METHOD, MASK PATTERN FORMATION APPARATUS, AND LITHOGRAPHY MASK 审中-公开
标题翻译：掩模图案形成方法，掩模图案形成装置和平铺掩模
公开(公告)号：US20090031262A1
公开(公告)日：2009-01-29
申请号：US12179735
申请日：2008-07-25
申请人： Shimon Maeda , Suigen Kyoh , Soichi Inoue
发明人： Shimon Maeda , Suigen Kyoh , Soichi Inoue
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A mask pattern formation method and apparatus capable of performing OPC and lithography verification and obtaining OPC result, and a lithography mask are provided. The method of forming a mask pattern from a design layout of a semiconductor integrated circuit comprises inputting a design layout, performing first OPC on the design layout, calculating a first evaluation value for a finished planar shape of a resist pattern corresponding to the design layout based on the first OPC, determining whether the first evaluation value satisfies a predetermined value, if the first evaluation value does not satisfy the predetermined value, locally altering the design layout, performing second OPC on the altered design layout, calculating a second evaluation value for the altered design layout, performing second determination, and if the second evaluation value satisfies the predetermined value, outputting the result of OPC and the first and second evaluation values.
摘要翻译：提供了能够执行OPC和光刻验证并获得OPC结果的掩模图案形成方法和装置，以及光刻掩模。从半导体集成电路的设计布局形成掩模图案的方法包括输入设计布局，在设计布局上执行第一OPC，计算与设计布局相对应的抗蚀剂图案的成品平面形状的第一评估值在第一OPC上，确定第一评估值是否满足预定值，如果第一评估值不满足预定值，则局部改变设计布局，在改变的设计布局上执行第二OPC，计算第二评估值改变设计布局，执行第二确定，以及如果第二评估值满足预定值，则输出OPC的结果以及第一和第二评估值。

72. 发明授权

US07474386B2 Wafer flatness evaluation method, wafer flatness evaluation apparatus carrying out the evaluation method, wafer manufacturing method using the evaluation method, wafer quality assurance method using the evaluation method, semiconductor device manufacturing method using the evaluation method and semiconductor device manufacturing method using a wafer evaluated by the evaluation method 有权
标题翻译：晶片平坦度评估方法，执行评估方法的晶片平整度评估装置，使用评估方法的晶片制造方法，使用评估方法的晶片质量保证方法，使用评估方法的半导体器件制造方法和使用由评估方法
公开(公告)号：US07474386B2
公开(公告)日：2009-01-06
申请号：US11710552
申请日：2007-02-26
申请人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
发明人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
IPC分类号： G03B27/58 , G03B27/32 , G03B27/52
CPC分类号： G01B21/30 , G01B11/306 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.
摘要翻译：公开了一种晶片平坦度评估方法，其包括测量晶片的前后表面形状。测量的晶圆正面分为几个部位。然后，根据要评估的位置的位置选择平坦度计算方法，并获得晶片表面的平坦度。

73. 发明授权

US07473495B2 Method of creating predictive model, method of managing process steps, method of manufacturing semiconductor device, method of manufacturing photo mask, and computer program product 有权
标题翻译：创建预测模型的方法，管理工艺步骤的方法，制造半导体器件的方法，制造光罩的方法以及计算机程序产品
公开(公告)号：US07473495B2
公开(公告)日：2009-01-06
申请号：US10927218
申请日：2004-08-27
申请人： Satoshi Tanaka , Soichi Inoue , Koji Hashimoto , Shigeru Hasebe
发明人： Satoshi Tanaka , Soichi Inoue , Koji Hashimoto , Shigeru Hasebe
IPC分类号： G03F9/00
CPC分类号： G03F1/36 , G06F17/5068
摘要： A method of creating a predictive model of a process proximity effect comprises: preparing a predictive model of a process proximity effect including a non-determined parameter; and determining the non-determined parameter, the method comprises: preparing a pattern group for modeling, the pattern group comprising a plurality of repetition patterns, the plurality of repetition patterns being obtained by changing a first and second dimensions of a repetition pattern which repeats a basic pattern, the first dimension defining the basic pattern, and the second dimension defining repetition of the basic pattern; selecting a predetermined repetition pattern from the pattern group for modeling, the basic pattern of the predetermined repetition pattern corresponding to a pattern which is to be formed on a wafer and has a predetermined dimension; and determining the non-determined parameter in the predictive model based on the predetermined repetition pattern and the pattern having the predetermined dimension.
摘要翻译：一种创建过程接近效应的预测模型的方法包括：准备包括非确定参数的过程接近效应的预测模型; 并且确定所述未确定的参数，所述方法包括：准备用于建模的图案组，所述图案组包括多个重复图案，所述多个重复图案是通过改变重复图案的重复图案的第一和第二维度而获得的基本图案，定义基本图案的第一维度和定义基本图案重复的第二维度; 从所述图案组中选择预定的重复图案以进行建模，所述预定重复图案的基本图案与将要形成在晶片上并且具有预定尺寸的图案相对应; 以及基于预定重复图案和具有预定尺寸的图案来确定预测模型中的未确定参数。

74. 发明申请

US20080216046A1 PATTERN MANAGEMENT METHOD AND PATTERN MANAGEMENT PROGRAM 失效
标题翻译：模式管理方法与模式管理方案
公开(公告)号：US20080216046A1
公开(公告)日：2008-09-04
申请号：US11958465
申请日：2007-12-18
申请人： Kenji YOSHIDA , Soichi Inoue
发明人： Kenji YOSHIDA , Soichi Inoue
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F2217/12 , Y02P90/265
摘要： A pattern management method includes extracting patterns having process margins equal to or below a predetermined value from a chip layout of an integrated circuit, screening a plurality of types of representative patterns from the extracted pattern, extracting patterns closest to the most outer periphery of the chip from the representative patterns, and representatively managing the extracted patterns which is closest to the most outer periphery of the chip.
摘要翻译：图案管理方法包括从集成电路的芯片布局提取具有等于或低于预定值的处理余量的图案，从提取的图案中筛选多种类型的代表图案，提取最靠近芯片的最外周边的图案并且代表性地管理最靠近芯片的最外围的提取图案。

75. 发明授权

US07353145B2 Method for correcting a mask pattern, a computer program product, a method for producing a photomask, and method for manufacturing a semiconductor device 有权
标题翻译：用于校正掩模图案的方法，计算机程序产品，光掩模的制造方法以及半导体器件的制造方法
公开(公告)号：US07353145B2
公开(公告)日：2008-04-01
申请号：US10307968
申请日：2002-12-03
申请人： Satoshi Tanaka , Soichi Inoue
发明人： Satoshi Tanaka , Soichi Inoue
IPC分类号： G06F7/60 , G06F17/50 , G05B19/18 , G03F1/00
CPC分类号： G03F1/36
摘要： A computer implemented method for correcting a mask pattern, includes: preparing a designed mask pattern; obtaining a rough corrected mask pattern from the designed mask pattern by applying a rough correction; and obtaining a precision corrected mask pattern from the rough corrected mask pattern by applying a precision correction using a model based correction method with a precision model that simulates a transferred image of an exposure apparatus.
摘要翻译：一种用于校正掩模图案的计算机实现方法，包括：准备设计的掩模图案; 通过粗略校正从设计的掩模图案获得粗糙校正的掩模图案; 以及通过使用模拟所述曝光装置的转印图像的精度模型，使用基于模型的校正方法应用精度校正，从所述粗略校正的掩模图案中获得精密校正的掩模图案。

76. 发明授权

US07327449B2 Exposure apparatus inspection method and exposure apparatus 失效
标题翻译：曝光装置检查方法和曝光装置
公开(公告)号：US07327449B2
公开(公告)日：2008-02-05
申请号：US11806976
申请日：2007-06-05
申请人： Kazuya Fukuhara , Soichi Inoue
发明人： Kazuya Fukuhara , Soichi Inoue
IPC分类号： G01N21/00
CPC分类号： G03F7/70591 , G03F7/70133 , G03F7/70141 , G03F7/70191 , G03F7/706 , G03F7/70641
摘要： An inspection method for an exposure apparatus for illuminating a photomask on a first installation member by an illumination optical system, and for projecting an image of a pattern of the photomask onto a substrate on a second installation member through a projection optical system, the inspection method comprises disposing an inspection photosensitive substrate as the substrate on the second installation member, illuminating a first region which doesn't include a pupil end of the projection optical system and a second region which includes the pupil end of the projection optical system and which isn't overlapped with the first region, in a state in which a surface of the photosensitive substrate and a surface of a secondary light source of the illumination optical system are optically conjugate with each other, and inspecting an illumination axis offset of the exposure apparatus based on a pattern obtained by developing the photosensitive substrate.
摘要翻译：一种用于通过照明光学系统照射第一安装构件上的光掩模的曝光装置的检查方法，并且用于通过投影光学系统将光掩模的图案的图像投影到第二安装构件上的基板上，检查方法包括将检查感光基板作为基板设置在第二安装构件上，照亮不包括投影光学系统的光瞳端的第一区域和包括投影光学系统的光瞳端的第二区域，在光敏基板的表面和照明光学系统的二次光源的表面彼此光学共轭的状态下，与第一区域重叠，并且基于曝光装置的照明轴偏移来检查通过显影感光基板获得的图案。

77. 发明申请

US20070259280A1 Photomask, exposure control method and method of manufacturing a semiconductor device 失效
标题翻译：光掩模，曝光控制方法和制造半导体器件的方法
公开(公告)号：US20070259280A1
公开(公告)日：2007-11-08
申请号：US11819375
申请日：2007-06-27
申请人： Tadahito Fujisawa , Soichi Inoue , Satoshi Tanaka , Masafumi Asano
发明人： Tadahito Fujisawa , Soichi Inoue , Satoshi Tanaka , Masafumi Asano
IPC分类号： G03F7/20 , G03F1/00 , G03C5/00 , G03F7/40 , G03F7/38
CPC分类号： G03F1/44
摘要： A photomask transferring a light shield film pattern formed on a transparent substrate by a projection exposure apparatus, comprising a circuit pattern for transferring a predetermined pattern to a resist film, and an exposure monitor mark, the exposure monitor mark being formed in a manner that blocks having a predetermined width p, which are not resolved by the projection exposure apparatus, are intermittently or continuously arrayed along one direction, light shield and transmission portions are arrayed along one direction in each of the blocks, the blocks are arrayed so that a dimension ratio of the light shield and transmission portions of the blocks simply changes and the phase difference of exposure light passing through adjacent light transmission portions is approximately 180°.
摘要翻译：一种光掩模，其通过投影曝光装置将形成在透明基板上的遮光膜图案转印，所述投影曝光装置包括用于将预定图案转印到抗蚀剂膜的电路图案，以及曝光监视标记，所述曝光监视标记以块具有未被投影曝光装置解析的预定宽度p沿着一个方向间歇地或连续地排列，在每个块中沿着一个方向排列有光屏蔽和透射部分，块被排列成使得尺寸比的光屏蔽和透射部分简单地改变，并且穿过相邻光传输部分的曝光光的相位差大约为180°。

78. 发明授权

US07286216B2 Exposure apparatus inspection method and exposure apparatus 失效
公开(公告)号：US07286216B2
公开(公告)日：2007-10-23
申请号：US10650013
申请日：2003-08-28
申请人： Kazuya Fukuhara , Soichi Inoue
发明人： Kazuya Fukuhara , Soichi Inoue
IPC分类号： G01N21/00
CPC分类号： G03F7/70591 , G03F7/70133 , G03F7/70141 , G03F7/70191 , G03F7/706 , G03F7/70641
摘要： An inspection method for an exposure apparatus for illuminating a photomask on a first installation member by an illumination optical system, and for projecting an image of a pattern of the photomask onto a substrate on a second installation member through a projection optical system, the inspection method comprises disposing an inspection photosensitive substrate as the substrate on the second installation member, illuminating a first region which doesn't include a pupil end of the projection optical system and a second region which includes the pupil end of the projection optical system and which isn't overlapped with the first region, in a state in which a surface of the photosensitive substrate and a surface of a secondary light source of the illumination optical system are optically conjugate with each other, and inspecting an illumination axis offset of the exposure apparatus based on a pattern obtained by developing the photosensitive substrate.

79. 发明授权

US07248349B2 Exposure method for correcting a focal point, and a method for manufacturing a semiconductor device 有权
标题翻译：用于校正焦点的曝光方法，以及半导体装置的制造方法
公开(公告)号：US07248349B2
公开(公告)日：2007-07-24
申请号：US11220701
申请日：2005-09-08
申请人： Takashi Sato , Shoji Mimotogi , Takahiro Ikeda , Soichi Inoue
发明人： Takashi Sato , Shoji Mimotogi , Takahiro Ikeda , Soichi Inoue
IPC分类号： G01B9/00 , G01B11/00 , G03F9/00 , G03C5/00
CPC分类号： G03F7/70516
摘要： There is disclosed an exposure method for correcting a focal point, comprising: illuminating a mask, in which a mask-pattern including at least a set of a first mask-pattern and a second mask-pattern mutually different in shape is formed, from a direction in which a point located off an optical axis of an exposure apparatus is a center of illumination, and exposing and projecting an image of said mask-pattern toward an image-receiving element; measuring a mutual relative distance between images of said first and second mask-patterns exposed and projected on said image-receiving element, thereby measuring a focal point of a projecting optical system of said exposure apparatus; and moving said image-receiving element along a direction of said optical axis of said exposure apparatus on a basis of a result of said measurement, and disposing said image-receiving element at an appropriate focal point of said projecting optical system.
摘要翻译：公开了一种用于校正焦点的曝光方法，包括：照射掩模，其中形成包括至少一组第一掩模图案和形成相互不同形状的第二掩模图案的掩模图案使曝光装置的光轴离开的点为照明中心的方向，向图像接收元件曝光和投影所述掩模图案的图像; 测量曝光和投影在所述图像接收元件上的所述第一和第二掩模图案的图像之间的相对相对距离，从而测量所述曝光设备的投影光学系统的焦点; 并且基于所述测量的结果沿所述曝光装置的所述光轴的方向移动所述图像接收元件，并将所述图像接收元件设置在所述投影光学系统的适当焦点处。

80. 发明申请

US20070105391A1 Semiconductor device fabrication method and semiconductor device 有权
标题翻译：半导体器件制造方法和半导体器件
公开(公告)号：US20070105391A1
公开(公告)日：2007-05-10
申请号：US11643907
申请日：2006-12-22
申请人： Koji Hashimoto , Soichi Inoue , Kazuhiro Takahata , Kei Yoshikawa
发明人： Koji Hashimoto , Soichi Inoue , Kazuhiro Takahata , Kei Yoshikawa
IPC分类号： H01L21/302 , H01L21/3205 , H01L21/8234
CPC分类号： G03F7/0035 , H01L21/0338 , H01L21/28123 , H01L21/32139 , H01L21/823456 , H01L21/823475 , H01L27/10873 , H01L27/10894 , H01L27/10897
摘要： A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section. (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.
摘要翻译：在工作薄膜（3）上的硬掩模材料膜（4）上的曝光分辨率的限制的尺寸形成抗蚀剂图案（5）。使用抗蚀剂图案（5）作为掩模来处理材料膜（4）。由此形成硬掩模图案（6）。由此，在非选择区域（6b）上形成具有开口（7a）的抗蚀剂图案（7），掩模图案中的选择区域（6a）通过该开口暴露。仅通过开口（7a）暴露的掩模图案（6a）通过进行选择蚀刻而变薄，通过使用掩模图案（6）蚀刻工作膜（3）。由此形成工作膜图案（8），其包括宽图案部分。（8a）限定曝光分辨率的尺寸宽度和不大于曝光分辨率限制的尺寸的纤薄图案部分（8a）。

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