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    • 44. 发明申请
    • METHODS OF FORMING A MULTI-DOPED JUNCTION WITH POROUS SILICON
    • 用多孔硅形成多层结的方法
    • US20110003466A1
    • 2011-01-06
    • US12794188
    • 2010-06-04
    • Giuseppe ScarderaHomer AntoniadisNick CravalhoMaxim KelmanElena RogojinaKarel Vanheusden
    • Giuseppe ScarderaHomer AntoniadisNick CravalhoMaxim KelmanElena RogojinaKarel Vanheusden
    • H01L21/22
    • H01L21/2255H01L31/022425H01L31/068H01L31/1804Y02E10/547Y02P70/521
    • A method of forming a multi-doped junction on a substrate is disclosed. The method includes providing the substrate doped with boron atoms, the substrate comprising a front crystalline substrate surface; and forming a mask on the front crystalline substrate surface, the mask comprising exposed mask areas and non-exposed mask areas. The method also includes exposing the mask to an etchant, wherein porous silicon is formed on the front crystalline substrate surface defined by the exposed mask areas; and removing the mask. The method further includes exposing the substrate to a dopant source in a diffusion furnace with a deposition ambient, the deposition ambient comprising POCl3 gas, at a first temperature and for a first time period, wherein a PSG layer is formed on the front substrate surface; and heating the substrate in a drive-in ambient to a second temperature and for a second time period. Wherein a first diffused region with a first sheet resistance is formed under the porous silicon and a second diffused region with a second sheet resistance is formed under the front crystalline substrate surface without the porous silicon, and wherein the first sheet resistance is substantially smaller than the second sheet resistance.
    • 公开了一种在衬底上形成多掺杂结的方法。 该方法包括提供掺杂有硼原子的衬底,该衬底包括前结晶衬底表面; 以及在所述前晶体衬底表面上形成掩模,所述掩模包括暴露的掩模区域和未暴露的掩模区域。 该方法还包括将掩模暴露于蚀刻剂,其中多孔硅形成在由暴露的掩模区限定的前结晶衬底表面上; 并取下面罩。 该方法还包括在第一温度和第一时间段内,使沉积环境包括沉积环境包含POCl 3气体的扩散炉中的衬底暴露于掺杂剂源,其中在前衬底表面上形成PSG层; 以及将驱动环境中的衬底加热至第二温度并持续第二时间段。 其中在多孔硅下方形成具有第一薄层电阻的第一扩散区域,并且在没有多孔硅的前结晶衬底表面下形成具有第二薄层电阻的第二扩散区域,并且其中第一薄层电阻显着小于 第二片电阻。
    • 45. 发明申请
    • METHODS FOR IMPROVING PERFORMANCE VARIATION OF A SOLAR CELL MANUFACTURING PROCESS
    • 改进太阳能电池制造工艺性能变化的方法
    • US20100178718A1
    • 2010-07-15
    • US12352857
    • 2009-01-13
    • Maxim KelmanKarel Vanheusden
    • Maxim KelmanKarel Vanheusden
    • H01L21/66
    • H01L31/022433H01L31/068H01L31/0682H01L31/1804Y02E10/547Y02P70/521
    • A method for optimizing a solar cell manufacturing process is described. The method includes determining a reference finger spacing value and a reference bulk lifetime for the solar cell manufacturing process. The method also includes measuring an actual bulk lifetime of a wafer with an in-line measurement tool. The method further includes calculating an optimal finger spacing value with a computer coupled to the in-line measurement tool, the optimal finger spacing value being the product of the reference finger spacing value and a square root of the actual bulk lifetime divided by the square root of the reference bulk lifetime. The method further includes forming a junction on the wafer, and depositing a set of busbars and a set of fingers on the wafer with a metal deposition device, wherein a distance between a first finger and a second finger of the set of fingers is about the optimal finger spacing value.
    • 描述了一种用于优化太阳能电池制造过程的方法。 该方法包括确定太阳能电池制造过程的参考手指间隔值和参考体积寿命。 该方法还包括使用在线测量工具测量晶片的实际体积寿命。 该方法还包括利用耦合到在线测量工具的计算机计算最佳手指间隔值,最佳手指间隔值是参考手指间隔值和实际体寿命的平方根除以平方根的乘积 的参考批量寿命。 该方法还包括在晶片上形成结,以及用金属沉积装置在晶片上沉积一组汇流条和一组指状物,其中该组手指的第一手指与第二手指之间的距离约为 最佳手指间距值。