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31. 发明授权

US07414461B2 Linearization technique for current mode filters 有权
标题翻译：电流模式滤波器的线性化技术
公开(公告)号：US07414461B2
公开(公告)日：2008-08-19
申请号：US11534716
申请日：2006-09-25
申请人： Burton DeVolk
发明人： Burton DeVolk
IPC分类号： H03K5/00
CPC分类号： H03F1/223 , H03F1/3205 , H03F1/342 , H03F2200/366 , H03F2200/453 , H03F2200/61 , H03F2200/75 , H03F2200/91
摘要： A circuit is disclosed that compensates for the non-linearity of a current mode real pole producing circuit used to generate poles and zeros in complex filter circuits. The non-linearity of the prior art is compensated by driving one end of the primary pole producing capacitor with a signal derived from the drain current and fed back so as to counteract the non-linearity factors.
摘要翻译：公开了补偿用于在复杂滤波器电路中产生极点和零点的电流模式实极产生电路的非线性的电路。通过用从漏极电流导出的信号驱动主极产生电容器的一端来补偿现有技术的非线性，并反馈以抵消非线性系数。

32. 发明授权

US07088971B2 Integrated RF front end 有权
标题翻译：集成RF前端
公开(公告)号：US07088971B2
公开(公告)日：2006-08-08
申请号：US11158597
申请日：2005-06-22
申请人： Mark L. Burgener , James S. Cable
发明人： Mark L. Burgener , James S. Cable
IPC分类号： H04B1/04
CPC分类号： H03F3/189 , H01Q23/00 , H03F1/223 , H03F1/565 , H03F3/2171 , H03F3/68 , H03F2200/294 , H03F2200/372 , H03F2200/61 , H03G3/3042 , H03G11/00 , H04B1/0475 , H04B1/48
摘要： A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Preferred fabrication techniques include stacking multiple FETs to form switching devices. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.
摘要翻译：一种单片集成电路（IC）及其制造方法，其包括用于便携式通信设备的所有RF前端或收发器元件，包括功率放大器（PA），匹配，耦合和滤波网络以及天线开关将调节的PA信号耦合到天线。输出信号传感器至少感测由天线开关切换的信号的电压幅度，并且响应于感测输出的过大值，向PA控制电路发信号以限制PA输出功率。优选的制造技术包括堆叠多个FET以形成开关器件。描述了一种消耗性地终止PA输出信号的不需要的谐波的iClass PA架构。 RF收发器IC的优选实施例包括两个不同的PA电路，两个不同的接收信号放大器电路和四路天线开关，以将单个天线连接可选择地耦合到四个电路中的任一个。

33. 发明公开

US20240146272A1 Optimized Multi Gain LNA Enabling Low Current and High Linearity Including Highly Linear Active Bypass 审中-公开
公开(公告)号：US20240146272A1
公开(公告)日：2024-05-02
申请号：US18406064
申请日：2024-01-05
申请人： pSemi Corporation
发明人： Emre Ayranci , Miles Sanner
IPC分类号： H03G3/30 , H03F1/22 , H03F1/32 , H03F3/193 , H03F3/21 , H03F3/72 , H03G1/00 , H03G3/00
CPC分类号： H03G3/3036 , H03F1/223 , H03F1/3205 , H03F3/193 , H03F3/211 , H03F3/72 , H03G1/0023 , H03G1/0029 , H03G1/0088 , H03G3/001 , H03F2200/156 , H03F2200/159 , H03F2200/294 , H03F2200/451 , H03F2200/489 , H03F2200/492 , H03F2200/61 , H03F2203/7239 , H03G3/3052 , H03G2201/504
摘要： An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.

34. 发明授权

US11870405B2 Optimized multi gain LNA enabling low current and high linearity including highly linear active bypass 有权
公开(公告)号：US11870405B2
公开(公告)日：2024-01-09
申请号：US17503710
申请日：2021-10-18
申请人： pSemi Corporation
发明人： Emre Ayranci , Miles Sanner
IPC分类号： H03F1/32 , H03F3/193 , H03F1/22 , H03F3/21 , H03G3/30 , H03F3/72 , H03G1/00 , H03G3/00
CPC分类号： H03G3/3036 , H03F1/223 , H03F1/3205 , H03F3/193 , H03F3/211 , H03F3/72 , H03G1/0023 , H03G1/0029 , H03G1/0088 , H03G3/001 , H03F2200/156 , H03F2200/159 , H03F2200/294 , H03F2200/451 , H03F2200/489 , H03F2200/492 , H03F2200/61 , H03F2203/7239 , H03G3/3052 , H03G2201/504
摘要： An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.

35. 发明公开

US20230283237A1 Body Tie Optimization for Stacked Transistor Amplifier 审中-公开
公开(公告)号：US20230283237A1
公开(公告)日：2023-09-07
申请号：US18182047
申请日：2023-03-10
申请人： pSemi Corporation
发明人： Simon Edward Willard , Chris Olson , Tero Tapio Ranta
IPC分类号： H03F1/02 , H01L21/84 , H01L27/12 , H01L29/08 , H01L29/10 , H01L27/06 , H03F3/193 , H03F1/22 , H03F1/52 , H03F3/195 , H03F3/21
CPC分类号： H03F1/0205 , H01L28/40 , H01L21/84 , H01L27/1203 , H01L29/0847 , H01L29/1095 , H01L27/0688 , H03F3/193 , H03F1/223 , H03F1/523 , H03F3/195 , H03F3/21 , H03F2200/48 , H03F2200/297 , H03F2200/61 , H03F2200/451 , H03F2200/108 , H03F2200/42 , H03F2200/75
摘要： A transistor stack can include a combination of floating and body tied devices. Improved performance of the RF amplifier can be obtained by using a single body tied device as the input transistor of the stack, or as the output transistor of the stack, while other transistors of the stack are floating transistors. Transient response of the RF amplifier can be improved by using all body tied devices in the stack.

36. 发明授权

US11664769B2 Cascode amplifier bias circuits 有权
公开(公告)号：US11664769B2
公开(公告)日：2023-05-30
申请号：US17843372
申请日：2022-06-17
申请人： pSemi Corporation
发明人： Jonathan James Klaren , David Kovac , Eric S. Shapiro , Christopher C. Murphy , Robert Mark Englekirk , Keith Bargroff , Tero Tapio Ranta
IPC分类号： H03F1/22 , H03F3/195 , H03F3/213 , H03F3/24 , H03F1/30 , H03F1/56 , H03F3/193
CPC分类号： H03F1/223 , H03F1/301 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/213 , H03F3/245 , H03F2200/102 , H03F2200/105 , H03F2200/165 , H03F2200/18 , H03F2200/21 , H03F2200/222 , H03F2200/225 , H03F2200/243 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/42 , H03F2200/451 , H03F2200/48 , H03F2200/489 , H03F2200/492 , H03F2200/498 , H03F2200/555 , H03F2200/61 , H03F2200/78
摘要： Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

37. 发明申请

US20180254745A1 Stacked Power Amplifier Power Control 审中-公开
公开(公告)号：US20180254745A1
公开(公告)日：2018-09-06
申请号：US15879273
申请日：2018-01-24
申请人： pSemi Corporation
发明人： David Kovac
IPC分类号： H03F1/02 , H03F3/195 , H03F3/213 , H03F1/22 , G05F1/56
CPC分类号： H03F1/0222 , G05F1/56 , H03F1/0261 , H03F1/223 , H03F1/301 , H03F3/195 , H03F3/213 , H03F3/245 , H03F2200/102 , H03F2200/18 , H03F2200/264 , H03F2200/267 , H03F2200/375 , H03F2200/451 , H03F2200/61
摘要： Systems, methods and apparatus for efficient power control and/or compensation with respect to a varying supply voltage of an RF amplifier for amplification of a constant envelope RF signal are described. A reduction in a size of a pass device of an LDO regulator is obtained by removing the pass device of the LDO regulator from a main current conduction path of the RF amplifier. Power control and/or compensation is provided by varying one or more gate voltages to cascoded transistors of a transistor stack of the RF amplifier according to a power control voltage. Various configurations for controlling the gate voltages are presented by way of a smaller size LDO regulator or by completely removing the LDO regulator. In a case where a supply voltage to the transistor stack varies, such as in a case of a battery, a compensation circuit is used to adjust the power control voltage in view of a variation of the supply voltage, and therefore null a corresponding drift/variation in output power of the RF amplifier.

38. 发明授权

US09473081B2 Circuits and methods for reducing supply sensitivity in a power amplifier 有权
标题翻译：降低功率放大器电源灵敏度的电路和方法
公开(公告)号：US09473081B2
公开(公告)日：2016-10-18
申请号：US14518967
申请日：2014-10-20
申请人： QUALCOMM Incorporated
发明人： Antonino Scuderi , Aristotele Hadjichristos
IPC分类号： H03F3/68 , H03F3/19 , H03F1/56 , H03F3/21 , H03F1/22 , H03F3/193 , H03F3/24 , H03F3/72 , H03G1/00 , H03G3/00
CPC分类号： H03F3/19 , H03F1/223 , H03F1/56 , H03F3/193 , H03F3/211 , H03F3/245 , H03F3/72 , H03F2200/18 , H03F2200/222 , H03F2200/231 , H03F2200/234 , H03F2200/249 , H03F2200/252 , H03F2200/321 , H03F2200/366 , H03F2200/387 , H03F2200/411 , H03F2200/42 , H03F2200/432 , H03F2200/451 , H03F2200/522 , H03F2200/555 , H03F2200/61 , H03F2200/75 , H03F2203/21106 , H03F2203/21136 , H03F2203/21139 , H03F2203/21142 , H03F2203/21178 , H03F2203/7215 , H03F2203/7236 , H03G1/0029 , H03G1/0088 , H03G3/001 , H03G3/007 , H03G3/3042
摘要： In one embodiment, the present disclosure includes a circuit comprising a first power amplifier stage having an input to receive an input signal, an output coupled to an output node, the first power amplifier stage receiving a time-varying power supply voltage. The circuit further includes a second power amplifier stage configured in parallel with the first power amplifier stage having an input to receive the input signal, an output coupled to the output node, the second power amplifier stage receiving the time-varying power supply voltage. A first gain of the first power amplifier stage decreases when the power supply voltage is in a first low voltage range, and a second gain of the second power amplifier stage compensates for the decreasing gain of the first power amplifier stage in the first low voltage range.
摘要翻译：在一个实施例中，本公开包括电路，该电路包括具有用于接收输入信号的输入的第一功率放大器级，耦合到输出节点的输出，第一功率放大器级接收时变电源电压。电路还包括与第一功率放大器并联配置的第二功率放大器级，其具有用于接收输入信号的输入，耦合到输出节点的输出，第二功率放大器级接收时变电源电压。当电源电压处于第一低电压范围时，第一功率放大器级的第一增益减小，并且第二功率放大器级的第二增益补偿第一低功率放大器级在第一低电压范围内的增益减小。

39. 发明授权

US09425752B2 Distributed amplifier with improved stabilization 有权
标题翻译：分布式放大器具有改进的稳定性
公开(公告)号：US09425752B2
公开(公告)日：2016-08-23
申请号：US14327944
申请日：2014-07-10
申请人： Hittite Microwave Corporation
发明人： Keith Benson
IPC分类号： H03F3/193 , H03F1/08 , H03F1/22 , H03F3/60
CPC分类号： H03F1/18 , H03F1/086 , H03F1/223 , H03F1/42 , H03F3/19 , H03F3/193 , H03F3/607 , H03F2200/108 , H03F2200/144 , H03F2200/153 , H03F2200/267 , H03F2200/423 , H03F2200/61
摘要： A distributed amplifier with improved stabilization includes an input transmission circuit, an output transmission circuit, at least one cascade amplifier coupled between said input and output transmission circuits. Each cascade amplifier includes a common-gate configured transistor coupled to the output transmission circuit, and a common-source configured transistor coupled between the input transmission circuit and the common-gate configured transistor. The distributed amplifier also includes a non-parasitic resistance and capacitance coupled in series between a drain and a gate of at least one of the common-gate configured transistors for increasing the amplifier stability.
摘要翻译：具有改进的稳定性的分布式放大器包括输入传输电路，输出传输电路，耦合在所述输入和输出传输电路之间的至少一个级联放大器。每个级联放大器包括耦合到输出传输电路的共栅配置的晶体管，以及耦合在输入传输电路和共栅配置晶体管之间的公共源配置的晶体管。分布式放大器还包括串联耦合在至少一个共栅配置晶体管的漏极和栅极之间的非寄生电阻和电容，用于增加放大器的稳定性。

40. 发明申请

US20160079923A1 Power Amplifier 有权
标题翻译：功率放大器
公开(公告)号：US20160079923A1
公开(公告)日：2016-03-17
申请号：US14486672
申请日：2014-09-15
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Jun-De Jin
IPC分类号： H03F1/02 , H03F3/45 , H03F3/19 , H03F3/21
CPC分类号： H03F1/0205 , H03F1/223 , H03F1/523 , H03F3/19 , H03F3/193 , H03F3/21 , H03F3/245 , H03F3/45188 , H03F3/45269 , H03F2200/451 , H03F2200/61 , H03F2203/45156 , H03F2203/45311 , H03F2203/45481 , H03F2203/45621 , H03F2203/45731
摘要： A power amplifier includes an input circuit configured to receive an input signal. At least two transistors connected in series. A first transistor of the at least two transistors is located at a first end of the at least two transistors. A second transistor of the at least two transistors is located at a second end of the at least two transistors. The first transistor is coupled to a low voltage power supply node. The first gate of the first transistor is coupled to a first bias voltage. The input signal is coupled to a first gate of the first transistor. At least one capacitor is coupled between a second gate of the second transistor and the low voltage power supply node. An output circuit coupled to a second gate of the second transistor.
摘要翻译：功率放大器包括被配置为接收输入信号的输入电路。至少两个晶体管串联连接。所述至少两个晶体管的第一晶体管位于所述至少两个晶体管的第一端。所述至少两个晶体管的第二晶体管位于所述至少两个晶体管的第二端。第一晶体管耦合到低电压电源节点。第一晶体管的第一栅极耦合到第一偏置电压。输入信号耦合到第一晶体管的第一栅极。至少一个电容器耦合在第二晶体管的第二栅极和低压电源节点之间。输出电路，耦合到第二晶体管的第二栅极。

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