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    • 1. 发明授权
    • Current controlling device and signal converting apparatus applying the current controlling device
    • 电流控制装置和应用电流控制装置的信号转换装置
    • US09503038B2
    • 2016-11-22
    • US14541113
    • 2014-11-13
    • MEDIATEK INC.
    • Min-Hua WuChih-Hong LouYen-Chuan HuangChi-Yun Wang
    • H03F1/02H03F3/45H03G1/00H03M1/74
    • H03F3/45076H03F2200/222H03F2200/234H03F2203/45151H03F2203/45576H03G1/0088H03M1/742
    • A current controlling device includes: a first resistive circuit arranged to selectively conduct a first current to a first output terminal from a first input terminal; and a second resistive circuit arranged to selectively conduct a second current to a second output terminal from the first input terminal; wherein when the first resistive circuit conducts the first current to the first output terminal and when the second resistive circuit does not conduct the second current to the second output terminal, the first input terminal has a first input impedance; when the first resistive circuit does not conduct the first current to the first output terminal and when the second resistive circuit conducts the second current to the second output terminal, the first input terminal has a second input impedance substantially equal to the first input impedance.
    • 电流控制装置包括:第一电阻电路,布置成选择性地将第一电流从第一输入端子传导到第一输出端子; 以及第二电阻电路,布置成从第一输入端子选择性地将第二电流传导到第二输出端子; 其中当所述第一电阻电路将所述第一电流传导到所述第一输出端时,并且当所述第二电阻电路不将所述第二电流传导到所述第二输出端时,所述第一输入端具有第一输入阻抗; 当第一电阻电路不向第一输出端子传导第一电流,并且当第二电阻电路将第二电流传导到第二输出端时,第一输入端具有基本上等于第一输入阻抗的第二输入阻抗。
    • 2. 发明授权
    • Family of slew-enhanced operational transconductance amplifiers
    • 一系列转换增强型运算跨导放大器
    • US09356562B2
    • 2016-05-31
    • US14168647
    • 2014-01-30
    • Apple Inc.
    • A Motamed
    • H03F3/45H03F1/22
    • H03F1/223H03F3/45188H03F3/45192H03F2200/234H03F2200/411H03F2203/45002H03F2203/45024H03F2203/45248H03F2203/45536H03F2203/45544H03F2203/45618H03F2203/45674H03F2203/45676H03F2203/45702
    • Operational transconductance amplifiers (OTAs) with enhanced slew rate are disclosed. An OTA can have a main amplifier and pre-amplifier gain stage to increase the effective transconductance and bandwidth of the OTA. The pre-amplifier and main amplifier can be coupled to enhance slew current without adding additional bias current to the main amplifier input stages. Pre-amplifier bias current can be recycled and redirected to the load. OTAs with enhanced slew rate can be particularly useful in applications requiring high-frequency switching of voltage levels to drive high capacitance lines. For example, an integrated touch sensor panel and display can be operated by alternatively applying a first voltage level to an electrode in a display mode and a second voltage level during a touch sensing mode using OTA sense or charge amplifiers with enhanced slew rate. Enhanced slew rate can increase the time available to demodulate a touch signal for improved system performance.
    • 公开了具有增强的转换速率的运算跨导放大器(OTA)。 OTA可以具有主放大器和前置放大器增益级,以增加OTA的有效跨导和带宽。 前置放大器和主放大器可以耦合以增强转换电流,而不会向主放大器输入级增加额外的偏置电流。 前置放大器偏置电流可以回收并重定向到负载。 具有增强的转换速率的OTAs可以在需要高频切换电压电平以驱动高电容线的应用中特别有用。 例如,可以通过在使用具有增强的转换速率的OTA感测或电荷放大器的触摸感测模式期间以显示模式和第二电压电平交替施加第一电压电平来操作集成的触摸传感器面板和显示器。 增强的转换速率可以增加解调触摸信号的时间,以提高系统性能。
    • 3. 发明授权
    • Amplifier input stage and amplifier
    • 放大器输入级和放大器
    • US09312825B2
    • 2016-04-12
    • US14274258
    • 2014-05-09
    • Analog Devices Global
    • Roberto S. Maurino
    • H03F3/45H03F1/26
    • H03F3/45076H03F1/26H03F3/211H03F3/393H03F3/45183H03F3/45475H03F2200/234H03F2200/411H03F2200/555H03F2203/45116H03F2203/45212H03F2203/45366H03F2203/45471H03F2203/45562H03F2203/45644H03F2203/45674
    • An amplifier input stage comprising first and second p-type transistors, wherein sources of the first and second p-type transistors are connected to a first node, a drain of the first p-type transistor is connected to a first output of the amplifier input stage, a drain of the second p-type transistor is connected to a second output of the amplifier input stage, a gate of the first p-type transistor is configured to receive a first signal of an input stage differential input signal and a gate of the second p-type transistor is configured to receive a second signal of the input stage differential input signal; first and second n-type transistors, wherein sources of the first and second n-type transistors are connected to a second node, a drain of the first n-type transistor is connected to a third output of the amplifier input stage, a drain of the second n-type transistor is connected to a fourth output of the amplifier input stage, a gate of the first n-type transistor is configured to receive the first signal of the input stage differential input signal and a gate of the second n-type transistor is configured to receive the second signal of the input stage differential input signal; a first circuit arranged to provide a first portion of a first bias current to the first node; and a second circuit arranged to draw a second portion of the first bias current from the second node; wherein the first and second portions are determined by a first signal of an amplifier input signal.
    • 放大器输入级包括第一和第二p型晶体管,其中第一和第二p型晶体管的源极连接到第一节点,第一p型晶体管的漏极连接到放大器输入端的第一输出端 第二p型晶体管的漏极连接到放大器输入级的第二输出,第一p型晶体管的栅极被配置为接收输入级差分输入信号的第一信号和第 第二p型晶体管被配置为接收输入级差分输入信号的第二信号; 第一和第二n型晶体管,其中第一和第二n型晶体管的源极连接到第二节点,第一n型晶体管的漏极连接到放大器输入级的第三输出端,漏极 第二n型晶体管连接到放大器输入级的第四输出端,第一n型晶体管的栅极被配置为接收输入级差分输入信号的第一信号和第二n型晶体管的栅极 晶体管被配置为接收输入级差分输入信号的第二信号; 第一电路,被布置成向第一节点提供第一偏置电流的第一部分; 以及第二电路,布置成从所述第二节点绘制所述第一偏置电流的第二部分; 其中第一和第二部分由放大器输入信号的第一信号确定。