专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明申请

US20060039721A1 Conductive roller and imaging apparatus 审中-公开
标题翻译：导电辊和成像装置
公开(公告)号：US20060039721A1
公开(公告)日：2006-02-23
申请号：US10510755
申请日：2003-04-11
申请人： Yasuro Shiomura , Yuichiro Mori , Koji Yamakawa
发明人： Yasuro Shiomura , Yuichiro Mori , Koji Yamakawa
IPC分类号： G03G15/08
CPC分类号： G03G15/0808
摘要： In a conductive roller having a rotation shaft and a conductive elastic layer arranged around the rotation shaft, a resin coating layer including a particle having JIS A hardness of 10-99 and an average particle size of 2-30 μm. An image forming apparatus utilizes the conductive roller mentioned above. Herewith, the image forming apparatus, which has excellent toner carrying property and toner charge property, provides a high quality image with no image unevenness and no image overlapping, and has an excellent durability, and the image forming apparatus installing the above conductive roller are provided.
摘要翻译：在具有旋转轴和布置在旋转轴周围的导电弹性层的导电辊中，具有JIS A硬度为10-99，平均粒径为2-30μm的颗粒的树脂涂层。图像形成装置利用上述导电性辊。因此，具有优异的调色剂携带性和调色剂带电性的图像形成装置提供了无图像不均匀，无图像重叠的高质量图像，并且具有优异的耐久性，并且设置安装上述导电辊的图像形成装置。

32. 发明申请

US20060017086A1 Semiconductor device and method for manufacturing the same 审中-公开
公开(公告)号：US20060017086A1
公开(公告)日：2006-01-26
申请号：US11223958
申请日：2005-09-13
申请人： Hiroyuki Kanaya , Iwao Kunishima , Koji Yamakawa , Tsuyoshi Iwamoto , Hiroshi Mochizuki , Yoshinori Kumura
发明人： Hiroyuki Kanaya , Iwao Kunishima , Koji Yamakawa , Tsuyoshi Iwamoto , Hiroshi Mochizuki , Yoshinori Kumura
IPC分类号： H01L29/94
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/56 , H01L28/57 , H01L28/65
摘要： There is provided a semiconductor device having a ferroelectric capacitor formed on a semiconductor substrate covered with an insulator film, wherein the ferroelectric capacitor comprises: a bottom electrode formed on the insulator film; a ferroelectric film formed on the bottom electrode; and a top electrode formed on the ferroelectric film. The ferroelectric film has a stacked structure of either of two-layer-ferroelectric film or three-layer-ferroelectric film. The upper ferroelectric film is metallized and prevents hydrogen from diffusing in lower ferroelectric layer. Crystal grains of the stacked ferroelectric films are preferably different.

33. 发明申请

US20050274999A1 Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050274999A1
公开(公告)日：2005-12-15
申请号：US10882203
申请日：2004-07-02
申请人： Hiroshi Itokawa , Koji Yamakawa , Rainer Bruchhaus
发明人： Hiroshi Itokawa , Koji Yamakawa , Rainer Bruchhaus
IPC分类号： H01L27/105 , H01L21/02 , H01L21/8242 , H01L21/8246 , H01L27/108 , H01L27/115 , H01L31/062
CPC分类号： H01L28/65 , H01L27/10808 , H01L27/10852 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75
摘要： A semiconductor device according to the present invention comprises a semiconductor substrate, a capacitor including a lower electrode disposed above the semiconductor substrate, a dielectric film disposed above the lower electrode, and an upper electrode disposed above the dielectric film, the upper electrode including metal oxide formed of ABO3 perovskite oxide and containing at least an Ru element as a B site element, and a metal film containing a Ti element being disposed between the dielectric film and the upper electrode.
摘要翻译：根据本发明的半导体器件包括半导体衬底，包括设置在半导体衬底上的下电极的电容器，设置在下电极上方的电介质膜和设置在电介质膜上方的上电极，上电极包括金属氧化物由ABO 3钙钛矿氧化物形成，并且至少含有Ru元素作为B位元素，以及含有Ti元素的金属膜设置在电介质膜和上电极之间。

34. 发明申请

US20050245023A1 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050245023A1
公开(公告)日：2005-11-03
申请号：US11177281
申请日：2005-07-11
申请人： Osamu Arisumi , Keitaro Imai , Koji Yamakawa , Bum-ki Moon
发明人： Osamu Arisumi , Keitaro Imai , Koji Yamakawa , Bum-ki Moon
IPC分类号： H01L21/02 , H01L21/8234
CPC分类号： H01L28/56 , H01L28/55
摘要： A semiconductor device comprises a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode and made of a perovskite type ferroelectrics containing Pb, Zr, Ti and O, the dielectric film comprising a first portion formed of a plurality of crystal grains partitioned by grain boundaries having a plurality of directions.
摘要翻译：半导体器件包括底电极，顶电极和设置在底电极和顶电极之间并由包含Pb，Zr，Ti和O的钙钛矿型铁电体制成的电介质膜，该电介质膜包括由第一部分形成的第一部分由具有多个方向的晶界划分的多个晶粒。

35. 发明申请

US20050070043A1 Semiconductor device and method for manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050070043A1
公开(公告)日：2005-03-31
申请号：US10673247
申请日：2003-09-30
申请人： Koji Yamakawa , Katsuaki Natori , Soichi Yamazaki , Osamu Arisumi , Hiroshi Itokawa , Hiroyuki Kanaya , Kazuhiro Tomioka , Keisuke Nakazawa , Yasuyuki Taniguchi , Uli Egger
发明人： Koji Yamakawa , Katsuaki Natori , Soichi Yamazaki , Osamu Arisumi , Hiroshi Itokawa , Hiroyuki Kanaya , Kazuhiro Tomioka , Keisuke Nakazawa , Yasuyuki Taniguchi , Uli Egger
IPC分类号： B23Q3/157 , H01L21/00 , H01L21/02 , H01L21/033 , H01L21/311
CPC分类号： H01L28/55 , H01L21/0332 , H01L21/31122 , H01L21/31144 , H01L28/65
摘要： The present invention provides a method for manufacturing a semiconductor device equipped with a capacitor in which a dielectric film is used, wherein a complex oxide is used as a mask material when the dielectric film is etched.
摘要翻译：本发明提供了一种制造半导体器件的方法，所述半导体器件配备有使用电介质膜的电容器，其中当蚀刻所述电介质膜时，使用复合氧化物作为掩模材料。

36. 发明申请

US20050001251A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050001251A1
公开(公告)日：2005-01-06
申请号：US10834928
申请日：2004-04-30
申请人： Hiroshi Itokawa , Koji Yamakawa , Katsuaki Natori
发明人： Hiroshi Itokawa , Koji Yamakawa , Katsuaki Natori
IPC分类号： H01L21/316 , H01L21/02 , H01L21/8246 , H01L27/105 , H01L27/108 , H01L27/115
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/65
摘要： A semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate, and including a bottom electrode, a top electrode and a dielectric film between the bottom and top electrodes, the bottom electrode including a conductive film selected from a noble metal film and a noble metal oxide film, a metal oxide film having a perovskite structure, provided between the dielectric film and the conductive film, expressed by ABO3, and containing first metal element as B-site element, and a metal film provided between the conductive film and the metal oxide film, and containing second metal element which is B-site element of a metal oxide having a perovskite structure, a decrease of Gibbs free energy when the second metal element forms oxide being larger than that when the first metal element forms oxide, a thickness of the metal oxide film being 5 nm or less.
摘要翻译：一种半导体器件，包括半导体衬底和设置在半导体衬底之上的电容器，并且在底电极和顶电极之间包括底电极，顶电极和电介质膜，底电极包括选自贵金属膜和由ABO3表示的电介质膜和导电膜之间具有钙钛矿结构的金属氧化物膜，并且含有作为B位元素的第一金属元素的金属氧化物膜和设置在导电膜之间的金属膜和金属氧化物膜，并且含有作为具有钙钛矿结构的金属氧化物的B位元素的第二金属元素，当第二金属元素形成氧化物时，吉布斯自由能的降低大于第一金属元素形成氧化物时的吉布斯自由能的降低，金属氧化物膜的厚度为5nm以下。

37. 发明授权

US06586790B2 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06586790B2
公开(公告)日：2003-07-01
申请号：US09359324
申请日：1999-07-23
申请人： Hiroyuki Kanaya , Iwao Kunishima , Koji Yamakawa , Tsuyoshi Iwamoto , Hiroshi Mochizuki
发明人： Hiroyuki Kanaya , Iwao Kunishima , Koji Yamakawa , Tsuyoshi Iwamoto , Hiroshi Mochizuki
IPC分类号： H01L2976
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/56 , H01L28/57 , H01L28/65
摘要： There is provided a semiconductor device having a ferroelectric capacitor formed on a semiconductor substrate covered with an insulator film, wherein the ferroelectric capacitor comprises: a bottom electrode formed on the insulator film; a ferroelectric film formed on the bottom electrode; and a top electrode formed on the ferroelectric film. The ferroelectric film has a stacked structure of either of two-layer-ferroelectric film or three-layer-ferroelectric film. The upper ferroelectric film is metallized and prevents hydrogen from diffusing in lower ferroelectric layer. Crystal grains of the stacked ferroelectric films are preferably different.
摘要翻译：提供一种半导体器件，其具有形成在被绝缘体膜覆盖的半导体衬底上的铁电电容器，其中所述强电介质电容器包括：形成在所述绝缘膜上的底部电极; 形成在底部电极上的铁电体膜; 以及形成在强电介质膜上的顶部电极。铁电体膜具有两层铁电体膜或三层铁电体膜的层叠结构。上部铁电膜被金属化，并防止氢在下部铁电层中扩散。堆叠的铁电体膜的晶粒优选不同。

38. 发明授权

US5969413A Semiconductor device having a tab chip on a tape carrier with lead wirings provided on the tape carrier used as external leads 失效
标题翻译：半导体器件具有在载带上具有引线布线的片状芯片，该导线布置在用作外部引线的载带上
公开(公告)号：US5969413A
公开(公告)日：1999-10-19
申请号：US855931
申请日：1997-05-14
申请人： Keiichi Yano , Kazuo Kimura , Hironori Asai , Jun Monma , Koji Yamakawa , Mitsuyoshi Endo , Hirohisa Osoguchi
发明人： Keiichi Yano , Kazuo Kimura , Hironori Asai , Jun Monma , Koji Yamakawa , Mitsuyoshi Endo , Hirohisa Osoguchi
IPC分类号： H01L23/10 , H01L23/15 , H01L23/28 , H01L23/495 , H01L23/02 , H01L23/12 , H01L23/48
CPC分类号： H01L23/10 , H01L23/15 , H01L23/49572 , H01L24/50 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/07802 , H01L2924/30107
摘要： A semiconductor chip is supported on a tape carrier provided with lead wirings. The semiconductor chip is electrically connected to the lead wirings. The semiconductor chip of this quality is bonded in combination with the pe carrier to an aluminum nitride substrate. The lead wirings provided on the carrier combine the two functions as an internal lead and an external lead. The semiconductor package of such a structure as is described above allows multi-terminal connection by the narrowing of pitches between the leads and permits provision of a miniature package excelling in the heat-radiating property. Alternatively, the lead wirings supported on the tape carrier and electrically connected to the semiconductor chip are utilized as internal leads. For the external leads, such lead frames as are bonded to the aluminum nitride substrate are used. The lead frames are electrically connected to the internal leads provided in the tape carrier.
摘要翻译：半导体芯片被支撑在带有引线配线的带载体上。半导体芯片电连接到引线配线。该质量的半导体芯片与pe载体结合到氮化铝衬底上。载体上提供的导线结合了作为内部引线和外部引线的两个功能。如上所述的这种结构的半导体封装允许通过引线之间的间距变窄来实现多端子连接，并且允许提供具有优异的散热性能的微型封装。或者，支撑在带载体上并电连接到半导体芯片的引线配线被用作内部引线。对于外部引线，使用与氮化铝基板结合的引线框架。引线框架电连接到设置在带式载体中的内部引线。

39. 发明授权

US5821627A Electronic circuit device 失效
标题翻译：电子电路装置
公开(公告)号：US5821627A
公开(公告)日：1998-10-13
申请号：US962882
申请日：1997-11-05
申请人： Miki Mori , Yukio Kizaki , Takaaki Yasumoto , Koji Yamakawa , Masayuki Saito , Tatsuro Uchida , Takasi Togasaki , Takashi Yebisuya , Taijun Murakami
发明人： Miki Mori , Yukio Kizaki , Takaaki Yasumoto , Koji Yamakawa , Masayuki Saito , Tatsuro Uchida , Takasi Togasaki , Takashi Yebisuya , Taijun Murakami
IPC分类号： H05K3/32 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H05K3/328 , H01L2224/1134 , H01L2224/13109 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/16227 , H01L2224/45124 , H01L2224/45144 , H01L2224/48227 , H01L2924/01004 , H01L2924/01019 , H01L2924/01025 , H01L2924/01039 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/01327 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/16152 , H01L2924/19041 , H05K2201/10636 , H05K2201/10734 , Y02P70/611
摘要： An electronic circuit device includes a substrate, a wiring layer formed on the surface of the substrate and essentially consisting of at least one metal selected from the group consisting of gold, copper, tin, and aluminum, a bump formed on the wiring layer and essentially consisting of at least one metal selected from the group consisting of gold, copper, and aluminum, and a micro electronic element formed on the bump, wherein solid-phase diffusion bonding is performed at least either between the wiring layer and the bump or between the bump and an electrode of the micro electronic element.
摘要翻译：电子电路装置包括：基板，形成在基板的表面上的基本上由布线层形成的凸块和基本上由金，铜，锡和铝组成的组中的至少一种金属组成的布线层; 由选自金，铜和铝的至少一种金属和形成在凸块上的微电子元件组成，其中固定相扩散接合至少在布线层和凸块之间或者在凸块和微电子元件的电极。

40. 发明授权

US5400275A Semiconductor memory device using ferroelectric capacitor and having only one sense amplifier selected 失效
标题翻译：使用铁电电容器并且仅选择一个读出放大器的半导体存储器件
公开(公告)号：US5400275A
公开(公告)日：1995-03-21
申请号：US712092
申请日：1991-06-07
申请人： Kazuhide Abe , Hiroshi Toyoda , Koji Yamakawa , Motomasa Imai , Koji Sakui
发明人： Kazuhide Abe , Hiroshi Toyoda , Koji Yamakawa , Motomasa Imai , Koji Sakui
IPC分类号： G11C11/22 , H01L27/115 , G11C7/00
CPC分类号： H01L27/11502 , G11C11/22
摘要： A semiconductor memory device comprises a plurality of memory cells arranged in the form of a matrix to constitute rows-and columns, a plurality of first driving lines, connected to the memory cells, for transmitting a first driving signal to the memory cells, one of the plurality of first driving lines being selected by a row address, a plurality of second driving lines, connected to the memory cells, for transmitting a second driving signal to the memory cells, one of the plurality of second driving lines being selected by a column address, a plurality of read/write lines, connected to the memory cells, for performing read/write operations with respect to the memory cells, and a plurality of sense amplifiers connected to the read/ write lines, wherein one of the plurality of sense amplifiers is selected by the column address, and the memory cells in the same column are connected to the same sense amplifier through the read/write lines.
摘要翻译：一种半导体存储器件包括以矩阵形式布置以构成行和列的多个存储器单元，连接到存储器单元的多条第一驱动线，用于将第一驱动信号发送到存储器单元，其中之一所述多个第一驱动线由行地址选择，多个第二驱动线连接到所述存储单元，用于将第二驱动信号发送到所述存储单元，所述多个第二驱动线中的一个由列选择连接到存储器单元的多个读/写线，用于对存储单元执行读/写操作，以及连接到读/写线的多个读出放大器，其中多个感测中的一个放大器由列地址选择，同一列中的存储单元通过读/写线连接到相同的读出放大器。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式