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31. 发明申请

US20090091983A1 NON-VOLATILE MEMORY STRUCTURE AND ARRAY THEREOF 有权
标题翻译：非易失性存储器结构及其阵列
公开(公告)号：US20090091983A1
公开(公告)日：2009-04-09
申请号：US11866756
申请日：2007-10-03
申请人： Shaw-Hung Ku , Shih-Chin Lee , Chia-Wei Wu , Shang-Wei Lin , Tzung-Ting Han , Ming-Shang Chen , Wen-Pin Lu
发明人： Shaw-Hung Ku , Shih-Chin Lee , Chia-Wei Wu , Shang-Wei Lin , Tzung-Ting Han , Ming-Shang Chen , Wen-Pin Lu
IPC分类号： G11C11/34
CPC分类号： H01L27/115 , H01L27/11521
摘要： A non-volatile memory structure including a substrate, stacked patterns and stress patterns is provided. The stacked patterns are disposed on the substrate. Each of the stacked patterns includes a charge storage structure and a gate from bottom to top. Here, the charge storage structure at least includes a charge storage layer. The stress patterns are disposed on the substrate between the two adjacent stacked patterns, respectively.
摘要翻译：提供了包括基板，堆叠图案和应力图案的非易失性存储器结构。层叠图案设置在基板上。每个堆叠图案包括电荷存储结构和从底部到顶部的栅极。这里，电荷存储结构至少包括电荷存储层。应力图案分别设置在两个相邻堆叠图案之间的基板上。

32. 发明授权

US07100583B2 Filter screen and the apparatus for aiding vehicle fuel combustion and purifying exhausting gas using said filter screen 有权
标题翻译：过滤网和使用所述过滤网帮助车辆燃料燃烧和净化排气的装置
公开(公告)号：US07100583B2
公开(公告)日：2006-09-05
申请号：US10806442
申请日：2004-03-23
申请人： Wen-Pin Lu
发明人： Wen-Pin Lu
IPC分类号： F02M33/00
CPC分类号： F02M35/024 , B03C3/09 , B03C2201/30 , F01N3/01 , F01N3/0892 , F02M27/04
摘要： Disclosed is a filter screen and the apparatus for aiding vehicle fuel combustion and purifying exhaust gas using said filter screen which has a metallic screen body treated in a treatment tank containing a discharge electrode plate and a receiving electrode plate both formed of mineral plate so as to have a memorized wave of wave length ranging 5 μm˜20 μm. When placed in various environments, the filter screen is able to negatively ionize the ions in the air passing therethrough by releasing an energy wave motion so as to recover the air into its original pure state thereby improving the quality of the air and enhance the human health.
摘要翻译：公开了一种过滤网和使用所述过滤网来辅助车辆燃料燃烧和净化废气的装置，所述过滤网具有在包含由矿物板形成的放电电极板和接收电极板的处理槽中处理的金属屏蔽体，以便有5米〜20米的波长记忆波。当放置在各种环境中时，滤网能够通过释放能量波运动而使经过的空气中的离子负电离，从而将空气回收到其原始的纯净状态，从而改善空气的质量并增强人体健康。

33. 发明申请

US20050208720A1 Method of manufacturing a nonvolatile memory cell with triple spacers and the structure thereof 有权
标题翻译：制造具有三重间隔物的非易失性存储单元的方法及其结构
公开(公告)号：US20050208720A1
公开(公告)日：2005-09-22
申请号：US11128402
申请日：2005-05-13
申请人： U-Way Tseng , Hung-Yu Chiu , Wen-Pin Lu , Pau-Ling Hwang
发明人： U-Way Tseng , Hung-Yu Chiu , Wen-Pin Lu , Pau-Ling Hwang
IPC分类号： H01L21/336 , H01L29/423 , H01L29/788
CPC分类号： H01L29/42324 , H01L29/6656 , H01L29/7881
摘要： A method of manufacturing a nonvolatile memory cell with triple spacers and the structure thereof. A gate structure is formed on a substrate. Diffusion regions are formed in the substrate on either side of the gate structure. A linear oxide layer is formed on the gate structure and the substrate. A conformal nitride layer is formed on the linear oxide layer. The nitride layer and the linear oxide layer are partially etched back to form linear oxide spacers on the sides of the gate structure and nitride spacers on the sides of the linear oxide spacers. A conformal oxide layer is formed on the linear oxide spacers, the nitride spacers, the gate structure and the substrate. The oxide layer is partially etched back to form oxide spacers on the sides of the nitride spacers.
摘要翻译：一种制造具有三重间隔物的非易失性存储单元的方法及其结构。在基板上形成栅极结构。在栅极结构的任一侧上的衬底中形成扩散区域。在栅极结构和衬底上形成线状氧化物层。在线性氧化物层上形成共形氮化物层。将氮化物层和线性氧化物层部分地回蚀刻以在栅极结构的侧面上形成线性氧化物间隔物，并且在线性氧化物间隔物的侧面上形成氮化物间隔物。在线性氧化物间隔物，氮化物间隔物，栅极结构和衬底上形成保形氧化物层。将氧化物层部分地回蚀刻以在氮化物间隔物的侧面上形成氧化物间隔物。

34. 发明授权

US06812149B1 Method of forming junction isolation to isolate active elements 有权
标题翻译：形成结隔离以隔离有源元件的方法
公开(公告)号：US06812149B1
公开(公告)日：2004-11-02
申请号：US10662381
申请日：2003-09-16
申请人： Chun Chi Wang , Chun Lien Su , Wen Pin Lu
发明人： Chun Chi Wang , Chun Lien Su , Wen Pin Lu
IPC分类号： H01L21311
CPC分类号： H01L21/761
摘要： A method of forming junction isolation to isolate active elements. A substrate having a plurality of active areas and an isolation area between active areas is provided. A first gate structure is formed on part of the substrate located in the active areas and, simultaneously, a second gate structure serving as a dummy gate structure is formed on the substrate located in the isolation area. A first doped region is formed in the substrate located at two sides of the first and the second gate structures. A bottom anti-reflection layer is formed on the substrate, the first gate structure and the second gate structure. Part of the bottom anti-reflection layer is etched to expose the second gate structure. The second gate structure is removed to expose the substrate. A second doped region serving as a junction isolation region is formed in the substrate located in the isolation area.
摘要翻译：形成结隔离以隔离有源元件的方法。提供了具有多个有源区域和有源区域之间的隔离区域的衬底。第一栅极结构形成在位于有源区域中的衬底的一部分上，并且同时，在位于隔离区域中的衬底上形成用作虚设栅极结构的第二栅极结构。在位于第一和第二栅极结构的两侧的衬底中形成第一掺杂区域。在基板，第一栅极结构和第二栅极结构上形成底部防反射层。底部抗反射层的一部分被蚀刻以暴露第二栅极结构。去除第二栅极结构以暴露衬底。在位于隔离区域的基板中形成用作结隔离区域的第二掺杂区域。

35. 发明授权

US06680256B2 Process for planarization of flash memory cell 有权
标题翻译：闪存单元平坦化处理
公开(公告)号：US06680256B2
公开(公告)日：2004-01-20
申请号：US09881438
申请日：2001-06-14
申请人： Hung-Yu Chiu , Chun-Lien Su , Wen-Pin Lu
发明人： Hung-Yu Chiu , Chun-Lien Su , Wen-Pin Lu
IPC分类号： H01L21302
CPC分类号： H01L21/28273 , H01L21/31116
摘要： A process for planarization of a flash memory cell is described. A first polysilicon pattern having a top is formed over a substrate. A high-density plasma (HDP) oxide layer is deposited on the first polysilicon pattern, wherein the HDP oxide layer has a protuberance over the first polysilicon pattern. The HDP oxide layer and the first polysilicon pattern are partially etched by a sputtering etch technology. In this etching step, the protuberance is removed, the first polysilicon pattern is lowered, and the top of the first polysilicon pattern is rounded. A second polysilicon pattern covering the first polysilicon pattern is formed, wherein the second polysilicon pattern is wider than the first polysilicon pattern.
摘要翻译：描述了闪存单元的平坦化处理。在衬底上形成具有顶部的第一多晶硅图案。在第一多晶硅图案上沉积高密度等离子体（HDP）氧化物层，其中HDP氧化物层在第一多晶硅图案上具有突起。通过溅射蚀刻技术部分地蚀刻HDP氧化物层和第一多晶硅图案。在该蚀刻步骤中，去除突起，第一多晶硅图案降低，并且第一多晶硅图案的顶部是圆形的。形成覆盖第一多晶硅图案的第二多晶硅图案，其中第二多晶硅图案比第一多晶硅图案宽。

36. 发明授权

US06413840B1 Method of gettering layer for improving chemical-mechanical polishing process in flash memory production and semiconductor structure thereof 有权
标题翻译：用于改善闪速存储器生产中的化学机械抛光工艺的消除层的方法及其半导体结构
公开(公告)号：US06413840B1
公开(公告)日：2002-07-02
申请号：US09821165
申请日：2001-03-28
申请人： Uway Tseng , Kent Kuohua Chang , Wen-Pin Lu
发明人： Uway Tseng , Kent Kuohua Chang , Wen-Pin Lu
IPC分类号： H01L21322
CPC分类号： H01L27/11526 , H01L23/26 , H01L27/105 , H01L27/11543 , H01L2924/0002 , H01L2924/00
摘要： A method of gettering layer for improving chemical mechanical polishing process in flash-memory production is provided to protect a memory element against baking and keep its reliability by blockading mobile electrons with the gettering layer. Moreover, by taking advantage of the gettering layer, reduction of the thickness of the ILD for increasing the etching margin, the deposition margin, and the remaining margin of oxides are made possible.
摘要翻译：提供了一种用于改进闪速存储器生产中的化学机械抛光工艺的吸气层的方法，以保护记忆元件免受烘烤，并通过用吸气层封闭移动电子来保持其可靠性。此外，通过利用吸杂层，可以减小用于增加蚀刻余量的ILD的厚度，沉积裕度和氧化物的剩余余量。

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