专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US07604709B2 Plasma processing apparatus 失效
标题翻译：等离子体处理装置
公开(公告)号：US07604709B2
公开(公告)日：2009-10-20
申请号：US10247555
申请日：2002-09-20
申请人： Masaru Kurihara , Naoyuki Kofuji , Naoshi Itabashi , Takashi Tsutsumi
发明人： Masaru Kurihara , Naoyuki Kofuji , Naoshi Itabashi , Takashi Tsutsumi
IPC分类号： H01L21/306 , C23C16/00
CPC分类号： H01J37/3222 , H01J37/32192
摘要： A plasma processing apparatus which stably and continuously generates a uniform plasma to process large-diameter wafers using a wide range of seed gases under wide-ranging pressure and density conditions and can be thus used for a wide range of applications, ensuring a high production efficiency. The plasma processing apparatus, which introduces electromagnetic waves through a dielectric window into a reduced pressure vessel, has at least two antenna elements which are rotationally symmetrical. One end of each antenna is grounded and power is fed from a high frequency power supply to the other end in the same or virtually same phase.
摘要翻译：一种等离子体处理装置，其在宽范围的压力和密度条件下，使用宽范围的种子气体稳定且连续地产生均匀的等离子体以处理大直径晶片，并且可以用于广泛的应用，确保高的生产效率。通过电介质窗将电磁波引入减压容器中的等离子体处理装置具有旋转对称的至少两个天线元件。每个天线的一端接地，并且电源从高频电源馈送到另一端，处于相同或相同的相位。

22. 发明申请

US20090098669A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS 审中-公开
标题翻译：半导体器件制造方法和半导体器件制造设备
公开(公告)号：US20090098669A1
公开(公告)日：2009-04-16
申请号：US12336782
申请日：2008-12-17
申请人： Naoyuki Kofuji
发明人： Naoyuki Kofuji
IPC分类号： H01L21/66
CPC分类号： H01J37/32963 , H01J37/32935 , H01L22/26 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device manufacturing method and a semiconductor device manufacturing apparatus which enable to detect an etching end-point with high accuracy are provided. In etching of a lower layer formed on a semiconductor wafer using a mask which comprises a plurality of patterns extending in a predetermined direction (line-and-space patterns) and contains at least one of a metal layer and an electrically-conductive metal compound layer, the surface of the semiconductor wafer is irradiated with inspection light, the etching is performed while monitoring the intensity of the polarized light component perpendicular to the predetermined extending direction of the line-and-space patterns and the etching is terminated at the time the intensity of the polarized light component reaches a reflected light intensity corresponding to a desired remaining thickness of the lower layer.
摘要翻译：提供一种能够高精度地检测蚀刻终点的半导体器件制造方法和半导体器件制造装置。在使用包括沿预定方向（线间距图案）延伸的多个图案的掩模来蚀刻在半导体晶片上形成的下层，并且包含金属层和导电金属化合物层中的至少一个，用检查光照射半导体晶片的表面，在监视垂直于线间距图案的预定延伸方向的偏振光分量的强度的同时进行蚀刻，并且在强度的偏振光分量达到对应于下层的期望的剩余厚度的反射光强度。

23. 发明授权

US07371692B2 Method for manufacturing a semiconductor device having a W/WN/polysilicon layered film 有权
标题翻译：具有W / WN /多晶硅层状膜的半导体器件的制造方法
公开(公告)号：US07371692B2
公开(公告)日：2008-05-13
申请号：US11099609
申请日：2005-04-06
申请人： Naoyuki Kofuji
发明人： Naoyuki Kofuji
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/02071 , H01L21/28061 , H01L21/32136 , H01L29/4941
摘要： A method for manufacturing a semiconductor device includes the steps of consecutively depositing a Poly-Si layer, a WN layer and a W layer on a SiO2 layer, forming a mask pattern on the W layer, selectively etching the W layer by using plasma in a first etching gas having a high etch selectivity ratio between W and WN, selectively etching the WN layer and the Poly-Si layer by using plasma in a second etching gas having a high etch selectivity between WN and Si, and selectively etching the Poly-Si layer 13 by using plasma in a third etching gas having a high etch selectivity between Si and silicon oxide.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在SiO 2层上连续沉积多晶硅层，WN层和W层，在W层上形成掩模图案，选择性蚀刻通过在W和WN之间具有高蚀刻选择性比的第一蚀刻气体中使用等离子体，通过在WN和Si之间具有高蚀刻选择性的第二蚀刻气体中使用等离子体来选择性地蚀刻WN层和多晶硅层并且通过在Si和氧化硅之间具有高蚀刻选择性的第三蚀刻气体中使用等离子体来选择性地蚀刻多晶硅层13。

24. 发明申请

US20070056929A1 Plasma etching apparatus and plasma etching method 失效
标题翻译：等离子体蚀刻装置和等离子体蚀刻方法
公开(公告)号：US20070056929A1
公开(公告)日：2007-03-15
申请号：US11362867
申请日：2006-02-28
申请人： Go Miya , Seiichiro Kanno , Naoshi Itabashi , Motohiko Yoshigai , Junichi Tanaka , Masahito Mori , Naoyuki Kofuji , Go Saito
发明人： Go Miya , Seiichiro Kanno , Naoshi Itabashi , Motohiko Yoshigai , Junichi Tanaka , Masahito Mori , Naoyuki Kofuji , Go Saito
IPC分类号： C23F1/00 , G01L21/30 , H01L21/306 , H01L21/302 , G01R31/00
CPC分类号： H01L21/67069 , H01J37/32449 , H01J37/32935 , H01L21/32137 , H01L21/67248 , H01L21/67253
摘要： A plasma etching apparatus includes a processing chamber in which a specimen is subjected to plasma processing, a specimen holder for holding the specimen, the specimen holder including a temperature controller for controlling temperatures at at least 2 positions of the specimen, at least two gas supply sources for supplying processing gases, at least two gas inlets for introducing the processing gases into the processing chamber, a regulator for independently controlling the compositions or the flow rates of the processing gases introduced from the at least two gas inlets and the temperatures controlled with at least two temperature controllers in the specimen holder, and an electromagnetic wave supply unit for sending an electromagnetic wave into the processing chamber, wherein the compositions or the flow rates of the processing gases introduced from the gas inlets and the temperature controlled with the temperature controllers in the specimen holder are independently controlled.
摘要翻译：一种等离子体蚀刻装置，包括：处理室，其中试样经受等离子体处理;试样保持器，用于保持试样;试样架包括用于控制试样至少2个位置的温度的温度控制器，至少两个气体供应用于提供处理气体的源，用于将处理气体引入处理室的至少两个气体入口，用于独立地控制从至少两个气体入口引入的处理气体的组成或流速的调节器和由样品架中的至少两个温度控制器和用于将电磁波发送到处理室中的电磁波供给单元，其中从气体入口引入的处理气体的组成或流速以及用温度控制器控制的温度样品架独立控制。

25. 发明授权

US06573190B1 Dry etching device and dry etching method 失效
标题翻译：干蚀刻装置和干法蚀刻法
公开(公告)号：US06573190B1
公开(公告)日：2003-06-03
申请号：US09856264
申请日：2001-05-18
申请人： Masaru Izawa , Shinichi Tachi , Kenetsu Yokogawa , Nobuyuki Negishi , Naoyuki Kofuji
发明人： Masaru Izawa , Shinichi Tachi , Kenetsu Yokogawa , Nobuyuki Negishi , Naoyuki Kofuji
IPC分类号： H01L2100
CPC分类号： H01L21/32136 , H01J37/321 , H01J37/3266 , H01L21/3065 , H01L21/31116 , H01L21/32137
摘要： A dry etching apparatus and method which can uniformly and stably generate a high-density plasma over a wide range, and can cope with increase of wafer diameter and making the pattern finer in etch processing of the fine pattern of a semiconductor device. The apparatus and method enables a magnitude of a magnetic field to be cyclically modulated when a substrate to be treated is etch processed. The cyclical modulation may be effected by cyclically modulating a coil current flowing to a solenoid coil.
摘要翻译：可以在宽范围内均匀稳定地产生高密度等离子体的干蚀刻装置和方法，并且可以应对晶片直径的增加，并使得图案在半导体器件的精细图案的蚀刻处理中更细。当要处理的衬底被蚀刻处理时，该装置和方法使得可以循环调制磁场的大小。循环调制可以通过循环调制流向螺线管线圈的线圈电流来实现。

26. 发明授权

US08546266B2 Plasma processing method and plasma processing apparatus 有权
公开(公告)号：US08546266B2
公开(公告)日：2013-10-01
申请号：US13212909
申请日：2011-08-18
申请人： Masahito Mori , Naoyuki Kofuji , Naoshi Itabashi
发明人： Masahito Mori , Naoyuki Kofuji , Naoshi Itabashi
IPC分类号： H01L21/302
CPC分类号： H01J37/32798 , C23F4/00 , H01J37/32009 , H01J37/32183 , H01J37/32706 , H01L21/31116 , H01L21/31138 , H01L21/32136 , H01L21/32137 , H01L29/517
摘要： The invention provides a plasma processing apparatus and a dry etching method for etching a multilayered film structure having steps with high accuracy. The plasma processing apparatus comprises a vacuum reactor 107, a lower electrode 113 placed within a processing chamber of the vacuum reactor and having a wafer 112 to be etched mounted on the upper surface thereof, bias supplying units 118 and 120 for supplying high frequency power for forming a bias potential to the lower electrode 113, a gas supply means 111 for feeding reactive gas into the processing chamber, an electric field supplying means 101 through 103 for supplying a magnetic field for generating plasma in the processing chamber, and a control unit 127 for controlling the distribution of ion energy in the plasma being incident on the wafer 112 via the high frequency power.

27. 发明申请

US20090310645A1 SAMPLE TEMPERATURE CONTROL METHOD 有权
标题翻译：样本温度控制方法
公开(公告)号：US20090310645A1
公开(公告)日：2009-12-17
申请号：US12194019
申请日：2008-08-19
申请人： Naoyuki Kofuji , Tsunehiko Tsubone
发明人： Naoyuki Kofuji , Tsunehiko Tsubone
IPC分类号： G01K17/00
CPC分类号： G01K13/00 , H01L21/67109 , H01L21/67248
摘要： A method of stably controlling the temperature of a sample placed on a sample stage to a desired temperature by estimating a sample temperature accurately, the sample stage including a refrigerant flow path to cool the sample stage, a heater to heat the sample stage, and a temperature sensor to measure the temperature of the sample stage. This method comprises the steps of: measuring in advance the variation-with-time of supply electric power to the heater, temperature of the sample, and temperature of the temperature sensor, without plasma processing; approximating the relation among the measured values using a simultaneous linear differential equation; estimating a sample temperature from the variation-with-time of sensor temperature y1, heater electric power u1, and plasma heat input by means of the Luenberger's states observer based on the simultaneous linear differential equation used for the approximation; and performing a feedback control of sample temperature using the estimated sample temperature.
摘要翻译：通过精确地估计样品温度来稳定地将放置在样品台上的样品的温度控制到所需温度的方法，所述样品台包括用于冷却样品台的制冷剂流动路径，加热样品台的加热器和温度传感器来测量样品台的温度。该方法包括以下步骤：在不进行等离子体处理的情况下，预先测量供给电力与加热器的时间的变化，样品的温度和温度传感器的温度; 使用同时线性微分方程逼近测量值之间的关系; 基于用于近似的同时线性微分方程，通过Luenberger状态观测器从传感器温度y1，加热器电力u1和等离子体热输入的变化估计样本温度; 并使用估计的样品温度执行样品温度的反馈控制。

28. 发明授权

US07479459B2 Semiconductor device manufacturing method and semiconductor device manufacturing apparatus 有权
标题翻译：半导体器件制造方法和半导体器件制造装置
公开(公告)号：US07479459B2
公开(公告)日：2009-01-20
申请号：US11242905
申请日：2005-10-05
申请人： Naoyuki Kofuji
发明人： Naoyuki Kofuji
IPC分类号： H01L21/302
CPC分类号： H01J37/32963 , H01J37/32935 , H01L22/26 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device manufacturing method and a semiconductor device manufacturing apparatus which enable to detect an etching end-point with high accuracy are provided. In etching of a lower layer formed on a semiconductor wafer using a mask which comprises a plurality of patterns extending in a predetermined direction (line-and-space patterns) and contains at least one of a metal layer and an electrically-conductive metal compound layer, the surface of the semiconductor wafer is irradiated with inspection light, the etching is performed while monitoring the intensity of the polarized light component perpendicular to the predetermined extending direction of the line-and-space patterns and the etching is terminated at the time the intensity of the polarized light component reaches a reflected light intensity corresponding to a desired remaining thickness of the lower layer.
摘要翻译：提供一种能够高精度地检测蚀刻终点的半导体器件制造方法和半导体器件制造装置。在使用包括沿预定方向（线间距图案）延伸的多个图案的掩模来蚀刻在半导体晶片上形成的下层，并且包含金属层和导电金属化合物层中的至少一个，用检查光照射半导体晶片的表面，在监视垂直于线间距图案的预定延伸方向的偏振光分量的强度的同时进行蚀刻，并且在强度的偏振光分量达到对应于下层的期望的剩余厚度的反射光强度。

29. 发明申请

US20070232067A1 Semiconductor Fabrication Method and Etching System 审中-公开
标题翻译：半导体制造方法和蚀刻系统
公开(公告)号：US20070232067A1
公开(公告)日：2007-10-04
申请号：US11692241
申请日：2007-03-28
申请人： Kousa Hirota , Masahito Mori , Naoyuki Kofuji , Naoshi Itabashi , Toshio Masuda
发明人： Kousa Hirota , Masahito Mori , Naoyuki Kofuji , Naoshi Itabashi , Toshio Masuda
IPC分类号： H01L21/302
CPC分类号： H01L21/32139 , H01L21/28123
摘要： The invention provides a semiconductor fabrication method comprising a deposition step for depositing a laminated film on a semiconductor substrate having a region in which a mask pattern is formed sparsely and a region in which the mask pattern is formed densely, a lithography step s1 for forming a mask pattern, a cleaning step S11C for removing deposits in the apparatus, a trimming step S3 for trimming the mask pattern, and dry etching steps S4 and S5 for transferring the mask pattern on the laminated film, wherein a seasoning step S11S followed by a deposition step S2 is introduced either before or after the trimming step S3.
摘要翻译：本发明提供了一种半导体制造方法，包括：沉积步骤，用于在具有稀疏形成掩模图案的区域的半导体衬底上沉积层压膜，以及密集形成掩模图案的区域;用于形成的光刻步骤s1 掩模图案，用于去除设备中的沉积物的清洁步骤S111，用于修整掩模图案的修整步骤S3以及用于将掩模图案转印到层压膜上的干蚀刻步骤S 4和S 5，其中调味在修整步骤S 3之前或之后引入步骤S11A，然后进行沉积步骤S2。

30. 发明授权

US07049243B2 Surface processing method of a specimen and surface processing apparatus of the specimen 有权
标题翻译：试样的表面处理方法和试样的表面处理装置
公开(公告)号：US07049243B2
公开(公告)日：2006-05-23
申请号：US10754594
申请日：2004-01-12
申请人： Tetsuo Ono , Yasuhiro Nishimori , Takashi Sato , Naoyuki Kofuji , Masaru Izawa , Yasushi Goto , Ken Yoshioka , Hideyuki Kazumi , Tatsumi Mizutani , Tokuo Kure , Masayuki Kojima , Takafumi Tokunaga , Motohiko Yoshigai
发明人： Tetsuo Ono , Yasuhiro Nishimori , Takashi Sato , Naoyuki Kofuji , Masaru Izawa , Yasushi Goto , Ken Yoshioka , Hideyuki Kazumi , Tatsumi Mizutani , Tokuo Kure , Masayuki Kojima , Takafumi Tokunaga , Motohiko Yoshigai
IPC分类号： H01L21/302
CPC分类号： H01J37/32082 , H01L21/32136
摘要： A plasma processing method for etching a sample having a gate oxide film which generates a plasma in a vacuum chamber using electromagnetic waves, applies an rf bias power to the sample, turns off the rf bias power before a charged voltage of the sample reaches a breakdown voltage of the gate oxide film, turns on the rf bias power after the charged voltage of the sample has substantially dropped and repeats the turning on and off of the rf bias power to process the sample. The off-time is set at least longer than the on-time, and the plasma is generated by continuously supplying power to enable generation of the plasma during the repeated turning on and off of the rf bias power.
摘要翻译：一种用于蚀刻具有使用电磁波在真空室中产生等离子体的栅极氧化膜的样品的等离子体处理方法，对样品施加rf偏置功率，在样品的充电电压达到击穿之前关断rf偏置功率栅极氧化膜的电压在样品的充电电压基本上下降之后导通rf偏置功率，并重复rf偏置功率的导通和截止以处理样品。关断时间至少比导通时间长，并且通过连续供电以在反复打开和关闭rf偏置功率期间产生等离子体而产生等离子体。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式