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1. 发明授权

US08093529B2 Control method of a temperature of a sample 有权
标题翻译：样品温度的控制方法
公开(公告)号：US08093529B2
公开(公告)日：2012-01-10
申请号：US12194019
申请日：2008-08-19
申请人： Naoyuki Kofuji , Tsunehiko Tsubone
发明人： Naoyuki Kofuji , Tsunehiko Tsubone
IPC分类号： B23K10/00
CPC分类号： G01K13/00 , H01L21/67109 , H01L21/67248
摘要： A method of stably controlling the temperature of a sample placed on a sample stage to a desired temperature by estimating a sample temperature accurately, the sample stage including a refrigerant flow path to cool the sample stage, a heater to heat the sample stage, and a temperature sensor to measure the temperature of the sample stage. This method comprises the steps of: measuring in advance the variation-with-time of supply electric power to the heater, temperature of the sample, and temperature of the temperature sensor, without plasma processing; approximating the relation among the measured values using a simultaneous linear differential equation; estimating a sample temperature from the variation-with-time of sensor temperature y1, heater electric power u1, and plasma heat input by means of the Luenberger's states observer based on the simultaneous linear differential equation used for the approximation; and performing a feedback control of sample temperature using the estimated sample temperature.
摘要翻译：通过精确地估计样品温度来稳定地将放置在样品台上的样品的温度控制到所需温度的方法，所述样品台包括用于冷却样品台的制冷剂流动路径，加热样品台的加热器和温度传感器来测量样品台的温度。该方法包括以下步骤：在不进行等离子体处理的情况下，预先测量供给电力与加热器的时间的变化，样品的温度和温度传感器的温度; 使用同时线性微分方程逼近测量值之间的关系; 基于用于近似的同时线性微分方程，通过Luenberger状态观测器从传感器温度y1，加热器电力u1和等离子体热输入的变化估计样本温度; 并使用估计的样品温度执行样品温度的反馈控制。

2. 发明申请

US20090310645A1 SAMPLE TEMPERATURE CONTROL METHOD 有权
标题翻译：样本温度控制方法
公开(公告)号：US20090310645A1
公开(公告)日：2009-12-17
申请号：US12194019
申请日：2008-08-19
申请人： Naoyuki Kofuji , Tsunehiko Tsubone
发明人： Naoyuki Kofuji , Tsunehiko Tsubone
IPC分类号： G01K17/00
CPC分类号： G01K13/00 , H01L21/67109 , H01L21/67248
摘要： A method of stably controlling the temperature of a sample placed on a sample stage to a desired temperature by estimating a sample temperature accurately, the sample stage including a refrigerant flow path to cool the sample stage, a heater to heat the sample stage, and a temperature sensor to measure the temperature of the sample stage. This method comprises the steps of: measuring in advance the variation-with-time of supply electric power to the heater, temperature of the sample, and temperature of the temperature sensor, without plasma processing; approximating the relation among the measured values using a simultaneous linear differential equation; estimating a sample temperature from the variation-with-time of sensor temperature y1, heater electric power u1, and plasma heat input by means of the Luenberger's states observer based on the simultaneous linear differential equation used for the approximation; and performing a feedback control of sample temperature using the estimated sample temperature.
摘要翻译：通过精确地估计样品温度来稳定地将放置在样品台上的样品的温度控制到所需温度的方法，所述样品台包括用于冷却样品台的制冷剂流动路径，加热样品台的加热器和温度传感器来测量样品台的温度。该方法包括以下步骤：在不进行等离子体处理的情况下，预先测量供给电力与加热器的时间的变化，样品的温度和温度传感器的温度; 使用同时线性微分方程逼近测量值之间的关系; 基于用于近似的同时线性微分方程，通过Luenberger状态观测器从传感器温度y1，加热器电力u1和等离子体热输入的变化估计样本温度; 并使用估计的样品温度执行样品温度的反馈控制。

3. 发明授权

US08129283B2 Plasma processing method and plasma processing apparatus 有权
标题翻译：等离子体处理方法和等离子体处理装置
公开(公告)号：US08129283B2
公开(公告)日：2012-03-06
申请号：US12068889
申请日：2008-02-13
申请人： Masahito Mori , Naoyuki Kofuji , Naoshi Itabashi
发明人： Masahito Mori , Naoyuki Kofuji , Naoshi Itabashi
IPC分类号： H01L21/302
CPC分类号： H01J37/32798 , C23F4/00 , H01J37/32009 , H01J37/32183 , H01J37/32706 , H01L21/31116 , H01L21/31138 , H01L21/32136 , H01L21/32137 , H01L29/517
摘要： The invention provides a plasma processing apparatus and a dry etching method for etching a multilayered film structure having steps with high accuracy. The plasma processing apparatus comprises a vacuum reactor 107, a lower electrode 113 placed within a processing chamber of the vacuum reactor and having a wafer 112 to be etched mounted on the upper surface thereof, bias supplying units 118 and 120 for supplying high frequency power for forming a bias potential to the lower electrode 113, a gas supply means 111 for feeding reactive gas into the processing chamber, an electric field supplying means 101 through 103 for supplying a magnetic field for generating plasma in the processing chamber, and a control unit 127 for controlling the distribution of ion energy in the plasma being incident on the wafer 112 via the high frequency power.
摘要翻译：本发明提供一种用于蚀刻具有高精度步骤的多层膜结构的等离子体处理装置和干蚀刻方法。等离子体处理装置包括真空反应器107，放置在真空反应器的处理室内的下部电极113，并且具有要在其上表面上安装的晶片112的偏压供给单元118和120，用于向向下电极113形成偏置电位，用于将反应性气体供给到处理室中的气体供给装置111，用于在处理室中提供用于产生等离子体的磁场的电场供给装置101至103，以及控制单元127 用于控制通过高频功率入射在晶片112上的等离子体中的离子能量的分布。

4. 发明申请

US20080190893A1 Plasma processing method and plasma processing apparatus 有权
标题翻译：等离子体处理方法和等离子体处理装置
公开(公告)号：US20080190893A1
公开(公告)日：2008-08-14
申请号：US12068889
申请日：2008-02-13
申请人： Masahito Mori , Naoyuki Kofuji , Naoshi Itabashi
发明人： Masahito Mori , Naoyuki Kofuji , Naoshi Itabashi
IPC分类号： C23F1/00 , C23F1/08
CPC分类号： H01J37/32798 , C23F4/00 , H01J37/32009 , H01J37/32183 , H01J37/32706 , H01L21/31116 , H01L21/31138 , H01L21/32136 , H01L21/32137 , H01L29/517
摘要： The invention provides a plasma processing apparatus and a dry etching method for etching a multilayered film structure having steps with high accuracy. The plasma processing apparatus comprises a vacuum reactor 107, a lower electrode 113 placed within a processing chamber of the vacuum reactor and having a wafer 112 to be etched mounted on the upper surface thereof, bias supplying units 118 and 120 for supplying high frequency power for forming a bias potential to the lower electrode 113, a gas supply means 111 for feeding reactive gas into the processing chamber, an electric field supplying means 101 through 103 for supplying a magnetic field for generating plasma in the processing chamber, and a control unit 127 for controlling the distribution of ion energy in the plasma being incident on the wafer 112 via the high frequency power.
摘要翻译：本发明提供一种用于蚀刻具有高精度步骤的多层膜结构的等离子体处理装置和干蚀刻方法。等离子体处理装置包括真空反应器107，放置在真空反应器的处理室内的下部电极113，并且具有要在其上表面上安装的晶片112的偏压供给单元118和120，用于向向下电极113形成偏置电位，用于将反应性气体供给到处理室中的气体供给装置111，用于在处理室中提供用于产生等离子体的磁场的电场供给装置101至103，以及控制单元127 用于控制通过高频功率入射在晶片112上的等离子体中的离子能量的分布。

5. 发明申请

US20070199657A1 Apparatus and method for plasma etching 审中-公开
标题翻译：用于等离子体蚀刻的装置和方法
公开(公告)号：US20070199657A1
公开(公告)日：2007-08-30
申请号：US11500360
申请日：2006-08-08
申请人： Naoyuki Kofuji , Hiroshi Akiyama
发明人： Naoyuki Kofuji , Hiroshi Akiyama
IPC分类号： H01L21/306 , C23F1/00
CPC分类号： H01L21/32137 , H01J37/3244 , H01J37/32935
摘要： The invention aims at solving the problems of throughput deterioration, reproducibility deterioration and plasma discharge instability when performing continuous discharge during multiple steps of plasma etching. According to the present invention, the gas supply unit is operated while determining the timing for switching conditions of a plurality of plasma etching steps, and the gas flow rate and gas pressure are controlled so that the pressure of processing gas supplied from the gas supply unit to the processing chamber does not fall below a predetermined pressure immediately subsequent to switching steps. For example, upon switching processing gases, the end point of a step is predicted based on an interference film thickness meter, and prior to the end point by two seconds or more, the flow rate of MFC is set to the gas flow rate for the subsequent step and the gas is flown to the exhaust device, so that simultaneously as when the end point signal is received, the processing gases are switched by switching valves.
摘要翻译：本发明旨在解决在等离子体蚀刻的多个步骤期间执行连续放电时的吞吐量劣化，再现性劣化和等离子体放电不稳定性的问题。根据本发明，在确定多个等离子体蚀刻步骤的切换条件的定时的同时操作气体供给单元，并且控制气体流量和气体压力，使得从气体供应单元供应的处理气体的压力到切换步骤之后，处理室不会下降到预定压力以下。例如，在切换处理气体时，基于干涉膜厚度计预测台阶的终点，并且在终点2秒以上之前，将MFC的流量设定为随后的步骤和气体流到排气装置，从而同时当接收到终点信号时，处理气体由切换阀切换。

6. 发明申请

US20110253672A1 PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD 审中-公开
标题翻译：等离子体加工设备和等离子体处理方法
公开(公告)号：US20110253672A1
公开(公告)日：2011-10-20
申请号：US12855206
申请日：2010-08-12
申请人： Masami Kamibayashi , Masahito Mori , Hiroyuki Kobayashi , Keizo Suzuki , Naoyuki Kofuji
发明人： Masami Kamibayashi , Masahito Mori , Hiroyuki Kobayashi , Keizo Suzuki , Naoyuki Kofuji
IPC分类号： C23F1/12 , H01L21/306 , C23F1/08
CPC分类号： H01J37/32678 , H01J37/32091 , H01L21/32136
摘要： The present invention is intended to improve the uniformity in a distribution function of incident ion energy inside a wafer surface, and realize uniform plasma processing (etching or the like) inside the wafer surface. In a plasma processing apparatus, a bias application portion of a placement electrode on which a wafer is placed is divided into an inner electrode and an outer electrode at positions near the center of the wafer and the edge thereof. Each of a first bias power and a second bias power to be used to accelerate ions incident on the wafer is bifurcated, and the resultant bias powers are fed to the inner electrode and outer electrode using a power distributor by adjusting the power ratio.
摘要翻译：本发明旨在提高晶片表面内的入射离子能的分布函数的均匀性，并且在晶片表面内实现均匀的等离子体处理（蚀刻等）。在等离子体处理装置中，放置晶片的放置电极的偏置施加部分在晶片的中心和边缘附近的位置被分成内电极和外电极。用于加速入射在晶片上的离子的第一偏置功率和第二偏置功率分别被分叉，并且通过调节功率比，使用功率分配器将所得到的偏置功率馈送到内部电极和外部电极。

7. 发明申请

US20060076315A1 Semiconductor device manufacturing method and semiconductor device manufacturing apparatus 有权
公开(公告)号：US20060076315A1
公开(公告)日：2006-04-13
申请号：US11242905
申请日：2005-10-05
申请人： Naoyuki Kofuji
发明人： Naoyuki Kofuji
IPC分类号： G01L21/30 , C23F1/00
CPC分类号： H01J37/32963 , H01J37/32935 , H01L22/26 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device manufacturing method and a semiconductor device manufacturing apparatus which enable to detect an etching end-point with high accuracy are provided. In etching of a lower layer formed on a semiconductor wafer using a mask which comprises a plurality of patterns extending in a predetermined direction (line-and-space patterns) and contains at least one of a metal layer and an electrically-conductive metal compound layer, the surface of the semiconductor wafer is irradiated with inspection light, the etching is performed while monitoring the intensity of the polarized light component perpendicular to the predetermined extending direction of the line-and-space patterns and the etching is terminated at the time the intensity of the polarized light component reaches a reflected light intensity corresponding to a desired remaining thickness of the lower layer.

8. 发明申请

US20050227470A1 Method for manufacturing a semiconductor device having a W/WN/polysilicon layered film 有权
标题翻译：具有W / WN /多晶硅层状膜的半导体器件的制造方法
公开(公告)号：US20050227470A1
公开(公告)日：2005-10-13
申请号：US11099609
申请日：2005-04-06
申请人： Naoyuki Kofuji
发明人： Naoyuki Kofuji
IPC分类号： H01L21/3065 , C23F4/00 , H01L21/02 , H01L21/28 , H01L21/3205 , H01L21/3213 , H01L21/4763 , H01L23/52 , H01L29/49 , H01L29/78
CPC分类号： H01L21/02071 , H01L21/28061 , H01L21/32136 , H01L29/4941
摘要： A method for manufacturing a semiconductor device includes the steps of consecutively depositing a Poly-Si layer, a WN layer and a W layer on a SiO2 layer, forming a mask pattern on the W layer, selectively etching the W layer by using plasma in a first etching gas having a high etch selectivity ratio between W and WN, selectively etching the WN layer and the Poly-Si layer by using plasma in a second etching gas having a high etch selectivity between WN and Si, and selectively etching the Poly-Si layer 13 by using plasma in a third etching gas having a high etch selectivity between Si and silicon oxide.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在SiO 2层上连续沉积多晶硅层，WN层和W层，在W层上形成掩模图案，选择性蚀刻通过在W和WN之间具有高蚀刻选择性比的第一蚀刻气体中使用等离子体，通过在WN和Si之间具有高蚀刻选择性的第二蚀刻气体中使用等离子体来选择性地蚀刻WN层和多晶硅层并且通过在Si和氧化硅之间具有高蚀刻选择性的第三蚀刻气体中使用等离子体来选择性地蚀刻多晶硅层13。

9. 发明授权

US06784109B2 Method for fabricating semiconductor devices including wiring forming with a porous low-k film and copper 失效
标题翻译：用于制造半导体器件的方法，包括用多孔低k膜和铜形成的布线
公开(公告)号：US06784109B2
公开(公告)日：2004-08-31
申请号：US09920834
申请日：2001-08-03
申请人： Naoyuki Kofuji , Masaru Izawa
发明人： Naoyuki Kofuji , Masaru Izawa
IPC分类号： H01L21302
CPC分类号： H01L21/76838 , H01J37/3266 , H01L21/02046 , H01L21/31116 , H01L21/31138 , H01L21/76811 , H01L21/76814
摘要： Semiconductor devices having a wiring construction consisting of a conductive layer (a copper layer) and an insulating layer (a porous insulator layer with low dielectric constant) are fabricated. A method for forming wiring of semiconductor devices includes a first step for forming a first insulating material layer on a sample; a second step for forming a second insulating material layer with a dielectric constant less than 2.5; a third step for patterning the second insulating material layer by a plasma etching method; a fourth step for depositing a metal film on the second insulating material layer by a sputtering method; a fifth step for forming a copper layer on the metal film; and a sixth step for removing an unnecessary portion of the copper layer by Chemical Mechanical Polishing, wherein all the processes from the third to the fourth step are performed under process conditions.
摘要翻译：制造具有由导电层（铜层）和绝缘层（具有低介电常数的多孔绝缘体层）组成的布线结构的半导体器件。一种用于形成半导体器件布线的方法包括：在样品上形成第一绝缘材料层的第一步骤; 用于形成介电常数小于2.5的第二绝缘材料层的第二步骤; 通过等离子体蚀刻方法对第二绝缘材料层进行图案化的第三步骤; 通过溅射法在第二绝缘材料层上沉积金属膜的第四步骤; 在金属膜上形成铜层的第五步骤; 以及通过化学机械抛光除去铜层的不需要部分的第六步骤，其中在工艺条件下进行从第三步骤到第四步骤的所有处理。

10. 发明申请

US20100167426A1 PLASMA ETCHING APPARATUS AND PLASMA ETCHING METHOD 审中-公开
标题翻译：等离子体蚀刻装置和等离子体蚀刻方法
公开(公告)号：US20100167426A1
公开(公告)日：2010-07-01
申请号：US12723443
申请日：2010-03-12
申请人： Naoyuki Kofuji , Hiroshi Akiyama , Kouhei Satou
发明人： Naoyuki Kofuji , Hiroshi Akiyama , Kouhei Satou
IPC分类号： H01L21/66 , H01L21/3065
CPC分类号： H01L21/32136 , H01L21/3065 , H01L21/31116 , H01L21/32137
摘要： The invention provides a method for overcoming the drawbacks of deteriorated throughput, deteriorated reproducibility and plasma discharge instability when continuous discharge is performed during multiple steps of plasma etching. The present invention provides a gas switching method for switching from gas supply source 101 to gas supply source 111, wherein the gas supply source 101 is switched to gas supply source 111 by opening a valve 114 in advance, setting a flow rate of MFC 112 to a flow rate used in the subsequent step, letting the gas supply source 111 to flow toward an exhaust means 5, and closing the valve 114 simultaneously when opening the valve 113, wherein a volume V1 of an area of a gas pipe 115 surrounded by the valve 113, the valve 114 and the MFC 112 is set sufficiently smaller than a volume Vo from the shower plate to the valve 113 including a gas reservoir 10 and a processing gas line 8. The present arrangement enables to prevent the occurrence of pressure undershoot and to solve the problem of discharge instability.
摘要翻译：本发明提供了一种在等离子体蚀刻的多个步骤中进行连续放电时，克服了劣化生产量，再现性劣化和等离子体放电不稳定性的缺陷的方法。本发明提供一种从气体供给源101切换到气体供给源111的气体切换方法，其中，气体供给源101通过预先打开阀114而切换到气体供给源111，将MFC112的流量设定为在后续步骤中使用的流量，使得气体供应源111朝向排气装置5流动，并且在打开阀113时同时关闭阀114，其中由管道115包围的气体管道115的区域的体积V1 阀113，阀114和MFC112被设定为足够小于从喷淋板到包括气体储存器10和处理气体管线8的阀113的体积Vo。本配置能够防止压力下冲的发生，解决放电不稳定的问题。

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