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21. 发明申请

US20130307520A1 MICROELECTRODE ARRAY AND METHOD FOR MODIFYING CARBON NANOTUBE ELECTRODE INTERFACE OF THE SAME ARRAY 有权
标题翻译：微电极阵列和修改同一阵列碳纳米管电极接口的方法
公开(公告)号：US20130307520A1
公开(公告)日：2013-11-21
申请号：US12638429
申请日：2009-12-15
申请人： Shiang-Jie YEN , Huan-Chieh Su , Tri-Rung Yew , Yen-Chung Chang , Wei-Lun Hsu , Shih-Rung Yeh
发明人： Shiang-Jie YEN , Huan-Chieh Su , Tri-Rung Yew , Yen-Chung Chang , Wei-Lun Hsu , Shih-Rung Yeh
IPC分类号： C01B31/02 , A61N1/05
CPC分类号： C01B31/0273 , A61N1/0502 , A61N1/0551 , B82Y15/00 , B82Y30/00 , B82Y40/00 , C01B32/174
摘要： The present invention discloses a method for modifying a carbon nanotube electrode interface, which modifies carbon nanotubes used as a neuron-electrode interface by performing three stages of modifications and comprises the steps of: carboxylating carbon nanotubes to provide carboxyl functional groups and improve the hydrophilicity of the carbon nanotubes; acyl-chlorinating the carboxylated carbon nanotubes to replace the hydroxyl functional groups of the carboxyl functional groups with chlorine atoms; and aminating the acyl-chlorinated carbon nanotubes to replace the chlorine atoms with a derivative having amine functional groups at the terminal thereof. The modified carbon nanotubes used as the neuron-electrode interface has lower impedance and higher adherence to nerve cells. Thus is improved the quality of neural signal measurement. The present invention also discloses a microelectrode array, wherein the neuron-electrode interface uses carbon nanotubes modified according to the method of the present invention.
摘要翻译：本发明公开了一种修饰碳纳米管电极界面的方法，其通过进行三个阶段的修饰来改变用作神经元 - 电极界面的碳纳米管，并且包括以下步骤：使碳纳米管羧化以提供羧基官能团并提高其亲水性碳纳米管; 酰化氯化羧化碳纳米管以用氯原子代替羧基官能团的羟基官能团; 并将酰基氯化碳纳米管胺化以在其末端具有胺官能团的衍生物代替氯原子。用作神经元 - 电极界面的改性碳纳米管具有较低的阻抗和较高的对神经细胞的依从性。因此提高了神经信号测量的质量。本发明还公开了一种微电极阵列，其中神经电极界面使用根据本发明的方法改性的碳纳米管。

22. 发明申请

US20110233526A1 PERYLENE DIIMIDE DERIVATIVE AND ORGANIC SEMICONDUCTOR ELEMENT USING THE SAME MATERIAL 有权
标题翻译：亚甲基二胺衍生物和有机半导体元素使用相同的材料
公开(公告)号：US20110233526A1
公开(公告)日：2011-09-29
申请号：US12730542
申请日：2010-03-24
申请人： Szu-Ying Chen , Heng-Wen Ting , Tri-Rung Yew , Jeng-Hua Wei
发明人： Szu-Ying Chen , Heng-Wen Ting , Tri-Rung Yew , Jeng-Hua Wei
IPC分类号： H01L51/30 , C07D471/02
CPC分类号： C07D471/04 , H01L51/0053 , H01L51/0541
摘要： The present invention discloses a soluble and air-stable perylene diimide (PDI) derivative to function as an N-type organic semiconductor material. In the PDI derivative of the present invention, the core thereof is substituted by electron withdrawing groups, and the side chains thereof are substituted by benzene functional groups, whereby are promoted the solubility and air-stability of the molecule. The PDI derivative of the present invention can be used to fabricate an organic semiconductor element via a soluble process at a low temperature and under an atmospheric environment.
摘要翻译：本发明公开了用作N型有机半导体材料的可溶性和空气稳定的苝二酰亚胺（PDI）衍生物。在本发明的PDI衍生物中，其核心被吸电子基团取代，其侧链被苯官能团取代，从而促进了分子的溶解度和空气稳定性。本发明的PDI衍生物可用于在低温和大气环境下通过可溶性方法制造有机半导体元件。

23. 发明授权

US07754107B2 Carbon nanotube and method of visualizing carbon nanotube 有权
标题翻译：碳纳米管和可视化碳纳米管的方法
公开(公告)号：US07754107B2
公开(公告)日：2010-07-13
申请号：US12009300
申请日：2008-01-16
申请人： Ning-Yu Wu , Yi-Yang Chen , Tri-Rung Yew
发明人： Ning-Yu Wu , Yi-Yang Chen , Tri-Rung Yew
IPC分类号： H01B1/00
CPC分类号： B82Y30/00 , B82Y10/00 , B82Y40/00 , C01B32/174 , C01B2202/22 , H01L51/0048 , H01L51/0054 , Y10S977/734 , Y10S977/74 , Y10S977/742 , Y10S977/745 , Y10S977/746 , Y10S977/753 , Y10S977/953
摘要： A carbon nanotube is described, to which quantum dots are attached through non-covalent bonding via linking molecules bonded to the quantum dots. A method of visualizing a carbon nanotube is also described, wherein quantum dots are attached to the carbon nanotube through non-covalent bonding via linking molecules bonded to the quantum dots, and then the quantum dots are made emit light. This invention allows carbon nanotubes, even those in a wet condition, to be visualized by a simple fluorescent optical microscope. Thereby, the difficulties on preparing specimens and the need of sophisticated instruments can be reduced. This invention also exhibits great potential for the application of carbon nanotubes under a wet condition.
摘要翻译：描述了一种碳纳米管，通过连接到量子点上的分子，通过非共价键连接量子点。还描述了一种可视化碳纳米管的方法，其中量子点通过非结合分子的非共价键连接到碳纳米管上，并将量子点发光。本发明允许通过简单的荧光光学显微镜观察甚至那些处于潮湿状态的碳纳米管。因此，可以减少准备样品的困难和精密仪器的需要。本发明在湿条件下也具有巨大的应用碳纳米管的潜力。

24. 发明授权

US06403411B1 Method for manufacturing lower electrode of DRAM capacitor 失效
标题翻译：制造DRAM电容器下电极的方法
公开(公告)号：US06403411B1
公开(公告)日：2002-06-11
申请号：US09208601
申请日：1998-12-08
申请人： Chih-Hsun Chu , Horng-Nan Chern , Kevin Lin , Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
发明人： Chih-Hsun Chu , Horng-Nan Chern , Kevin Lin , Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
IPC分类号： H01L218234
CPC分类号： H01L28/84 , H01L21/76895
摘要： A method for manufacturing the lower electrode of a DRAM capacitor. The method includes depositing polysilicon instead of amorphous silicon to form the lower electrode. Because polysilicon has a higher depositing temperature, it has a higher depositing rate capable of shortening depositing time. After forming the polysilicon lower electrode, the upper portion of the polysilicon layer is transformed into an amorphous layer by bombarding the polysilicon layer with ions to damage its internal structure. Eventually, hemispherical grain silicon is able to grow over the lower electrode, thereby increasing its surface area.
摘要翻译：一种用于制造DRAM电容器的下电极的方法。该方法包括沉积多晶硅而不是非晶硅以形成下电极。由于多晶硅具有较高的沉积温度，因此具有更高的沉积速率，能够缩短沉积时间。在形成多晶硅下电极之后，通过用离子轰击多晶硅层将多晶硅层的上部转变成非晶层，以破坏其内部结构。最终，半球形晶粒硅能够在下电极上生长，从而增加其表面积。

25. 发明授权

US06251783B1 Method of manufacturing shallow trench isolation 失效
标题翻译：制造浅沟槽隔离的方法
公开(公告)号：US06251783B1
公开(公告)日：2001-06-26
申请号：US09189847
申请日：1998-11-12
申请人： Tri-Rung Yew , Kuo-Tai Huang , Gwo-Shii Yang , Water Lur
发明人： Tri-Rung Yew , Kuo-Tai Huang , Gwo-Shii Yang , Water Lur
IPC分类号： H01L21302
CPC分类号： H01L21/31053 , H01L21/76229
摘要： A method of manufacturing shallow trench isolation structures. The method includes the steps of depositing insulating material into the trench of a substrate to form an insulation layer. The substrate has a plurality of active regions, each occupying a different area and having different sizes. In addition, there is a silicon nitride layer on top of each active region. Thereafter, a photoresist layer is then deposited over the insulation layer. Next, a portion of the photoresist layer is etched back to expose a portion of the oxide layer so that the remaining photoresist material forms a cap layer over the recessed area of the insulation layer. Subsequently, using the photoresist cap layer as a mask, the insulation layer is etched to remove a portion of the exposed oxide layer, thereby forming trenches within the oxide layer. After that, the photoresist cap layer is removed. Finally, a chemical-mechanical polishing operation is carried out to polish the insulation layer until the silicon nitride layer is exposed.
摘要翻译：制造浅沟槽隔离结构的方法。该方法包括以下步骤：将绝缘材料沉积到衬底的沟槽中以形成绝缘层。基板具有多个活性区域，每个活性区域占据不同的区域并且具有不同的尺寸。此外，在每个有源区的顶部有一个氮化硅层。此后，然后将光致抗蚀剂层沉积在绝缘层上。接下来，将光致抗蚀剂层的一部分回蚀刻以暴露氧化物层的一部分，使得剩余的光致抗蚀剂材料在绝缘层的凹陷区域上形成覆盖层。随后，使用光致抗蚀剂覆盖层作为掩模，蚀刻绝缘层以去除暴露的氧化物层的一部分，从而在氧化物层内形成沟槽。之后，去除光致抗蚀剂覆盖层。最后，进行化学机械抛光操作以抛光绝缘层，直到暴露氮化硅层。

26. 发明授权

US06251769B1 Method of manufacturing contact pad 失效
标题翻译：制造接触垫的方法
公开(公告)号：US06251769B1
公开(公告)日：2001-06-26
申请号：US09347180
申请日：1999-07-02
申请人： Tri-Rung Yew , Kuo-Tai Huang , Water Lur
发明人： Tri-Rung Yew , Kuo-Tai Huang , Water Lur
IPC分类号： H01L214763
CPC分类号： H01L24/03 , H01L21/02532 , H01L21/02576 , H01L21/0262 , H01L21/02639 , H01L21/28525 , H01L21/76814 , H01L21/76879 , H01L21/76895 , H01L21/76897 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01018 , H01L2924/01033 , H01L2924/01082 , H01L2924/14
摘要： A method of manufacturing a contact pad. A substrate having a source/drain region formed therein is provided. A dielectric layer is formed over the substrate. An opening is formed in the dielectric layer and exposes the source/drain region. A selective epitaxial process is performed to form a contact pad in the opening, wherein a top of the contact pad extends onto a surface of the dielectric layer.
摘要翻译：一种制造接触垫的方法。提供其中形成有源极/漏极区的衬底。介电层形成在衬底上。在电介质层中形成开口并使源极/漏极区域露出。执行选择性外延工艺以在开口中形成接触焊盘，其中接触焊盘的顶部延伸到介电层的表面上。

27. 发明授权

US06248644B1 Method of fabricating shallow trench isolation structure 有权
标题翻译：制造浅沟槽隔离结构的方法
公开(公告)号：US06248644B1
公开(公告)日：2001-06-19
申请号：US09301210
申请日：1999-04-28
申请人： Gwo-Shii Yang , Hsueh-Hao Shih , Chih-Chien Liu , Tri-Rung Yew
发明人： Gwo-Shii Yang , Hsueh-Hao Shih , Chih-Chien Liu , Tri-Rung Yew
IPC分类号： H01L2176
CPC分类号： H01L21/76235
摘要： A method of fabricating a shallow trench isolation structure is described. A preserve layer is formed on a substrate. A trench is formed in the substrate and the preserve layer. An oxide layer is formed over the substrate to fill the trench. A wet densification step is performed in a moist environment. A planarization step is performed until the preserve layer is exposed. A shallow trench isolation structure is formed.
摘要翻译：描述了制造浅沟槽隔离结构的方法。在基板上形成保护层。在衬底和保护层中形成沟槽。在衬底上形成氧化物层以填充沟槽。在潮湿的环境中进行湿致密化步骤。进行平坦化步骤直到保护层被暴露。形成浅沟槽隔离结构。

28. 发明授权

US06218238B1 Method of fabricating DRAM capacitor 有权
标题翻译：制造DRAM电容的方法
公开(公告)号：US06218238B1
公开(公告)日：2001-04-17
申请号：US09172458
申请日：1998-10-14
申请人： Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
发明人： Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
IPC分类号： H01L218242
CPC分类号： H01L28/75 , H01L21/28568 , H01L21/3211 , H01L27/10852 , H01L28/55
摘要： A method of fabricating a DRAM capacitor uses tungsten nitride in the process of forming a capacitor. The structure of the capacitor is simple and the process is easily executed. Furthermore, the invention provides a method of forming tungsten nitride, comprising a step of implanting nitrogen into a tungsten silicide layer and a step of executing a rapid thermal process under ammonia gas to form a tungsten nitride layer on the surface of the tungsten silicide layer. The method of fabricating a DRAM capacitor comprises forming the tungsten silicide layer after forming a part smaller than a bottom electrode of the capacitor from doped polysilicon and forming tungsten nitride on the surface of the tungsten nitride layer.
摘要翻译：制造DRAM电容器的方法在形成电容器的过程中使用氮化钨。电容器的结构简单，易于执行。此外，本发明提供了一种形成氮化钨的方法，包括将氮气注入到硅化钨层中的步骤以及在氨气下执行快速热处理以在硅化钨层的表面上形成氮化钨层的步骤。制造DRAM电容器的方法包括在从掺杂多晶硅形成小于电容器的底部电极的部分之后形成硅化钨层，并在氮化钨层的表面上形成氮化钨。

29. 发明授权

US06214691B1 Method for forming shallow trench isolation 失效
标题翻译：形成浅沟槽隔离的方法
公开(公告)号：US06214691B1
公开(公告)日：2001-04-10
申请号：US09228932
申请日：1999-01-12
申请人： Gwo-Shii Yong , Chih-Chien Liu , Tri-Rung Yew , Water Lur
发明人： Gwo-Shii Yong , Chih-Chien Liu , Tri-Rung Yew , Water Lur
IPC分类号： H01L2176
CPC分类号： H01L21/76224
摘要： A method for forming shallow trench isolation is disclosed. The method includes forming a trench in a semiconductor substrate, and then blanket depositing a silicon oxide layer over the semiconductor substrate by a plasma process, thereby substantially refilling the trench. Thereafter, a photoresist layer is formed on the plasma deposited silicon oxide layer, followed by etching back a portion of the photoresist layer. The plasma deposited silicon oxide layer is then isotropically etched, and the photoresist layer is then finally removed.
摘要翻译：公开了一种用于形成浅沟槽隔离的方法。该方法包括在半导体衬底中形成沟槽，然后通过等离子体工艺在半导体衬底上覆盖氧化硅层，从而基本上重新填充沟槽。此后，在等离子体沉积的氧化硅层上形成光致抗蚀剂层，然后蚀刻光致抗蚀剂层的一部分。然后等离子体沉积的氧化硅层被各向同性地蚀刻，然后最终去除光致抗蚀剂层。

30. 发明授权

US06191028B1 Method of patterning dielectric 失效
标题翻译：电介质图案方法
公开(公告)号：US06191028B1
公开(公告)日：2001-02-20
申请号：US09059751
申请日：1998-04-14
申请人： Yimin Huang , Tri-Rung Yew
发明人： Yimin Huang , Tri-Rung Yew
IPC分类号： H01L214763
CPC分类号： H01L21/76832 , H01L21/76804 , H01L21/7681 , H01L21/76811
摘要： A method of patterning a dielectric layer. On a substrate having a metal wiring layer formed thereon, a dielectric layer and a masking layer are formed. A cap insulation layer is formed on the masking layer before patterning the dielectric layer. In addition, a dual damasecence process is used for patterning the dielectric layer.
摘要翻译：图案化介电层的方法。在其上形成有金属布线层的基板上，形成介电层和掩模层。在图案化电介质层之前，在掩模层上形成帽绝缘层。此外，使用双重破坏过程来对介电层进行图案化。

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