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11. 发明授权

US09466363B2 Integrated circuit 有权
公开(公告)号：US09466363B2
公开(公告)日：2016-10-11
申请号：US14369974
申请日：2012-12-04
申请人： TOHOKU UNIVERSITY
发明人： Tetsuo Endoh , Takashi Ohsawa , Hiroki Koike , Takahiro Hanyu , Hideo Ohno
IPC分类号： G11C14/00 , G11C13/00 , G11C11/16 , G11C15/04 , G11C19/02 , H03K3/356 , H03K3/59 , H03K19/18 , G11C29/50
CPC分类号： G11C13/0038 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C13/0004 , G11C13/0007 , G11C13/0069 , G11C14/00 , G11C14/0081 , G11C15/046 , G11C19/02 , G11C29/50012 , H03K3/356139 , H03K3/59 , H03K19/18
摘要： An integrated circuit that does not involve increase in power consumption or decrease in switching probability during a write operation that occur when a latch circuit using STT-MTJ device, etc. of the prior art is operated at high speed is provided. The integrated circuit 1 includes: a memory element 1B where write occurs when a specified period τ has elapsed after a write signal is input; and a basic circuit element 1A, which is an elementary device constituting a circuit and has a data retaining function, and characterized in that an operation frequency f1 in a first operation mode in the process of memory access of the basic circuit element 1A satisfies the following relation: τ>λ1/f1(0

12. 发明授权

US09190167B2 Shift register and shift register type magnetic memory 有权
标题翻译：移位寄存器和移位寄存器型磁存储器
公开(公告)号：US09190167B2
公开(公告)日：2015-11-17
申请号：US13935763
申请日：2013-07-05
申请人： Kabushiki Kaisha Toshiba
发明人： Yoshiaki Fukuzumi , Hideaki Aochi , Hirofumi Morise
IPC分类号： G11C19/00 , G11C19/02 , G11C19/08
CPC分类号： G11C19/02 , G11C19/08
摘要： A shift register according to an embodiment includes: a magnetic nanowire; a first control electrode group and a second control electrode group arranged with the magnetic nanowire being sandwiched therebetween, the first control electrode group including a plurality of first control electrodes arranged to be spaced apart from each other along a direction in which the magnetic nanowire extends, the second control electrode group including a plurality of second control electrodes arranged to be spaced apart from each other to correspond to the plurality of first control electrodes along the direction in which the magnetic nanowire extends, and the second control electrodes corresponding to the first control electrodes being shifted in the direction in which the magnetic nanowire extends; a first driving unit for driving the first control electrode group; and a second driving unit for driving the second control electrode group.
摘要翻译：根据实施例的移位寄存器包括：磁性纳米线; 所述第一控制电极组和所述磁性纳米线夹在其间的第二控制电极组，所述第一控制电极组包括沿着所述磁性纳米线延伸的方向彼此间隔开的多个第一控制电极，所述第二控制电极组包括多个第二控制电极，所述多个第二控制电极被布置为沿着所述多个第一控制电极沿着所述磁性纳米线延伸的方向彼此间隔开，并且所述第二控制电极对应于所述第一控制电极沿着磁性纳米线延伸的方向移动; 用于驱动第一控制电极组的第一驱动单元; 以及用于驱动第二控制电极组的第二驱动单元。

13. 发明授权

US09042151B2 Racetrack memory with electric-field assisted domain wall injection for low-power write operation 有权
标题翻译：赛道记忆与电场辅助域墙注射低功耗写入操作
公开(公告)号：US09042151B2
公开(公告)日：2015-05-26
申请号：US13835254
申请日：2013-03-15
申请人： International Business Machines Corporation
发明人： Anthony J. Annunziata , Marcin J. Gajek
IPC分类号： G11C19/02 , G11C19/08
CPC分类号： G11C19/0808 , G11C11/161 , G11C19/02 , G11C19/0816 , G11C19/0841
摘要： Embodiments are directed to injecting domain walls in a magnetic racetrack memory. In some embodiments, a racetrack comprising a nanowire is coupled with a gate in order to manipulate an anisotropy associated with the nanowire. The racetrack and gate is coupled with a pinning layer configured to establish a magnetization direction in the nanowire.
摘要翻译：实施例涉及在磁性跑道存储器中注入畴壁。在一些实施例中，包括纳米线的赛道与栅极耦合以便操纵与纳米线相关联的各向异性。赛道和门与被配置成在纳米线中建立磁化方向的钉扎层耦合。

14. 发明申请

US20140355330A1 INTEGRATED CIRCUIT 有权
标题翻译：集成电路
公开(公告)号：US20140355330A1
公开(公告)日：2014-12-04
申请号：US14369974
申请日：2012-12-04
申请人： TOHOKU UNIVERSITY
发明人： Tetsuo Endoh , Takashi Ohsawa , Hiroki Koike , Takahiro Hanyu , Hideo Ohno
IPC分类号： G11C13/00
CPC分类号： G11C13/0038 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C13/0004 , G11C13/0007 , G11C13/0069 , G11C14/00 , G11C14/0081 , G11C15/046 , G11C19/02 , G11C29/50012 , H03K3/356139 , H03K3/59 , H03K19/18
摘要： An integrated circuit that does not involve increase in power consumption or decrease in switching probability that occur when a latch circuit using STT-MTJ device, etc. of the prior art is operated at high speed is provided. The integrated circuit 1 includes: a memory element 1B where write occurs when a specified period τ has elapsed after a write signal is input; and a basic circuit element 1A, which is an elementary device constituting a circuit and has a data retaining function, and characterized in that an operation frequency f1 in a first operation mode in the process of information processing of the basic circuit element 1A satisfies the following relation: τ>λ1/f1(0
摘要翻译：提供了当使用现有技术的STT-MTJ装置等的锁存电路以高速运行时，不涉及增加功耗或降低切换概率的集成电路。集成电路1包括：存储元件1B，其中在写入信号被输入之后经过了指定的周期τ时发生写入; 以及作为构成电路并具有数据保持功能的基本装置的基本电路元件1A，其特征在于，在基本电路元件1A的信息处理的处理中的第一动作模式中的动作频率f1满足以下关系：τ>λ1/ f1（0 <λ1＆nlE; 1）。

15. 发明申请

US20140231889A1 SHIFT REGISTER MEMORY AND DRIVING METHOD THEREOF 有权
标题翻译：移位寄存器及其驱动方法
公开(公告)号：US20140231889A1
公开(公告)日：2014-08-21
申请号：US14268701
申请日：2014-05-02
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Yoshiaki FUKUZUMI , Hideaki AOCHI
IPC分类号： H01L27/22
CPC分类号： H01L27/228 , G11C11/14 , G11C11/15 , G11C11/155 , G11C11/16 , G11C11/161 , G11C11/1675 , G11C19/02 , G11C19/0808 , G11C19/0833 , H01L27/22 , H01L43/02
摘要： A shift register memory according to the present embodiment includes a magnetic pillar including a plurality of magnetic layers and a plurality of nonmagnetic layers provided between the magnetic layers adjacent to each other. A stress application part applies a stress to the magnetic pillar. A magnetic-field application part applies a static magnetic field to the magnetic pillar. The stress application part applies the stress to the magnetic pillar in order to transfer magnetization states of the magnetic layers in a stacking direction of the magnetic layers.
摘要翻译：根据本实施例的移位寄存器存储器包括具有多个磁性层的磁柱和设置在彼此相邻的磁性层之间的多个非磁性层。应力施加部分对磁柱施加应力。磁场施加部分将静磁场施加到磁柱。应力施加部分将应力施加到磁柱，以便在磁性层的堆叠方向上传递磁性层的磁化状态。

16. 发明申请

US20140063893A1 SHIFT REGISTER TYPE MAGNETIC MEMORY 有权
标题翻译：移位寄存器类型磁记忆
公开(公告)号：US20140063893A1
公开(公告)日：2014-03-06
申请号：US13750085
申请日：2013-01-25
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Yoshiaki Fukuzumi , Hideaki Aochi
IPC分类号： G11C19/02
CPC分类号： G11C19/02 , B82Y10/00 , B82Y30/00 , G11C11/16 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C19/08 , G11C21/00 , H01L27/22 , H01L43/02
摘要： A shift register type magnetic memory according to an embodiment includes: a magnetic nanowire; a magnetic material chain provided in close vicinity to the magnetic nanowire, the magnetic material chain including a plurality of disk-shaped ferromagnetic films arranged along a direction in which the magnetic nanowire extends; a magnetization rotation drive unit configured to rotate and drive magnetization of the plurality of ferromagnetic films; a writing unit configured to write magnetic information into the magnetic nanowire; and a reading unit configured to read magnetic information from the magnetic nanowire.
摘要翻译：根据实施例的移位寄存器型磁存储器包括：磁性纳米线; 磁性材料链，其设置在所述磁性纳米线附近，所述磁性材料链包括沿着所述磁性纳米线延伸的方向布置的多个盘状铁磁膜; 磁化旋转驱动单元，被配置为旋转并驱动所述多个铁磁性膜的磁化; 写入单元，被配置为将磁信息写入所述磁性纳米线; 以及读取单元，被配置为从磁性纳米线读取磁信息。

17. 发明申请

US20070087454A1 Method of fabricating a magnetic shift register 有权
标题翻译：制造磁移位寄存器的方法
公开(公告)号：US20070087454A1
公开(公告)日：2007-04-19
申请号：US11252384
申请日：2005-10-17
申请人： Tze-chiang Chen , Stuart Parkin
发明人： Tze-chiang Chen , Stuart Parkin
IPC分类号： H01L21/00 , H01L51/40 , H01L21/82 , H01L21/326
CPC分类号： H01L29/82 , G11C11/14 , G11C19/02 , G11C19/0808 , G11C19/0841
摘要： A magnetic data track used in a magnetic shift register memory system may be fabricated by forming a multilayered stack of alternating dielectric and/ or silicon layers. A trench is etched in the multi-layer stack structure. A selective etching process is used to corrugate the walls of trench. A seed layer is applied to the walls and bottom of the trench; the seed layer is covered with a magnetic layer. The trench is filled with an insulating material. A patterned layer is applied and portions of insulating material exposed by the pattern are removed, forming holes. Magnetic material and seed layer exposed in holes is selectively removed. The holes are filled with insulating material and connecting leads are attached to data tracks.
摘要翻译：用于磁移位寄存器存储器系统的磁数据磁道可以通过形成交替的电介质层和/或硅层的多层叠层来制造。在多层堆叠结构中蚀刻沟槽。使用选择性蚀刻工艺来使沟槽的壁波纹化。种子层施加到沟槽的壁和底部; 种子层被磁性层覆盖。沟槽填充绝缘材料。施加图案层，去除由图案露出的部分绝缘材料，形成孔。选择性地除去暴露在孔中的磁性材料和种子层。孔中填充绝缘材料，连接引线连接到数据轨道。

18. 发明申请

US20050186686A1 METHOD OF FABRICATING DATA TRACKS FOR USE IN A MAGNETIC SHIFT REGISTER MEMORY DEVICE 失效
标题翻译：用于在磁移位置存储器件中使用的数据轨迹的方法
公开(公告)号：US20050186686A1
公开(公告)日：2005-08-25
申请号：US10788190
申请日：2004-02-25
申请人： Tze-chiang Chen , Stuart Parkin
发明人： Tze-chiang Chen , Stuart Parkin
IPC分类号： G11C11/15 , G11C19/02 , G11C19/08 , H01L21/00
CPC分类号： G11C19/02 , G11C19/0841
摘要： A magnetic data track used in a magnetic shift register memory system may be fabricated by forming a multilayered stack of alternating dielectric and/or silicon layers. Vias of approximately 10 microns tall with a cross-section on the order of 100 nm×100 nm are etched in this multilayered stack of alternating layers. Vias may be etched form smooth or notched walls. Vias are filled by electroplating layers of alternating types of ferromagnetic or ferrimagnetic metals. The alternating ferromagnetic or ferrimagnetic layers are comprised of magnetic materials with different magnetization or magnetic exchange or magnetic anisotropies. These different magnetic characteristics allow the pinning of magnetic domain walls at the boundaries between these layers. Alternatively, vias are filled with a homogeneous ferromagnetic material. Magnetic domain walls are formed by the discontinuity in the ferromagnetic or ferromagnetic material that occurs at the notches or at the protuberances along the via walls.
摘要翻译：用于磁移位寄存器存储器系统的磁数据磁道可以通过形成交替的电介质层和/或硅层的多层叠层来制造。在该多层交替层中蚀刻约10微米高的具有100nm×100nm量级的横截面的通孔。通孔可能被蚀刻形成平滑或缺口的墙壁。通孔由交替类型的铁磁或亚铁磁性金属的电镀层填充。交替的铁磁或亚铁磁层由具有不同磁化或磁交换或磁各向异性的磁性材料组成。这些不同的磁特性允许磁畴壁在这些层之间的边界处的钉扎。或者，通孔用均匀的铁磁材料填充。磁畴壁由铁氧体或铁磁材料中的不连续部分形成，这些不规则发生在沿着通孔壁的凹口或凸起处。

19. 发明申请

US20020101761A1 Non-volatile magnetic register 有权
标题翻译：非易失磁性寄存器
公开(公告)号：US20020101761A1
公开(公告)日：2002-08-01
申请号：US09774949
申请日：2001-01-31
申请人： Motorola, Inc.
发明人： Peter K. Naji
IPC分类号： G11C011/14
CPC分类号： G11C11/5607 , G11C14/0081 , G11C19/02
摘要： A non-volatile, bistable magnetic tunnel junction (MTJ) register cell includes first and second magnetic tunnel junctions connected for differential operation. The first MTJ is coupled between an easy axis line and an output terminal and the second MTJ is coupled between an inverse easy axis line and an inverse output terminal. A hard axis line is coupled magnetically to the MTJs and an enable line is coupled to the MTJs for enabling and disabling the differential operation. The MTJ register cell can be connected as a PIPO non-volatile register, a right or left non-volatile shift register, or a multi-bit bi-directional non-volatile shift register.
摘要翻译：非易失性，双稳态磁隧道结（MTJ）寄存器单元包括连接用于差分操作的第一和第二磁隧道结。第一MTJ耦合在易轴线和输出端之间，第二MTJ耦合在易逆轴线和反向输出端之间。硬轴线磁耦合到MTJ，并且使能线耦合到MTJ以用于启用和禁用差分操作。 MTJ寄存器单元可以作为PIPO非易失性寄存器，右或左非易失性移位寄存器或多位双向非易失性移位寄存器连接。

20. 发明授权

US09293184B2 Method of pinning domain walls in a nanowire magnetic memory device 有权
标题翻译：在纳米线磁存储器件中钉扎畴壁的方法
公开(公告)号：US09293184B2
公开(公告)日：2016-03-22
申请号：US14350434
申请日：2012-10-08
申请人： University of York
发明人： Kevin O'Grady , Gonzalo Vallejo Fernandez , Atsufumi Hirohata
IPC分类号： G11C19/00 , G11C19/02 , G11C7/00 , G11C11/00 , G11C5/02 , G11C19/38 , G11C11/16 , G11C11/14 , H04L12/26 , G11C19/08 , G11C14/00
CPC分类号： G11C11/1675 , G11C11/14 , G11C11/161 , G11C14/0081 , G11C19/02 , G11C19/0808 , G11C19/0833 , G11C19/085 , G11C19/0875 , H01L43/02 , H01L43/10 , H04L43/02 , H04L43/10
摘要： There is provided a method of pinning domain walls in a magnetic memory device (10) comprising using an antiferromagnetic material to create domain wall pinning sites. Junctions (22) where arrays of ferromagnetic nanowires (16) and antiferromagnetic nanowires (20) cross exhibit a permanent exchange bias interaction between the ferromagnetic material and the antiferromagnetic material which creates domain wall pinning sites. The exchange bias field is between 30 to 3600 Oe and the anisotropy direction of the ferromagnetic elements is between 15 to 75° to an anisotropy direction of the antiferromagnetic elements.
摘要翻译：提供了一种在磁存储器装置（10）中钉扎畴壁的方法，包括使用反铁磁材料来产生畴壁钉扎位置。铁磁性纳米线（16）和反铁磁性纳米线（20）交叉排列的结（22）在铁磁材料和反铁磁材料之间呈现永久的交换偏压相互作用，产生畴壁钉扎位置。交换偏压场为30〜3600Oe，铁磁元件的各向异性方向与反铁磁性元件的各向异性方向成15〜75°。

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