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11. 发明申请

US20080237767A1 Sensor-type semiconductor device and manufacturing method thereof 审中-公开
标题翻译：传感器型半导体器件及其制造方法
公开(公告)号：US20080237767A1
公开(公告)日：2008-10-02
申请号：US12080002
申请日：2008-03-31
申请人： Chang-Yueh Chan , Chien-Ping Huang , Chih-Ming Huang , Cheng-Hsu Hsiao
发明人： Chang-Yueh Chan , Chien-Ping Huang , Chih-Ming Huang , Cheng-Hsu Hsiao
IPC分类号： H01L31/0203 , H01L31/18
CPC分类号： H01L27/14618 , B81C1/00888 , B81C2203/0118 , H01L23/3114 , H01L24/11 , H01L27/14683 , H01L2224/05001 , H01L2224/05008 , H01L2224/05024 , H01L2224/05026 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05184 , H01L2224/05548 , H01L2224/05569 , H01L2224/05644 , H01L2224/05655 , H01L2924/14 , H01L2924/00 , H01L2924/00014 , H01L2924/01074 , H01L2924/01023
摘要： A sensor-type semiconductor device and manufacturing method thereof are disclosed. The method includes providing a wafer comprising a plurality of sensor chips; forming concave grooves between the solder pads formed on the active surface of adjacent sensor chips; filling a filling material into the concave grooves and forming first conductive circuits electrically connecting the solder pads of adjacent sensor chips; mounting a light permeable body on the active surface of the wafer and thinning the non-active surface of the wafer to expose the filling material; mounting the wafer on a carrier board with second conductive circuits formed thereon corresponding in position to the filling material; forming first openings by cutting the light permeable body and the wafer to a position at which the second conductive circuits are located; forming metallic layers in the first openings by electroplating, the metallic layers electrically connecting the first and second conductive circuits of adjacent sensor chips; forming second openings by cutting the metallic layers to break the first conductive circuit connections and the second conductive circuit connections of adjacent sensor chips and meanwhile keep the first and second conductive circuits of each sensor chip still electrically connected through the metallic layers; filling a dielectric material into the second openings and removing the carrier board; and separating each of the sensor chips to form a plurality of sensor-type semiconductor devices. The invention overcomes the drawbacks of the prior art such as slanting notches formed on the non-active surface of the wafer, displacement of the notches due to the difficulty in precise alignment, as well as broken joints caused by concentrated stress generated in the slanting notches and exposed circuits.
摘要翻译：公开了一种传感器型半导体器件及其制造方法。该方法包括提供包括多个传感器芯片的晶片; 在形成在相邻传感器芯片的有效表面上的焊盘之间形成凹槽; 将填充材料填充到凹槽中并形成电连接相邻传感器芯片的焊盘的第一导电电路; 将透光体安装在晶片的活性表面上并使晶片的非活性表面变薄以暴露填充材料; 将晶片安装在载体板上，其上形成有对应于位于填充材料的第二导电电路; 通过将透光体和晶片切割到第二导电电路所在的位置来形成第一开口; 通过电镀在第一开口中形成金属层，金属层电连接相邻传感器芯片的第一和第二导电电路; 通过切割金属层来形成第二开口，以破坏相邻传感器芯片的第一导电电路连接和第二导电电路连接，同时保持每个传感器芯片的第一和第二导电电路通过金属层电连接; 将电介质材料填充到第二开口中并移除载体板; 并分离每个传感器芯片以形成多个传感器型半导体器件。本发明克服了现有技术的缺点，例如在晶片的非活性表面上形成的倾斜凹口，由于难以精确对准而导致的凹口位移以及由倾斜凹口产生的集中应力引起的断裂接头和暴露电路。

12. 发明授权

US08653661B2 Package having MEMS element and fabrication method thereof 有权
标题翻译：具有MEMS元件的封装及其制造方法
公开(公告)号：US08653661B2
公开(公告)日：2014-02-18
申请号：US13170424
申请日：2011-06-28
申请人： Chang-Yueh Chan , Chien-Ping Huang , Chun-Chi Ke , Shih-Kuang Chiu
发明人： Chang-Yueh Chan , Chien-Ping Huang , Chun-Chi Ke , Shih-Kuang Chiu
IPC分类号： H01L21/56
CPC分类号： B81C1/00301 , B81B2207/096 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2924/1461 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A package structure having an MEMS element is provided, which includes: a protection layer having openings formed therein; conductors formed in the openings, respectively; conductive pads formed on the protection layer and the conductors; a MEMS chip disposed on the conductive pads; and an encapsulant formed on the protection layer for encapsulating the MEMS chip. By disposing the MEMS chip directly on the protection layer to dispense with the need for a carrier, such as a wafer or a circuit board that would undesirably add to the thickness, the present invention reduces the overall thickness of the package to thereby achieve miniaturization.
摘要翻译：提供了具有MEMS元件的封装结构，其包括：形成有开口的保护层; 导体分别形成在开口中; 形成在保护层和导体上的导电焊盘; 设置在导电焊盘上的MEMS芯片; 以及形成在用于封装MEMS芯片的保护层上的密封剂。通过将MEMS芯片直接设置在保护层上，以免对不希望地增加厚度的载体（例如晶片或电路板）的需要，本发明减小了封装的整体厚度从而实现小型化。

13. 发明授权

US08154115B1 Package structure having MEMS element and fabrication method thereof 有权
标题翻译：具有MEMS元件的封装结构及其制造方法
公开(公告)号：US08154115B1
公开(公告)日：2012-04-10
申请号：US13024672
申请日：2011-02-10
申请人： Chang-Yueh Chan , Chien-Ping Huang , Chun-Chi Ke , Shih-Kuang Chiu
发明人： Chang-Yueh Chan , Chien-Ping Huang , Chun-Chi Ke , Shih-Kuang Chiu
IPC分类号： H01L23/12
CPC分类号： B81B7/007 , B81C2203/0154 , H01L2224/48091 , H01L2924/1461 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
摘要： A package structure having an MEMS element includes: a chip having at least an MEMS element and a plurality of first conductive pads; a lid disposed on the chip to cover the MEMS element and having a plurality of second conductive pads formed thereon; a plurality of bonding wires electrically connecting the first and second conductive pads; a plurality of first bumps disposed on the second conductive pads, respectively; an encapsulant formed on the chip to encapsulate the lid, the bonding wires, the first and second conductive pads and the first bumps while exposing the top surfaces of the first bumps; and a plurality of circuits formed on the encapsulant and electrically connecting to the exposed first bumps, thereby avoiding the conventional drawback of electrical connection failure caused by position deviation of bonding wires due to mold flow of the encapsulant.
摘要翻译：具有MEMS元件的封装结构包括：具有至少MEMS元件和多个第一导电焊盘的芯片; 设置在所述芯片上以覆盖所述MEMS元件并且具有形成在其上的多个第二导电焊盘的盖; 电连接第一和第二导电焊盘的多个接合线; 分别设置在第二导电焊盘上的多个第一凸块; 密封剂，形成在所述芯片上以封装所述盖，所述接合线，所述第一和第二导电焊盘和所述第一凸起，同时暴露所述第一凸块的顶表面; 以及形成在密封剂上并与露出的第一凸起电连接的多个电路，从而避免了由于密封剂的模具流动导致的接合线的位置偏移导致的电连接故障的常规缺点。

14. 发明申请

US20120286425A1 PACKAGE HAVING MEMS ELEMENT AND FABRICATION METHOD THEREOF 有权
标题翻译：具有MEMS元件的封装及其制造方法
公开(公告)号：US20120286425A1
公开(公告)日：2012-11-15
申请号：US13170424
申请日：2011-06-28
申请人： Chang-Yueh Chan , Chien-Ping Huang , Chun-Chi Ke , Shih-Kuang Chiu
发明人： Chang-Yueh Chan , Chien-Ping Huang , Chun-Chi Ke , Shih-Kuang Chiu
IPC分类号： H01L23/498 , H01L21/56
CPC分类号： B81C1/00301 , B81B2207/096 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2924/1461 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A package structure having an MEMS element is provided, which includes: a protection layer having openings formed therein; conductors formed in the openings, respectively; conductive pads formed on the protection layer and the conductors; a MEMS chip disposed on the conductive pads; and an encapsulant formed on the protection layer for encapsulating the MEMS chip. By disposing the MEMS chip directly on the protection layer to dispense with the need for a carrier, such as a wafer or a circuit board that would undesirably add to the thickness, the present invention reduces the overall thickness of the package to thereby achieve miniaturization.
摘要翻译：提供了具有MEMS元件的封装结构，其包括：形成有开口的保护层; 导体分别形成在开口中; 形成在保护层和导体上的导电焊盘; 设置在导电焊盘上的MEMS芯片; 以及形成在用于封装MEMS芯片的保护层上的密封剂。通过将MEMS芯片直接设置在保护层上，以免对不希望地增加厚度的载体（例如晶片或电路板）的需要，本发明减小了封装的整体厚度从而实现了小型化。

15. 发明申请

US20080283982A1 Multi-chip semiconductor device having leads and method for fabricating the same 审中-公开
标题翻译：具有引线的多芯片半导体器件及其制造方法
公开(公告)号：US20080283982A1
公开(公告)日：2008-11-20
申请号：US12152802
申请日：2008-05-15
申请人： Chung-Lun Liu , Chin-Huang Chang , Chien-Ping Huang , Chang-Yueh Chan , Chih-Ming Huang
发明人： Chung-Lun Liu , Chin-Huang Chang , Chien-Ping Huang , Chang-Yueh Chan , Chih-Ming Huang
IPC分类号： H01L21/58 , H01L23/495
CPC分类号： H05K1/141 , H01L23/3121 , H01L23/49811 , H01L23/49816 , H01L23/49861 , H01L24/48 , H01L24/81 , H01L24/85 , H01L24/97 , H01L25/0655 , H01L2224/48091 , H01L2224/48247 , H01L2224/81801 , H01L2224/85 , H01L2224/97 , H01L2924/00014 , H01L2924/01033 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H05K3/3421 , H05K3/3436 , H05K2201/1034 , H05K2201/10659 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention proposes a multi-chip semiconductor device having leads and a method for fabricating the same. The method includes the steps of: providing a substrate having a plurality of connection pads disposed on a surface thereof; mounting a plurality of semiconductor chips on the surface of the substrate, and electrically connecting the semiconductor chips to the surface of the substrate; forming an encapsulant on the substrate to encapsulate the semiconductor chips and expose the connection pads to form a package unit; and providing a lead frame having a plurality of leads, and electrically connecting the connection pads exposed from the package unit to the leads of the lead frame to form a multi-chip semiconductor device having leads, thereby forming a multi-chip semiconductor device having leads. By the multi-chip semiconductor device and the method for fabricating the same as proposed in the present invention, problems like poor reliability caused by stress induced by several types of materials in a semiconductor package into which a substrate and leads are integrated, moisture absorption by an encapsulated substrate, and cracks developed as a result of moisture absorption by the substrate can be avoided.
摘要翻译：本发明提出一种具有引线的多芯片半导体器件及其制造方法。该方法包括以下步骤：提供具有设置在其表面上的多个连接焊盘的基板; 将多个半导体芯片安装在所述基板的表面上，并且将所述半导体芯片电连接到所述基板的表面; 在衬底上形成密封剂以封装半导体芯片并暴露连接焊盘以形成封装单元; 并且提供具有多个引线的引线框架，并且将从封装单元暴露的连接焊盘电连接到引线框架的引线以形成具有引线的多芯片半导体器件，从而形成具有引线的多芯片半导体器件。通过本发明中提出的多芯片半导体器件及其制造方法，由半导体封装中由几种材料引起的应力引起的可靠性差的问题，其中衬底和引线被集成到其中，由于可以避免被封装的基材和由于基材吸湿而显影的裂纹。

16. 发明申请

US20090039527A1 Sensor-type package and method for fabricating the same 审中-公开
标题翻译：传感器型封装及其制造方法
公开(公告)号：US20090039527A1
公开(公告)日：2009-02-12
申请号：US12221725
申请日：2008-08-06
申请人： Chang-Yueh Chan , Chien-Ping Huang , Tse-Wen Chang , Chin-Huang Chang , Chih-Ming Huang
发明人： Chang-Yueh Chan , Chien-Ping Huang , Tse-Wen Chang , Chin-Huang Chang , Chih-Ming Huang
IPC分类号： H01L23/52 , H01L21/00
CPC分类号： H01L27/14618 , H01L27/14625 , H01L27/14683 , H01L2224/05001 , H01L2224/056 , H01L2224/13 , H01L2224/13025 , H01L2224/16146 , H01L2224/94 , H01L2224/97 , H01L2924/19104 , H01L2924/19105 , H01L2924/00014 , H01L2224/81 , H01L2224/83
摘要： A sensor-type package and a method for fabricating the same are provided. A wafer having a plurality of semiconductor chips is provided, wherein a plurality of holes are formed on a first surface of each of the semiconductor chips, and a plurality of metallic pillars formed in the holes and a plurality of bond pads connected to the metallic pillars form through silicon vias (TSVs). A groove is formed on a second surface of each of the semiconductor chips to expose the metallic pillars. A plurality of sensor chips having TSVs are stacked in the grooves of the semiconductor chips and electrically connected to the exposed metallic pillars. A transparent cover is mounted onto the second surfaces of the semiconductor chips to cover the grooves. A plurality of conductive components are implanted on the bond pads of the semiconductor chips. The wafer is cut along borders among the semiconductor chips.
摘要翻译：提供了一种传感器型封装及其制造方法。提供具有多个半导体芯片的晶片，其中在每个半导体芯片的第一表面上形成多个孔，并且形成在孔中的多个金属柱和连接到金属柱的多个接合焊盘通过硅通孔（TSV）形成。在每个半导体芯片的第二表面上形成凹槽以暴露金属柱。具有TSV的多个传感器芯片堆叠在半导体芯片的凹槽中并电连接到暴露的金属柱。透明盖安装在半导体芯片的第二表面上以覆盖凹槽。在半导体芯片的接合焊盘上注入多个导电元件。在半导体芯片之间沿着边缘切割晶片。

17. 发明申请

US20080230913A1 Stackable semiconductor device and fabrication method thereof 审中-公开
标题翻译：可堆叠半导体器件及其制造方法
公开(公告)号：US20080230913A1
公开(公告)日：2008-09-25
申请号：US12077223
申请日：2008-03-18
申请人： Chien-Ping Huang , Chin-Huang Chang , Chih-Ming Huang , Chun-Chi Ke
发明人： Chien-Ping Huang , Chin-Huang Chang , Chih-Ming Huang , Chun-Chi Ke
IPC分类号： H01L23/488 , H01L21/304
CPC分类号： H01L21/78 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/11 , H01L24/12 , H01L24/48 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2221/68372 , H01L2224/05001 , H01L2224/05147 , H01L2224/05155 , H01L2224/05611 , H01L2224/1147 , H01L2224/1184 , H01L2224/1308 , H01L2224/13083 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/2518 , H01L2224/48091 , H01L2224/48227 , H01L2224/81203 , H01L2224/81801 , H01L2225/06513 , H01L2225/06551 , H01L2225/06562 , H01L2924/00013 , H01L2924/00014 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2224/13099 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The invention provides a stackable semiconductor device and a fabrication method thereof, including providing a wafer having a plurality of dies mounted thereon, both the die and the wafer having an active surface and a non-active surface opposing one another respectively, wherein each die has a plurality of solder pads formed on the active surface thereof and a groove formed between adjacent solder pads to form a first metal layer therein that is electrically connected to the solder pads; subsequently thinning the non-active surface of the wafer to where the grooves are located to expose the first metal layer therefrom, and forming a second metal layer on the non-active surface of the wafer for electrically connecting with the first metal layer; and separating the dies to form a plurality of stackable semiconductor devices. Thereby, the first and second metal layers formed on the active surface and the non-active surface of the semiconductor device can be stacked and connected to constitute a multi-die stack structure, thereby increasing integration without increasing the area of the stacked dies. Further, the problems known in the prior art of poor electrical connection, complicated manufacturing process and increased cost as a result of using wire bonding and TSV can be avoided.
摘要翻译：本发明提供了一种可堆叠半导体器件及其制造方法，包括提供具有安装在其上的多个管芯的晶片，晶粒和晶片两者分别具有相互相对的有源表面和非有效表面，其中每个管芯具有形成在其有效表面上的多个焊盘和形成在相邻焊盘之间的槽，以在其中形成电连接到焊盘的第一金属层; 随后使所述晶片的非活性表面变薄到所述凹槽所在的位置以暴露出所述第一金属层，以及在所述晶片的非活性表面上形成用于与所述第一金属层电连接的第二金属层; 以及分离所述管芯以形成多个可堆叠的半导体器件。由此，形成在半导体器件的有源表面和非有源表面上的第一和第二金属层可以被堆叠和连接以构成多管芯堆叠结构，从而增加集成度而不增加堆叠管芯的面积。此外，可以避免由于使用引线接合和TSV而导致的不良电连接，复杂的制造工艺和增加的成本的现有技术中已知的问题。

18. 发明申请

US20070164386A1 Semiconductor device and fabrication method thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20070164386A1
公开(公告)日：2007-07-19
申请号：US11648045
申请日：2006-12-28
申请人： Cheng-Yi Chang , Chien-Ping Huang , Yu-Po Wang , Chih-Ming Huang , Cheng-Hsu Hsiao
发明人： Cheng-Yi Chang , Chien-Ping Huang , Yu-Po Wang , Chih-Ming Huang , Cheng-Hsu Hsiao
IPC分类号： H01L31/0203 , H01L21/56
CPC分类号： H01L27/14687 , H01L24/97 , H01L27/14618 , H01L2224/48091 , H01L2224/48227 , H01L2224/8592 , H01L2224/97 , H01L2924/01033 , H01L2924/15311 , H01L2924/16195 , H01L2224/85 , H01L2924/00014
摘要： A semiconductor device and the fabrication method thereof are provided. The fabrication method includes providing a substrate module plate having a plurality of substrates; attaching at least one sensor chip to each of the substrates of the substrate module plate; electrically connecting each of the sensor chips to each of the substrates through bonding wires; forming an insulating layer between each sensor chip on the substrate module plate, wherein the height of the insulating layers are not greater than the thickness of the sensor chips so as to prevent flash from the insulating layers from contaminating the sensor chips; forming an adhesive lip on the insulating layer or forming a second insulating layer followed by forming the adhesive layer, wherein the adhesive layer or the second insulating layer is higher than the highest loop-height of the bonding wires; adhering a light transmitting cover to each adhesive layer to cover the sensor chip; and cutting the substrate module plate to separate the substrates to form a plurality of semiconductor devices each integrated with at least one sensor chip. As the adhesive layers are not in contact with the bonding wires, the problems of damaging or breaking the bonding wires can be prevented in the process of adhering the light transmitting cover.
摘要翻译：提供半导体器件及其制造方法。该制造方法包括提供具有多个基板的基板模块板; 将至少一个传感器芯片附接到所述基板模块板的每个基板; 通过接合线将每个传感器芯片电连接到每个基板; 在衬底模块板上的每个传感器芯片之间形成绝缘层，其中绝缘层的高度不大于传感器芯片的厚度，以防止来自绝缘层的闪光污染传感器芯片; 在所述绝缘层上形成粘合剂唇缘或形成第二绝缘层，接着形成所述粘合剂层，其中所述粘合剂层或所述第二绝缘层高于所述接合线的最高环高度; 将透光盖粘附到每个粘合剂层以覆盖传感器芯片; 以及切割所述基板模块板以分离所述基板以形成多个半导体器件，每个半导体器件与至少一个传感器芯片集成。由于粘合层不与接合线接触，所以在粘接透光罩的过程中可以防止损坏或断裂接合线的问题。

19. 发明申请

US20070138632A1 Electronic carrier board and package structure thereof 审中-公开
标题翻译：电子载板及其封装结构
公开(公告)号：US20070138632A1
公开(公告)日：2007-06-21
申请号：US11642439
申请日：2006-12-19
申请人： Fang-Lin Tsai , Ho-Yi Tsai , Chih-Ming Huang , Chien-Ping Huang , Cheng-Hsu Hsiao
发明人： Fang-Lin Tsai , Ho-Yi Tsai , Chih-Ming Huang , Chien-Ping Huang , Cheng-Hsu Hsiao
IPC分类号： H01L23/34
CPC分类号： H05K3/3452 , H05K3/284 , H05K3/303 , H05K2201/0989 , H05K2201/10636 , H05K2201/10727 , H05K2201/2036 , Y02P70/611 , Y02P70/613
摘要： An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. An opening is formed in the protective layer to expose at least three sides of each of the paired bond pads. The protective layer includes at least one independent residual portion located in the opening and between the paired bond pads, such that an electronic component is mounted on the independent residual portion and electrically connected to the bond pads. A groove without a dead space is formed between the electronic component and the carrier, such that a molding compound for encapsulating the electronic component can flow through the groove to fill the opening and a space under the electronic component and encapsulate the at least three sides of each of the bond pads.
摘要翻译：提供电子载体板及其封装结构。电子载板包括载体，形成在载体上的至少一对接合焊盘和覆盖载体的保护层。在保护层中形成开口以暴露每个配对接合焊盘的至少三个侧面。保护层包括至少一个独立的残留部分，位于开口内和成对的接合焊盘之间，使得电子部件安装在独立的残留部分上并电连接到接合焊盘。在电子部件和载体之间形成没有死空间的凹槽，使得用于封装电子部件的模制化合物可以流过凹槽以填充开口和电子部件下方的空间，并将至少三个侧面每个接合垫。

20. 发明申请

US20080258306A1 Semiconductor Device and Method for Fabricating the Same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080258306A1
公开(公告)日：2008-10-23
申请号：US12105538
申请日：2008-04-18
申请人： Chin-Huang Chang , Chien-Ping Huang , Chih-Ming Huang , Cheng-Hsu Hsiao , Cheng-Chia Chiang
发明人： Chin-Huang Chang , Chien-Ping Huang , Chih-Ming Huang , Cheng-Hsu Hsiao , Cheng-Chia Chiang
IPC分类号： H01L23/538 , H01L21/56
CPC分类号： H01L23/3114 , H01L21/6835 , H01L23/3135 , H01L23/3185 , H01L24/24 , H01L24/48 , H01L24/82 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2224/02371 , H01L2224/04105 , H01L2224/05001 , H01L2224/05008 , H01L2224/05023 , H01L2224/05026 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05184 , H01L2224/05548 , H01L2224/05569 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05684 , H01L2224/12105 , H01L2224/16145 , H01L2224/48091 , H01L2224/82001 , H01L2224/97 , H01L2225/06562 , H01L2225/1058 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15311 , H01L2224/82 , H01L2924/01028 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention provides a semiconductor device and a method for fabricating the same. The semiconductor device includes a chip having an active surface and an opposing non-active surface, wherein a plurality of bond pads are formed on the active surface, and first metal layers are formed on the bond pads and to edges of the non-active surface; conductive traces disposed on the non-active surface of the chip; a dielectric layer covering sides of the chip and formed with a plurality of openings therein to expose a portion of the conductive traces; and a plurality of second metal layers formed in the openings of the dielectric layer and on the first metal layers, such that the bond pads are electrically connected to the conductive traces via the first and second metal layers.
摘要翻译：本发明提供一种半导体器件及其制造方法。半导体器件包括具有活性表面和相对的非活性表面的芯片，其中在有源表面上形成多个接合焊盘，并且第一金属层形成在接合焊盘和非活性表面的边缘上 ; 布置在芯片的非有源表面上的导电迹线; 介电层，其覆盖所述芯片的侧面并在其中形成有多个开口以暴露所述导电迹线的一部分; 以及多个第二金属层，形成在电介质层的开口中和第一金属层上，使得接合焊盘经由第一和第二金属层电连接到导电迹线。

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