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11. 发明授权

US07619294B1 Shallow trench isolation structure with low trench parasitic capacitance 失效
标题翻译：浅沟槽隔离结构具有低沟槽寄生电容
公开(公告)号：US07619294B1
公开(公告)日：2009-11-17
申请号：US11262173
申请日：2005-10-28
申请人： Venkatesh P. Gopinath , Arvind Kamath , Mohammad R. Mirabedini , Ming-Yi Lee
发明人： Venkatesh P. Gopinath , Arvind Kamath , Mohammad R. Mirabedini , Ming-Yi Lee
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： Provided are methods and composition for forming an isolation structure on an integrated circuit substrate. First, a trench is etched in the integrated circuit substrate. A lower dielectric layer is then formed in the trench such that the lower dielectric layer at least partially fills the trench. An upper dielectric layer is then formed over the lower dielectric layer to create an isolation structure, the upper dielectric layer and the lower dielectric layer together having an effective dielectric constant that is less than that of silicon dioxide, thereby enabling capacitance associated with the isolation structure to be reduced.
摘要翻译：提供了用于在集成电路基板上形成隔离结构的方法和组合物。首先，在集成电路基板中蚀刻沟槽。然后在沟槽中形成下介电层，使得下电介质层至少部分地填充沟槽。然后在下介电层上形成上电介质层以产生隔离结构，上电介质层和下电介质层一起具有小于二氧化硅的有效介电常数，从而实现与隔离结构相关联的电容要减少

12. 发明授权

US06656805B2 METHOD OF REDUCING SILICON OXYNITRIDE GATE INSULATOR THICKNESS IN SOME TRANSISTORS OF A HYBRID INTEGRATED CIRCUIT TO OBTAIN INCREASED DIFFERENTIAL IN GATE INSULATOR THICKNESS WITH OTHER TRANSISTORS OF THE HYBRID CIRCUIT 失效
公开(公告)号：US06656805B2
公开(公告)日：2003-12-02
申请号：US10304631
申请日：2002-11-26
申请人： Arvind Kamath , Rajiv Patel , Ravindra M. Kapre
发明人： Arvind Kamath , Rajiv Patel , Ravindra M. Kapre
IPC分类号： H01L21336
CPC分类号： H01L21/823462
摘要： A relatively thin gate insulator of a digital switching transistor is formed from a layer of silicon oxynitride which was initially formed by implanting nitrogen atoms in a silicon substrate and oxidizing the nitrogen and silicon. It has been discovered that an outer layer of silicon dioxide is formed as a part of the silicon oxynitride layer. Removing this outer layer of silicon dioxide from the silicon oxynitride layer leaves a thin remaining layer of substantially-only silicon oxynitride as the gate insulator. Thinner gate insulators of approximately 15-21 angstroms, for example, can be formed from a grown thickness of 60 angstroms, for example. Gate insulators for digital and analog transistors may be formed simultaneously with a greater differential in thickness been possible by using conventional nitrogen implantation techniques.

13. 发明授权

US06586291B1 High density memory with storage capacitor 有权
标题翻译：具有存储电容器的高密度存储器
公开(公告)号：US06586291B1
公开(公告)日：2003-07-01
申请号：US10214618
申请日：2002-08-08
申请人： Arvind Kamath , Ruggero Castagnetti
发明人： Arvind Kamath , Ruggero Castagnetti
IPC分类号： H01L218238
CPC分类号： H01L27/1087 , H01L27/10894 , H01L29/66181
摘要： A memory cell having a transistor and a capacitor formed in a silicon substrate. The capacitor is formed with a lower electrically conductive plate etched in a projected surface area of the silicon substrate. The lower electrically conductive plate has at least one cross section in the shape of a vee, where the sides of the vee are disposed at an angle of about fifty-five degrees from a top surface of the silicon substrate. The surface area of the lower electrically conductive plate is about seventy-three percent larger than the projected surface area of the silicon substrate in which the lower electrically conductive plate is etched. A capacitor dielectric layer is formed of a first deposited dielectric layer, which is disposed adjacent the lower electrically conductive plate. A top electrically conductive plate is disposed adjacent the capacitor dielectric layer and opposite the lower electrically conductive plate. A transistor is formed having source and drain regions separated by a channel region, and a gate dielectric layer formed of the first deposited dielectric layer.
摘要翻译：具有在硅衬底中形成的晶体管和电容器的存储单元。电容器形成有在硅衬底的投影表面区域中蚀刻的下导电板。下导电板具有至少一个vee形状的横截面，其中，vee的侧面与硅衬底的顶表面成约五十五度的角度。下导电板的表面积比其中蚀刻下导电板的硅衬底的投影表面积大约百分之七十三。电容器介电层由邻近下导电板设置的第一沉积介电层形成。顶部导电板设置在电容器电介质层附近并与下部导电板相对。晶体管形成为具有由沟道区域分离的源极和漏极区域以及由第一沉积介电层形成的栅极电介质层。

14. 发明授权

US06562729B2 Silicon nitride and silicon dioxide gate insulator transistors and method of forming same in a hybrid integrated circuit 有权
公开(公告)号：US06562729B2
公开(公告)日：2003-05-13
申请号：US10171700
申请日：2002-06-14
申请人： Arvind Kamath , Rajiv Patel , Mohammad Mirabedini
发明人： Arvind Kamath , Rajiv Patel , Mohammad Mirabedini
IPC分类号： H01L2131
CPC分类号： H01L21/823462
摘要： Silicon nitride gate insulators for digital transistors and silicon dioxide gate insulators for analog transistors of a hybrid integrated circuit (IC) are formed in a single integrated fabrication process. A first area of a silicon substrate of the IC is exposed while a second area is initially covered by a silicon dioxide layer. A layer of silicon nitride is formed on the exposed first area while the initial silicon dioxide layer inhibits the formation of silicon nitride on the second area. Thereafter the initial silicon dioxide layer is removed from the second area to allow a new silicon dioxide layer to be formed there from the exposed silicon substrate. The silicon dioxide layer shields against the adverse influences from silicon nitride formation and permits the initial silicon dioxide layer to be removed by etching. The silicon nitride layer shields against the adverse influences of oxidizing new silicon dioxide layer. A slight, beneficial silicon dioxide interface is created between the silicon nitride and the silicon substrate as a result of oxidizing the new layer of silicon dioxide.

15. 发明授权

US06436845B1 Silicon nitride and silicon dioxide gate insulator transistors and method of forming same in a hybrid integrated circuit 有权
公开(公告)号：US06436845B1
公开(公告)日：2002-08-20
申请号：US09723516
申请日：2000-11-28
申请人： Arvind Kamath , Rajiv Patel , Mohammad Mirabedini
发明人： Arvind Kamath , Rajiv Patel , Mohammad Mirabedini
IPC分类号： H01L2131
CPC分类号： H01L21/823462
摘要： Silicon nitride gate insulators for digital transistors and silicon dioxide gate insulators for analog transistors of a hybrid integrated circuit (IC) are formed in a single integrated fabrication process. A first area of a silicon substrate of the IC is exposed while a second area is initially covered by a silicon dioxide layer. A layer of silicon nitride is formed on the exposed first area while the initial silicon dioxide layer inhibits the formation of silicon nitride on the second area. Thereafter the initial silicon dioxide layer is removed from the second area to allow a new silicon dioxide layer to be formed there from the exposed silicon substrate. The silicon dioxide layer shields against the adverse influences from silicon nitride formation and permits the initial silicon dioxide layer to be removed by etching. The silicon nitride layer shields against the adverse influences of oxidizing new silicon dioxide layer. A slight, beneficial silicon dioxide interface is created between the silicon nitride and the silicon substrate as a result of oxidizing the new layer of silicon dioxide.

16. 发明授权

US09165238B2 Methods for manufacturing RFID tags and structures formed therefrom 有权
标题翻译：用于制造由其形成的RFID标签和结构的方法
公开(公告)号：US09165238B2
公开(公告)日：2015-10-20
申请号：US12689703
申请日：2010-01-19
申请人： James Montague Cleeves , J. Devin MacKenzie , Arvind Kamath
发明人： James Montague Cleeves , J. Devin MacKenzie , Arvind Kamath
IPC分类号： H01L21/3205 , G06K19/077 , H01F17/00
CPC分类号： H01L27/1255 , G06K19/073 , G06K19/07749 , H01F17/0006 , H01L23/13 , H01L23/142 , H01L23/66 , H01L27/127 , H01L27/1292 , H01L28/60 , H01L29/66143 , H01L29/66742 , H01L29/78696 , H01L29/872 , H01L2223/6611 , H01L2223/6677 , H01L2924/0002 , H01L2924/00
摘要： Radio frequency identification (RFID) tags and processes for manufacturing the same. The RFID device generally includes (1) a metal antenna and/or inductor; (2) a dielectric layer thereon, to support and insulate integrated circuitry from the metal antenna and/or inductor; (3) a plurality of diodes and a plurality of transistors on the dielectric layer, the diodes having at least one layer in common with the transistors; and (4) a plurality of capacitors in electrical communication with the metal antenna and/or inductor and at least some of the diodes, the plurality of capacitors having at least one layer in common with the plurality of diodes and/or with contacts to the diodes and transistors. The method preferably integrates liquid silicon-containing ink deposition into a cost effective, integrated manufacturing process for the manufacture of RFID circuits. Furthermore, the present RFID tags generally provide higher performance (e.g., improved electrical characteristics) as compared to tags containing organic electronic devices.
摘要翻译：射频识别（RFID）标签及其制造方法。 RFID设备通常包括（1）金属天线和/或电感器; （2）其上的介电层，用于支撑和绝缘来自金属天线和/或电感器的集成电路; （3）介电层上的多个二极管和多个晶体管，二极管具有至少一个与晶体管共同的层; 和（4）与金属天线和/或电感器以及至少一些二极管电连通的多个电容器，所述多个电容器具有与所述多个二极管共同的至少一个层和/或与所述多个二极管的触点二极管和晶体管。该方法优选将液态含硅油墨沉积物集成到用于制造RFID电路的成本有效的集成制造工艺中。此外，与含有机电子器件的标签相比，本RFID标签通常提供更高的性能（例如，改进的电气特性）。

17. 发明申请

US20140299883A1 PRINTED, SELF-ALIGNED, TOP GATE THIN FILM TRANSISTOR 审中-公开
标题翻译：打印，自对准，顶盖薄膜晶体管
公开(公告)号：US20140299883A1
公开(公告)日：2014-10-09
申请号：US14311044
申请日：2014-06-20
申请人： Joerg ROCKENBERGER , James Montague Cleeves , Arvind Kamath
发明人： Joerg ROCKENBERGER , James Montague Cleeves , Arvind Kamath
IPC分类号： H01L29/786
CPC分类号： H01L29/7866 , B82Y10/00 , H01L27/1248 , H01L27/1292 , H01L29/458 , H01L29/4908 , H01L29/66757 , H01L29/78681 , H01L29/7869
摘要： A self-aligned top-gate thin film transistor (TFT) and a method of forming such a thin film transistor, by forming a semiconductor thin film layer; printing a doped glass pattern thereon, a gap in the doped glass pattern defining a channel region of the TFT; forming a gate electrode on or over the channel region, the gate electrode comprising a gate dielectric film and a gate conductor thereon; and diffusing a dopant from the doped glass pattern into the semiconductor thin film layer.
摘要翻译：一种自对准顶栅薄膜晶体管（TFT）和通过形成半导体薄膜层形成这种薄膜晶体管的方法; 在其上印刷掺杂的玻璃图案，所述掺杂玻璃图案中的间隙限定所述TFT的沟道区域; 在沟道区域上或上方形成栅电极，栅电极在其上包括栅介质膜和栅极导体; 并且将掺杂剂从掺杂的玻璃图案扩散到半导体薄膜层中。

18. 发明申请

US20130069785A1 High Reliability Surveillance and/or Identification Tag/Devices and Methods of Making and Using the Same 有权
公开(公告)号：US20130069785A1
公开(公告)日：2013-03-21
申请号：US13590006
申请日：2012-08-20
申请人： Vivek SUBRAMANIAN , Patrick Smith , Vikram Pavate , Arvind Kamath , Criswell Choi , Aditi Chandra , James Montague Cleeves
发明人： Vivek SUBRAMANIAN , Patrick Smith , Vikram Pavate , Arvind Kamath , Criswell Choi , Aditi Chandra , James Montague Cleeves
IPC分类号： G08B13/24 , G06K19/067
CPC分类号： G08B13/2431 , G06K19/067 , G06K19/07749 , G08B13/242 , G08B13/2437
摘要： The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods and devices of the present invention improve the manufacturing tolerances associated with conventional metal-plastic-metal capacitor, as well as the deactivation reliability of the capacitor used in a surveillance/identification tag or device.

19. 发明申请

US20120181636A1 Printing of Contact Metal and Interconnect Metal Via Seed Printing and Plating 有权
标题翻译：通过种子印刷和电镀印刷接触金属和互连金属
公开(公告)号：US20120181636A1
公开(公告)日：2012-07-19
申请号：US13427091
申请日：2012-03-22
申请人： Aditi Chandra , Arvind Kamath , James Montague Cleeves , Joerg Rockenberger , Mao Takashima , Erik Scher
发明人： Aditi Chandra , Arvind Kamath , James Montague Cleeves , Joerg Rockenberger , Mao Takashima , Erik Scher
IPC分类号： H01L29/772 , H01L23/485 , H01L21/336
CPC分类号： H01L21/288 , H01L21/28518 , H01L21/32051 , H01L21/32053 , H01L21/76838 , H01L21/76873 , H01L21/76895 , H01L27/1285 , H01L27/1292 , H01L29/458 , H01L29/78618 , H01L2924/0002 , H01L2924/00
摘要： Methods of forming contacts (and optionally, local interconnects) using an ink comprising a silicide-forming metal, electrical devices such as diodes and/or transistors including such contacts and (optional) local interconnects, and methods for forming such devices are disclosed. Electrical devices, such as diodes and transistors may be made using such printed contact and/or local interconnects. A metal ink may be printed for contacts as well as for local interconnects at the same time, or in the alternative, the printed metal can act as a seed for electroless deposition of other metals if different metals are desired for the contact and the interconnect lines. This approach advantageously reduces the number of processing steps and does not necessarily require any etching.
摘要翻译：公开了使用包含硅化物形成金属的油墨形成触点（和任选的局部互连）的方法，诸如二极管和/或包括这种触点的晶体管的电气器件，（可选的）局部互连）以及用于形成这种器件的方法。可以使用这种印刷的接触和/或局部互连来制造电子器件，例如二极管和晶体管。金属墨水可以同时印刷以用于接触以及局部互连，或者替代地，如果需要用于接触和互连线的不同金属，印刷金属可以用作其它金属的无电沉积的种子。这种方法有利地减少了处理步骤的数量，并且不一定需要任何蚀刻。

20. 发明申请

US20100148859A1 Methods for Manufacturing RFID Tags and Structures Formed Therefrom 有权
标题翻译：制造RFID标签和结构的方法
公开(公告)号：US20100148859A1
公开(公告)日：2010-06-17
申请号：US12689703
申请日：2010-01-19
申请人： James Montague CLEEVES , J. Devin MacKenzie , Arvind Kamath
发明人： James Montague CLEEVES , J. Devin MacKenzie , Arvind Kamath
IPC分类号： H01L25/00 , H01L27/06
CPC分类号： H01L27/1255 , G06K19/073 , G06K19/07749 , H01F17/0006 , H01L23/13 , H01L23/142 , H01L23/66 , H01L27/127 , H01L27/1292 , H01L28/60 , H01L29/66143 , H01L29/66742 , H01L29/78696 , H01L29/872 , H01L2223/6611 , H01L2223/6677 , H01L2924/0002 , H01L2924/00
摘要： Radio frequency identification (RFID) tags and processes for manufacturing the same. The RFID device generally includes (1) a metal antenna and/or inductor; (2) a dielectric layer thereon, to support and insulate integrated circuitry from the metal antenna and/or inductor; (3) a plurality of diodes and a plurality of transistors on the dielectric layer, the diodes having at least one layer in common with the transistors; and (4) a plurality of capacitors in electrical communication with the metal antenna and/or inductor and at least some of the diodes, the plurality of capacitors having at least one layer in common with the plurality of diodes and/or with contacts to the diodes and transistors. The method preferably integrates liquid silicon-containing ink deposition into a cost effective, integrated manufacturing process for the manufacture of RFID circuits. Furthermore, the present RFID tags generally provide higher performance (e.g., improved electrical characteristics) as compared to tags containing organic electronic devices.
摘要翻译：射频识别（RFID）标签及其制造方法。 RFID设备通常包括（1）金属天线和/或电感器; （2）其上的介电层，用于支撑和绝缘来自金属天线和/或电感器的集成电路; （3）介电层上的多个二极管和多个晶体管，二极管具有至少一个与晶体管共同的层; 和（4）与金属天线和/或电感器以及至少一些二极管电连通的多个电容器，所述多个电容器具有与所述多个二极管共同的至少一个层和/或与所述多个二极管的触点二极管和晶体管。该方法优选将液态含硅油墨沉积物集成到用于制造RFID电路的成本有效的集成制造工艺中。此外，与含有机电子器件的标签相比，本RFID标签通常提供更高的性能（例如，改进的电气特性）。

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