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121. 发明申请

US20090243256A1 Bicycle frame with a receiving space 失效
标题翻译：具有接收空间的自行车架
公开(公告)号：US20090243256A1
公开(公告)日：2009-10-01
申请号：US12076961
申请日：2008-03-26
申请人： Yuan-Chih Cheng , Chun-Hung Lin
发明人： Yuan-Chih Cheng , Chun-Hung Lin
IPC分类号： B62K19/06
CPC分类号： B62K19/30 , B62H3/12 , B62H5/003 , B62K3/04
摘要： A bicycle frame includes a head tube, a seat tube and at least one tube connected between the head tube and the seat tube. The at least one tube includes a first longitudinal tube connected to the head tube and a second longitudinal tube connected to the seat tube, a transverse tube is connected between the first and second longitudinal tubes. The transverse tube includes a receiving space in which a lock or a light device is received.
摘要翻译：自行车车架包括头管，座管和连接在头管和座管之间的至少一个管。所述至少一个管包括连接到所述头管的第一纵向管和连接到所述座管的第二纵向管，横管连接在所述第一和第二纵管之间。横管包括容纳空间，在该容纳空间中容纳锁或灯装置。

122. 发明申请

US20090185374A1 LIGHTING DEVICE HAVING LED LIGHT BARS 失效
标题翻译：具有LED灯条的照明装置
公开(公告)号：US20090185374A1
公开(公告)日：2009-07-23
申请号：US12206652
申请日：2008-09-08
申请人： Ting-Feng WU , Chun-Hung Lin , Chih-Hung Tseng
发明人： Ting-Feng WU , Chun-Hung Lin , Chih-Hung Tseng
IPC分类号： F21S4/00 , H05B37/02
CPC分类号： F21S8/086 , F21K9/20 , F21V15/01 , F21V21/116 , F21V21/30 , F21V23/04 , F21V29/767 , F21V29/83 , F21W2131/103 , F21Y2103/10 , F21Y2115/10 , G02B6/001 , H05B33/0803 , Y10S362/80
摘要： A lighting device has a light-bar mount and multiple light bars. The light-bar mount is integrally formed from a board. The light bars are mounted on the light-bar mount and each light bar has a heat sink, a circuit board and multiple high-power LED modules. The heat sink is detachably mounted in the light-bar mount. The circuit board is mounted in the heat sink. The high-power LED modules are mounted on the heat sink and electrically connected to the circuit board for providing outward illumination.
摘要翻译：照明装置具有灯条安装件和多个灯条。灯条安装座由板一体形成。灯条安装在灯杆安装座上，每个灯条都有散热器，电路板和多个大功率LED模块。散热器可拆卸地安装在灯条安装座中。电路板安装在散热器中。大功率LED模块安装在散热器上并电连接到电路板以提供向外照明。

123. 发明授权

US07560306B2 Manufacturing process for chip package without core 有权
标题翻译：无核心芯片封装的制造工艺
公开(公告)号：US07560306B2
公开(公告)日：2009-07-14
申请号：US11326749
申请日：2006-01-05
申请人： Yu-Tang Pan , Geng-Shin Shen , Chun-Hung Lin
发明人： Yu-Tang Pan , Geng-Shin Shen , Chun-Hung Lin
IPC分类号： H01L21/50 , H01L21/48
CPC分类号： H01L23/3128 , H01L21/4857 , H01L24/45 , H01L24/48 , H01L25/105 , H01L2224/0401 , H01L2224/06136 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/4824 , H01L2224/73204 , H01L2224/73215 , H01L2224/92147 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/15312 , H01L2924/15321 , H01L2924/15331 , H01L2924/18165 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A manufacturing process for chip package without core is disclosed. First of all, a conductive layer with a first surface and a second surface is provided. A first film is formed onto the first surface, and the conductive layer is patterned to form a patterned circuit layer. A solder resistance layer is formed on the patterned circuit layer and then patterned to expose parts of the patterned circuit layer. After a second film is formed on the solder resistance layer and the first film is removed, a chip is disposed on the first surface and electrically connected to the patterned circuit layer. A molding compound is formed to cover the patterned circuit layer and fix the chip onto the patterned circuit layer. After that, the second film is removed.
摘要翻译：公开了一种无芯片封装的制造工艺。首先，提供具有第一表面和第二表面的导电层。第一膜形成在第一表面上，并且导电层被图案化以形成图案化的电路层。在图案化电路层上形成阻焊层，然后将其图案化以暴露图案化电路层的部分。在阻焊层上形成第二膜并且去除第一膜之后，在第一表面上设置芯片并与图案化电路层电连接。形成模塑料以覆盖图案化电路层并将芯片固定在图案化电路层上。之后，第二个膜被去除。

124. 发明授权

US07514299B2 Chip package structure and manufacturing method thereof 有权
标题翻译：芯片封装结构及其制造方法
公开(公告)号：US07514299B2
公开(公告)日：2009-04-07
申请号：US11530165
申请日：2006-09-08
申请人： Chun-Hung Lin , Shih-Wen Chou , Yu-Tang Pan
发明人： Chun-Hung Lin , Shih-Wen Chou , Yu-Tang Pan
IPC分类号： H01L21/44 , H01L21/48
CPC分类号： H01L23/49816 , H01L21/561 , H01L23/3128 , H01L24/48 , H01L24/97 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2224/92147 , H01L2224/97 , H01L2924/00014 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A manufacturing method of a chip package structure is provided. A circuit substrate having a first surface, a second surface, and a through hole connecting the first surface and the second surface is provided. A chip having an active surface and bonding pads disposed on the active surface is provided. The chip is fixed on the circuit substrate, wherein the second surface is opposite to the active surface and the bonding pads are exposed to the through hole. Bonding wires connecting the bonding pads and the first surface are formed through the through hole. A film having an opening is formed on the first surface. The bonding wires, the bonding pads, the through hole, and part of the first surface are exposed by the opening. An encapsulant is formed to encapsulate part of the active surface, the bonding wires, and part of the first surface. The film is removed.
摘要翻译：提供了一种芯片封装结构的制造方法。提供具有第一表面，第二表面和连接第一表面和第二表面的通孔的电路基板。提供具有有源表面的芯片和设置在有源表面上的接合焊盘。芯片固定在电路基板上，其中第二表面与有源表面相对，并且焊盘暴露于通孔。通过通孔形成连接接合焊盘和第一表面的接合线。具有开口的膜形成在第一表面上。接合线，接合焊盘，通孔和第一表面的一部分由开口露出。形成密封剂以封装部分活性表面，接合线和第一表面的一部分。电影被删除。

125. 发明申请

US20090064933A1 FILM COATING SYSTEM AND ISOLATING DEVICE THEREOF 有权
标题翻译：电影涂料系统及其隔离装置
公开(公告)号：US20090064933A1
公开(公告)日：2009-03-12
申请号：US11954843
申请日：2007-12-12
申请人： Chi-Hung Liu , Chih-Ming Chen , Chun-Hsien Su , Chih-Wei Chen , Wen-Tung Hsu , Chun-Hung Lin
发明人： Chi-Hung Liu , Chih-Ming Chen , Chun-Hsien Su , Chih-Wei Chen , Wen-Tung Hsu , Chun-Hung Lin
IPC分类号： C23C16/455
CPC分类号： H01J37/32568 , H01J37/3244 , H01J37/32825 , H01J2237/20214
摘要： A film coating system for coating an object includes a working station and an isolating device. The object is disposed on the working station, and the isolating device is utilized to isolate the object. The isolating device includes a body generating a first power, a first working fluid, a second working fluid, a first guiding portion and a second guiding portion. The first guiding portion guides the first working fluid to pass through the body, thereby forming a first working region to coat the object thereon. The second guiding portion guides the second working fluid excited by the first power of the body to pass through the body, thereby forming a second working region to separate the first working region from the object.
摘要翻译：用于涂覆物体的涂膜系统包括加工台和隔离装置。物体设置在工作站上，隔离装置用于隔离物体。隔离装置包括产生第一功率的主体，第一工作流体，第二工作流体，第一引导部分和第二引导部分。第一引导部引导第一工作流体穿过主体，从而形成第一工作区域以在其上涂覆物体。第二引导部分引导由身体的第一功率激发的第二工作流体穿过主体，从而形成第二工作区域以将第一工作区域与物体分开。

126. 发明授权

US07489574B2 Sensing circuit for memories 有权
标题翻译：记忆感应电路
公开(公告)号：US07489574B2
公开(公告)日：2009-02-10
申请号：US11763900
申请日：2007-06-15
申请人： Chun-Hung Lin , Yin-Chang Chen
发明人： Chun-Hung Lin , Yin-Chang Chen
IPC分类号： G11C7/02
CPC分类号： G11C7/12 , G11C7/08 , G11C2207/005
摘要： A memory apparatus includes a plurality of memory units, a sensing circuit and a bias-generating circuit. The plurality of memory units respectively outputs a data current to the sensing circuit, while the sensing circuit further includes a plurality of first transistors, a plurality of second transistors and a plurality of sensing amplifiers. In order to speed up the access time of the memory units, the bias-generating circuit rapidly provides a bias signal to the sensing circuit to turn on the first transistors of the sensing circuit. In the present invention, the sensing circuit uses a common reference voltage to reduce the circuit utilization area of the memory apparatus.
摘要翻译：存储装置包括多个存储单元，感测电路和偏置发生电路。多个存储单元分别将数据电流输出到感测电路，而感测电路还包括多个第一晶体管，多个第二晶体管和多个感测放大器。为了加快存储单元的访问时间，偏置产生电路快速地向感测电路提供偏置信号以接通感测电路的第一晶体管。在本发明中，感测电路使用公共参考电压来减小存储装置的电路利用面积。

127. 发明申请

US20080236412A1 Nano-imprinting method using material having surface energy 审中-公开
标题翻译：使用具有表面能的材料的纳米压印方法
公开(公告)号：US20080236412A1
公开(公告)日：2008-10-02
申请号：US11727897
申请日：2007-03-28
申请人： Chun-Hung Lin , Feng-Chih Chang , Chih-Feng Wang
发明人： Chun-Hung Lin , Feng-Chih Chang , Chih-Feng Wang
IPC分类号： B41C1/06
CPC分类号： B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： A mold release agent of polybenzoxazine is used in an imprinting process. With the novel mold release agent used, a surface energy of a template is greatly reduced, so that an excel lent imprinted image is obtained. Besides, the mold release agent is totally resolved in a solution with no pollution produced. In short, the present invention has a high stability and a low cost with easy-obtained source materials.
摘要翻译：聚苯并恶嗪的脱模剂用于压印过程。使用新型脱模剂时，模板的表面能大大降低，从而获得优良的印刷图像。此外，脱模剂在无污染的溶液中完全溶解。简而言之，本发明具有高稳定性和低成本的容易获得的源材料。

128. 发明申请

US20080129969A1 System and Method For Improving Immersion Scanner Overlay Performance 有权
标题翻译：提高浸入式扫描仪覆盖性能的系统和方法
公开(公告)号：US20080129969A1
公开(公告)日：2008-06-05
申请号：US11677949
申请日：2007-02-22
申请人： Jui-Chung Peng , Tzung-Chi Fu , Chin-Hsiang Lin , Chien-Hsun Lin , Chun-Hung Lin , Yao-Wen Guo , Shy-Jay Lin , Heng-Hsin Liu
发明人： Jui-Chung Peng , Tzung-Chi Fu , Chin-Hsiang Lin , Chien-Hsun Lin , Chun-Hung Lin , Yao-Wen Guo , Shy-Jay Lin , Heng-Hsin Liu
IPC分类号： G03B27/52
CPC分类号： G03F7/70875 , G03F7/70341 , G03F7/70783
摘要： System and method for improving immersion scanner overlay performance are described. One embodiment is a method of improving overlay performance of an photolithography immersion scanner comprising a wafer table having lens cooling water (“LCW”) disposed in a water channel therein, the wafer table having an input for receiving the LCW into the water channel and an output for expelling the LCW from the water channel. The method comprises providing a water tank at least one of the wafer table input and the wafer table output; monitoring a pressure of water in the water tank; and maintaining the pressure of the water in the water tank at a predetermined level.
摘要翻译：描述了用于提高浸没式扫描仪覆盖性能的系统和方法。一个实施例是一种提高光刻浸没式扫描仪的覆盖性能的方法，其包括设置在其中的水通道中的透镜冷却水（“LCW”）的晶片台，晶片台具有用于将LCW接收到水通道中的输入端，输出用于从水道排出LCW。该方法包括：提供一个水箱至少一个晶片台输入和晶片台输出; 监测水箱内的水压; 并且将水箱中的水的压力保持在预定水平。

129. 发明申请

US20080125902A1 METHODS AND SYSTEMS FOR FORMING SEMICONDUCTOR STRUCTURES 有权
标题翻译：形成半导体结构的方法和系统
公开(公告)号：US20080125902A1
公开(公告)日：2008-05-29
申请号：US11563947
申请日：2006-11-28
申请人： Chien-Hsun Lin , An-Kuo Yang , Yao-Wen Guo , Chun-Hung Lin
发明人： Chien-Hsun Lin , An-Kuo Yang , Yao-Wen Guo , Chun-Hung Lin
IPC分类号： G06F19/00
CPC分类号： H01L22/20
摘要： A method for processing substrates to manufacture semiconductor structures thereon includes analyzing at least one first processing parameter of a first apparatus for processing a substrate, thereby yielding at least one first throughput rate of the first apparatus. At least one second processing parameter of a second apparatus is analyzed for processing the substrate, thereby yielding at least one second throughput rate of the second apparatus. The first throughput rate and the second throughput rate are compared, thereby yielding at least one comparison result for processing the substrate.
摘要翻译：一种用于处理衬底以在其上制造半导体结构的方法，包括分析用于处理衬底的第一装置的至少一个第一处理参数，从而产生第一装置的至少一个第一吞吐率。分析第二装置的至少一个第二处理参数以处理基板，从而产生第二装置的至少一个第二吞吐率。比较第一吞吐率和第二吞吐率，从而产生用于处理基板的至少一个比较结果。

130. 发明申请

US20080057191A1 METHOD OF MANUFACTURING ULTRA-THIN SOFT CONDUCTIVE CLOTH 审中-公开
标题翻译：制造超薄软导电布的方法
公开(公告)号：US20080057191A1
公开(公告)日：2008-03-06
申请号：US11850715
申请日：2007-09-06
申请人： Feng-Chang Chang , Chih-Ming Cheng , Chun-Hung Lin
发明人： Feng-Chang Chang , Chih-Ming Cheng , Chun-Hung Lin
IPC分类号： B05D3/12 , B05D5/10
CPC分类号： C23C18/2033 , C23C18/2013 , C23C18/31 , D06M11/83 , D06M11/84 , D06M2200/00
摘要： The present invention relates to a method of manufacturing an ultra-thin soft conductive cloth, which includes the steps of providing a cloth interwoven with artificial fibers, thermal calendering the cloth at least once to reduce the thickness and increase the softness, and electroless plating the thermal calendered cloth for metallization, so as to form the ultra-thin soft conductive cloth having electromagnetic shielding effect.
摘要翻译：本发明涉及一种制造超薄软导电布的方法，其包括以下步骤：提供与人造纤维交织的布，至少一次热压布以减少厚度并增加柔软度，并且化学镀用于金属化的热压光布，以形成具有电磁屏蔽效果的超薄软导电布。

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