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1. 发明申请

US20110038202A1 CONTROL DRIVER FOR MEMORY AND RELATED METHOD 有权
标题翻译：用于存储器和相关方法的控制驱动器
公开(公告)号：US20110038202A1
公开(公告)日：2011-02-17
申请号：US12541976
申请日：2009-08-17
申请人： Yu-Hsiung Tsai , Po-Hao Huang , Yin-Chang Chen
发明人： Yu-Hsiung Tsai , Po-Hao Huang , Yin-Chang Chen
IPC分类号： G11C16/04 , G11C16/06 , G11C7/00 , G11C8/00
CPC分类号： G11C16/12
摘要： A control driver for non-volatile memory includes a driving circuit, a level shift up circuit, and a select circuit. The select circuit receives a plurality of decoding signals, asserts a select signal when all of the decoding signals are asserted, and does not assert the select signal when any of the decoding signals is not asserted. The level shift up circuit receives the select signal, outputs the pull-up signal at a first voltage when the select signal is asserted, and outputs the pull-up signal at a second voltage when the select signal is not asserted. The driving circuit has a pull-up transistor for pulling up a control line signal according to the pull-up signal, and a pull-down transistor for pulling down the control line signal according to the pull-up signal.
摘要翻译：用于非易失性存储器的控制驱动器包括驱动电路，电平转换上升电路和选择电路。选择电路接收多个解码信号，当所有解码信号被断言时断言选择信号，并且当任何解码信号没有被断言时，不选择选择信号。电平上升电路接收选择信号，当选择信号被置位时，以第一电压输出上拉信号，并且当选择信号未被置位时，输出上拉信号为第二电压。驱动电路具有用于根据上拉信号提升控制线信号的上拉晶体管，以及用于根据上拉信号拉下控制线信号的下拉晶体管。

2. 发明授权

US07132879B2 Boost circuit with a voltage detector 有权
标题翻译：升压电路带电压检测器
公开(公告)号：US07132879B2
公开(公告)日：2006-11-07
申请号：US10711916
申请日：2004-10-13
申请人： Yin-Chang Chen , Yang-Chieh Lin
发明人： Yin-Chang Chen , Yang-Chieh Lin
IPC分类号： G05F3/02
CPC分类号： H02M3/073
摘要： A boost circuit capable of boosting a reference voltage into an output voltage. The boost circuit includes a main transistor electrically connected to the output voltage, an auxiliary transistor electrically connected to the output voltage, a pre-charge circuit electrically connected to the main transistor and the auxiliary transistor for pre-charging the main transistor and the auxiliary transistor, and a voltage detector electrically connected to the auxiliary transistor and the reference voltage for controlling the auxiliary transistor according to the reference voltage.
摘要翻译：能够将参考电压升压成输出电压的升压电路。升压电路包括电连接到输出电压的主晶体管，电连接到输出电压的辅助晶体管，电连接到主晶体管的预充电电路和用于对主晶体管和辅助晶体管进行预充电的辅助晶体管以及电连接到辅助晶体管的电压检测器和用于根据参考电压控制辅助晶体管的参考电压。

3. 发明授权

US06798246B2 Boosted clock generator having an NMOSFET pass gate transistor 失效
公开(公告)号：US06798246B2
公开(公告)日：2004-09-28
申请号：US10248183
申请日：2002-12-25
申请人： Yin-Chang Chen
发明人： Yin-Chang Chen
IPC分类号： H03K190185
CPC分类号： H02M3/073 , H03K3/35613 , H03K17/063
摘要： A boosted clock generator has a clock generator for generating a first clock signal, a cross-coupled boost circuit electrically connected to the clock generator for boosting the first clock signal so as to generate a second clock signal, a bootstrap pass gate having an NMOSFET pass gate transistor electrically connected to the cross-coupled boost circuit for passing a higher voltage of the second clock signal, and a level shift circuit electrically connected to the bootstrap pass gate for generating a boosted clock signal according to the higher voltage of the second clock signal.

4. 发明授权

US07889550B1 Control driver for memory and related method 有权
标题翻译：内存控制驱动程序及相关方法
公开(公告)号：US07889550B1
公开(公告)日：2011-02-15
申请号：US12541976
申请日：2009-08-17
申请人： Yu-Hsiung Tsai , Po-Hao Huang , Yin-Chang Chen
发明人： Yu-Hsiung Tsai , Po-Hao Huang , Yin-Chang Chen
IPC分类号： G11C16/00
CPC分类号： G11C16/12
摘要： A control driver for non-volatile memory includes a driving circuit, a level shift up circuit, and a select circuit. The select circuit receives a plurality of decoding signals, asserts a select signal when all of the decoding signals are asserted, and does not assert the select signal when any of the decoding signals is not asserted. The level shift up circuit receives the select signal, outputs the pull-up signal at a first voltage when the select signal is asserted, and outputs the pull-up signal at a second voltage when the select signal is not asserted. The driving circuit has a pull-up transistor for pulling up a control line signal according to the pull-up signal, and a pull-down transistor for pulling down the control line signal according to the pull-up signal.
摘要翻译：用于非易失性存储器的控制驱动器包括驱动电路，电平转换上升电路和选择电路。选择电路接收多个解码信号，当所有解码信号被断言时断言选择信号，并且当任何解码信号没有被断言时，不选择选择信号。电平上升电路接收选择信号，当选择信号被置位时，以第一电压输出上拉信号，并且当选择信号未被置位时，输出上拉信号为第二电压。驱动电路具有用于根据上拉信号提升控制线信号的上拉晶体管，以及用于根据上拉信号拉下控制线信号的下拉晶体管。

5. 发明授权

US07576593B2 Two-phase charge pump circuit without body effect 有权
标题翻译：两相电荷泵电路无体效应
公开(公告)号：US07576593B2
公开(公告)日：2009-08-18
申请号：US12222811
申请日：2008-08-18
申请人： Wu-Chang Chang , Yin-Chang Chen
发明人： Wu-Chang Chang , Yin-Chang Chen
IPC分类号： G05F1/10 , G05F3/02
CPC分类号： H02M3/073 , H02M2003/078
摘要： A two-phase charge pump circuit without the body effect includes a voltage boost stage, an input stage connected to the voltage boost stage, and a high-voltage generator connected to the input stage. Each of the circuits can consist of NMOS or PMOS transistors. The body of each NMOS transistor is connected to an NMOS switch. The body of each PMOS transistor is connected to a PMOS switch. By providing an appropriate driving signal to each NMOS or PMOS switch, the body of each NMOS transistor can be switched to a lower voltage level and the body of each PMOS transistor is switched to a higher voltage level. This can prevent the body effect from occurring.
摘要翻译：没有体效应的两相电荷泵电路包括升压级，连接到升压级的输入级和连接到输入级的高压发生器。每个电路可以由NMOS或PMOS晶体管组成。每个NMOS晶体管的主体连接到NMOS开关。每个PMOS晶体管的主体连接到PMOS开关。通过向每个NMOS或PMOS开关提供适当的驱动信号，每个NMOS晶体管的主体可以被切换到较低的电压电平，并且每个PMOS晶体管的主体被切换到更高的电压电平。这可以防止身体的影响发生。

6. 发明授权

US06930923B2 Flash memory capable of utilizing one driving voltage output circuit to drive a plurality of word line drivers 失效
标题翻译：能够利用一个驱动电压输出电路来驱动多个字线驱动器的闪速存储器
公开(公告)号：US06930923B2
公开(公告)日：2005-08-16
申请号：US10605759
申请日：2003-10-23
申请人： Yin-Chang Chen , Ting-Kuo Yen
发明人： Yin-Chang Chen , Ting-Kuo Yen
IPC分类号： G11C8/08 , G11C16/12 , G11C16/00
CPC分类号： G11C8/08 , G11C16/12
摘要： A flash memory capable of utilizing one driving voltage output circuit to drive a plurality of word line drivers. The flash memory has a row driver for driving a predetermined word line to approach a predetermined voltage level. The row driver has a plurality of word line drivers, and each word line driver has a plurality of driving units and a driving voltage output circuit. The driving voltage output circuit is used for determining operating voltage levels of a plurality of driving voltages according to a plurality of second decoded signals without utilizing a plurality of first decoded signals, and for outputting a predetermined driving voltage to drive the predetermined word line to approach the predetermined voltage level when a driving unit electrically connected to the predetermined word line is turned on for connecting the predetermined word line and the driving voltage output circuit.
摘要翻译：一种能够利用一个驱动电压输出电路来驱动多个字线驱动器的闪速存储器。闪存具有用于驱动预定字线以接近预定电压电平的行驱动器。行驱动器具有多个字线驱动器，并且每个字线驱动器具有多个驱动单元和驱动电压输出电路。驱动电压输出电路用于根据多个第二解码信号确定多个驱动电压的工作电压电平，而不利用多个第一解码信号，并且用于输出预定驱动电压以驱动预定字线接近当连接到预定字线的驱动单元被接通以连接预定字线和驱动电压输出电路时的预定电压电平。

7. 发明授权

US06903599B2 Regulated charge pump 失效
标题翻译：调节电荷泵
公开(公告)号：US06903599B2
公开(公告)日：2005-06-07
申请号：US10605197
申请日：2003-09-15
申请人： Yin-Chang Chen , Ting-Kuo Yen
发明人： Yin-Chang Chen , Ting-Kuo Yen
IPC分类号： H02M3/07 , G05F3/02
CPC分类号： H02M3/073 , H02M2003/071
摘要： A regulated charge pump has a negative charge pump for generating a first output voltage according to an oscillation signal, and a regulator. The regulator has a level shift circuit, a differential amplifier for generating a compare signal, and an oscillator for generating the oscillation signal according to the compare signal. The level shift circuit has a plurality serially connected PMOS transistors. A first PMOS transistor has a first source connected to a first reference voltage, and a gate and a drain both connected to an output end of the level shift circuit. A second PMOS has a gate and a drain both connected to an output end of the negative charge pump.
摘要翻译：调节电荷泵具有用于根据振荡信号产生第一输出电压的负电荷泵和调节器。调节器具有电平移位电路，用于产生比较信号的差分放大器和用于根据比较信号产生振荡信号的振荡器。电平移位电路具有多个串联连接的PMOS晶体管。第一PMOS晶体管具有连接到第一参考电压的第一源极，以及连接到电平移位电路的输出端的栅极和漏极。第二PMOS具有连接到负电荷泵的输出端的栅极和漏极。

8. 发明申请

US20100182861A1 SENSE AMPLIFIER WITH A COMPENSATING CIRCUIT 有权
标题翻译：具有补偿电路的感测放大器
公开(公告)号：US20100182861A1
公开(公告)日：2010-07-22
申请号：US12356087
申请日：2009-01-20
申请人： Yin-Chang Chen
发明人： Yin-Chang Chen
IPC分类号： G11C7/06
CPC分类号： G11C7/062 , G11C16/28 , G11C2207/063
摘要： A sense amplifier for a memory includes a transistor, an operational amplifier, and a compensating circuit. The negative input end of the operational amplifier is coupled to the compensating circuit. The positive input end of the operational amplifier is coupled to the drain of the transistor. The output end of the operational amplifier is coupled to the gate of the transistor. The compensating circuit is coupled between the negative input end and the output end of the operational amplifier. The compensating circuit generates a compensating voltage to the negative input end of the operational amplifier according to the voltage of the gate of the transistor.
摘要翻译：用于存储器的读出放大器包括晶体管，运算放大器和补偿电路。运算放大器的负输入端耦合到补偿电路。运算放大器的正输入端耦合到晶体管的漏极。运算放大器的输出端耦合到晶体管的栅极。补偿电路耦合在运算放大器的负输入端和输出端之间。补偿电路根据晶体管的栅极的电压向运算放大器的负输入端产生补偿电压。

9. 发明申请

US20080310235A1 SENSING CIRCUIT FOR MEMORIES 有权
标题翻译：记忆感应电路
公开(公告)号：US20080310235A1
公开(公告)日：2008-12-18
申请号：US11763900
申请日：2007-06-15
申请人： Chun-Hung Lin , Yin-Chang Chen
发明人： Chun-Hung Lin , Yin-Chang Chen
IPC分类号： G11C11/4091
CPC分类号： G11C7/12 , G11C7/08 , G11C2207/005
摘要： A memory apparatus includes a plurality of memory units, a sensing circuit and a bias-generating circuit. The plurality of memory units respectively outputs a data current to the sensing circuit, while the sensing circuit further includes a plurality of first transistors, a plurality of second transistors and a plurality of sensing amplifiers. In order to speed up the access time of the memory units, the bias-generating circuit rapidly provides a bias signal to the sensing circuit to turn on the first transistors of the sensing circuit. In the present invention, the sensing circuit uses a common reference voltage to reduce the circuit utilization area of the memory apparatus.
摘要翻译：存储装置包括多个存储单元，感测电路和偏置发生电路。多个存储单元分别将数据电流输出到感测电路，而感测电路还包括多个第一晶体管，多个第二晶体管和多个感测放大器。为了加快存储单元的访问时间，偏置产生电路快速地向感测电路提供偏置信号以接通感测电路的第一晶体管。在本发明中，感测电路使用公共参考电压来减小存储装置的电路利用面积。

10. 发明申请

US20080309399A1 Two-phase charge pump circuit without body effect 有权
标题翻译：两相电荷泵电路无体效应
公开(公告)号：US20080309399A1
公开(公告)日：2008-12-18
申请号：US12222811
申请日：2008-08-18
申请人： Wu-Chang Chang , Yin-Chang Chen
发明人： Wu-Chang Chang , Yin-Chang Chen
IPC分类号： G05F1/10
CPC分类号： H02M3/073 , H02M2003/078
摘要： A two-phase charge pump circuit without the body effect includes a voltage boost stage, an input stage connected to the voltage boost stage, and a high-voltage generator connected to the input stage. Each of the circuits can consist of NMOS or PMOS transistors. The body of each NMOS transistor is connected to an NMOS switch. The body of each PMOS transistor is connected to a PMOS switch. By providing an appropriate driving signal to each NMOS or PMOS switch, the body of each NMOS transistor can be switched to a lower voltage level and the body of each PMOS transistor is switched to a higher voltage level. This can prevent the body effect from occurring.
摘要翻译：没有体效应的两相电荷泵电路包括升压级，连接到升压级的输入级和连接到输入级的高压发生器。每个电路可以由NMOS或PMOS晶体管组成。每个NMOS晶体管的主体连接到NMOS开关。每个PMOS晶体管的主体连接到PMOS开关。通过向每个NMOS或PMOS开关提供适当的驱动信号，每个NMOS晶体管的主体可以被切换到较低的电压电平，并且每个PMOS晶体管的主体被切换到更高的电压电平。这可以防止身体的影响发生。

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