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121. 发明授权

US06818360B1 Quartz mask crack monitor system for reticle by acoustic and/or laser scatterometry 失效
标题翻译：用于通过声学和/或激光散射测量的石英掩模裂纹监测系统
公开(公告)号：US06818360B1
公开(公告)日：2004-11-16
申请号：US10261571
申请日：2002-09-30
申请人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
发明人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
IPC分类号： G03F900
CPC分类号： G03F1/84 , G01N21/47 , G01N21/9501 , G01N21/956 , G03F1/26
摘要： A system that monitors and controls a phase shift mask fabrication process is disclosed. Acoustic beams and/or beams of light are selectively directed at portions of the mask to scan the mask as it matriculates through the fabrication process. Portions of the beams that pass through and/or are reflected from the mask are collected and examined, such as in accordance with scatterometry based techniques, to determine, for example, whether cracks or other defects are forming on or within the mask, and/or whether features, such as apertures, are being formed as desired. The measurements can be employed to generate feed forward and/or feedback control data that can utilized to selectively adjust one or more fabrication components and/or operating parameters associated therewith to adapt the fabrication process. Controlling the mask fabrication process facilitates improved mask fabrication and resulting chip quality as compared to conventional systems.
摘要翻译：公开了一种监测和控制相移掩模制造工艺的系统。声波束和/或光束被选择性地定向在掩模的部分，以在掩模通过制造过程进入时扫描掩模。通过和/或从掩模反射的光束的部分被收集和检查，例如根据基于散射法的技术，以确定例如是否在掩模上或面罩内形成裂纹或其它缺陷，和/ 或者是否根据需要形成诸如孔的特征。可以采用测量来产生可以用于选择性地调整一个或多个制造部件和/或与其相关联的操作参数以适应制造过程的前馈和/或反馈控制数据。与常规系统相比，控制掩模制造工艺有助于改进掩模制造和产生的芯片质量。

122. 发明授权

US06793765B1 Situ monitoring of microloading using scatterometry with variable pitch gratings 失效
标题翻译：使用具有可变间距光栅的散射法对微载荷进行现场监测
公开(公告)号：US06793765B1
公开(公告)日：2004-09-21
申请号：US10230739
申请日：2002-08-29
申请人： Catherine B. Labelle , Bhanwar Singh , Bharath Rangarajan
发明人： Catherine B. Labelle , Bhanwar Singh , Bharath Rangarajan
IPC分类号： H05H100
CPC分类号： H01L22/20 , H01J37/32935 , H01J37/3299 , H01L21/3065
摘要： One aspect of the present invention relates to a system for determining and controlling a microloading effect in order to achieve desired feature depth on a wafer. The system includes a semiconductor structure having one or more layers formed over a substrate, a fabrication process assembly for forming features on the semiconductor structure, a microloading characterization system for monitoring the fabrication process, measuring feature depth, and for processing the measurements in order to ascertain the microloading effect, a detection apparatus operatively coupled to the microloading characterization system to facilitate monitoring the fabrication process and measuring feature depth, and a control system for regulating the fabrication process based on the output from the microloading characterization system. Thus, forming features having a first density and features having a second density on the same layer may be formed using one photomask since fabrication parameters can be adjusted based on the determined microloading effect.
摘要翻译：本发明的一个方面涉及一种用于确定和控制微加载效应以便在晶片上实现期望的特征深度的系统。该系统包括在衬底上形成一层或多层的半导体结构，用于在半导体结构上形成特征的制造工艺组件，用于监测制造工艺，测量特征深度和用于处理测量的微加载表征系统，确定微载荷效应，可操作地耦合到微加载表征系统以便于监测制造过程和测量特征深度的检测装置，以及用于基于来自微载体表征系统的输出来调节制造过程的控制系统。因此，可以使用一个光掩模形成具有第一密度的成形特征和在同一层上具有第二密度的特征，因为可以基于确定的微加载效应来调整制造参数。

123. 发明授权

US06784446B1 Reticle defect printability verification by resist latent image comparison 有权
标题翻译：光栅缺陷可印刷性验证通过抗蚀剂潜像比较
公开(公告)号：US06784446B1
公开(公告)日：2004-08-31
申请号：US10230714
申请日：2002-08-29
申请人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
发明人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
IPC分类号： G01N2186
CPC分类号： G01N21/95692
摘要： One aspect of the present invention relates to a system and method for detecting defects on a reticle by inspecting latent images printed on a resist wafer by the reticle. The system includes a wafer having a printed photoresist layer formed thereon, a latent image inspection system connected to the wafer exposure system for examining the printed photoresist layer in order to determine whether a reticle employed to print the photoresist layer is defective, and a processor for receiving data from the inspection system in order to verify the presence of defects on the reticle. The method involves printing a first latent image, a second latent image, and a third latent image on a resist wafer using a reticle, and comparing the three latent images to one another to determine whether the reticle is defective. Comparison of the latent images may be facilitated by employing an optical system programmed to perform such comparisons.
摘要翻译：本发明的一个方面涉及通过检查通过掩模版印刷在抗蚀剂晶片上的潜像来检测掩模版上的缺陷的系统和方法。该系统包括其上形成有印刷的光致抗蚀剂层的晶片，连接到晶片曝光系统以检查印刷的光致抗蚀剂层以便确定用于印刷光致抗蚀剂层的掩模版是否有缺陷的潜像检查系统，以及用于从检查系统接收数据，以验证掩模版上是否存在缺陷。该方法包括使用掩模版在抗蚀剂晶片上印刷第一潜像，第二潜像和第三潜像，并将三个潜像彼此进行比较，以确定掩模版是否有缺陷。可以通过使用被编程为执行这种比较的光学系统来促进潜像的比较。

124. 发明授权

US06778268B1 System and method for process monitoring of polysilicon etch 失效
标题翻译：多晶硅蚀刻工艺监测系统和方法
公开(公告)号：US06778268B1
公开(公告)日：2004-08-17
申请号：US09973231
申请日：2001-10-09
申请人： Bhanwar Singh , Bharath Rangarajan , Michael K. Templeton
发明人： Bhanwar Singh , Bharath Rangarajan , Michael K. Templeton
IPC分类号： G01N2155
CPC分类号： H01L22/20 , G01N21/47
摘要： An in-line system and method for determining T-top gate dimensions is provided. The system comprises a wafer structure undergoing a T-top gate formation process; a scatterometry system coupled to the formation process for directing light at and collecting reflected light from the wafer structure; a signature store; a T-top gate formation analysis system coupled to the scatterometry system and to the signature store for determining the T-top gate dimensions; and a feedback control system coupled to the T-top gate formation analysis system for optimizing T-top gate formation. The method comprises providing a wafer structure having a T-top gate formed thereon; generating a signature associated with the T-top gate; comparing the generated signature with a signature store to determine the dimensions of the T-top gate; if the dimensions of the T-top gate are not within a pre-determined acceptable range, then adjusting T-top gate process parameters using feedback control.
摘要翻译：提供了一种用于确定T顶门尺寸的在线系统和方法。该系统包括经历T形栅极形成工艺的晶片结构; 耦合到用于将光引导并收集来自晶片结构的反射光的形成过程的散射测量系统; 签名店耦合到所述散射测量系统和所述签名存储器的T顶部栅极形成分析系统，用于确定所述T顶部栅极尺寸; 以及耦合到T顶门形成分析系统的反馈控制系统，用于优化T顶门形成。该方法包括提供其上形成有T形顶栅的晶片结构; 生成与T顶门相关联的签名; 将生成的签名与签名存储区进行比较，以确定T-top门的尺寸; 如果T顶门的尺寸不在预定的可接受范围内，则使用反馈控制来调整T顶栅工艺参数。

125. 发明授权

US06573498B1 Electric measurement of reference sample in a CD-SEM and method for calibration 失效
标题翻译： CD-SEM中参考样品的电测量和校准方法
公开(公告)号：US06573498B1
公开(公告)日：2003-06-03
申请号：US09608096
申请日：2000-06-30
申请人： Bharath Rangarajan , Bhanwar Singh , Khoi Phan , Michael K. Templeton
发明人： Bharath Rangarajan , Bhanwar Singh , Khoi Phan , Michael K. Templeton
IPC分类号： G01N2300
CPC分类号： G01N23/225 , H01J2237/2826
摘要： The present invention relates to a system and method for calibrating a scanning electron microscope (SEM). The method comprises measuring an electrical characteristic of a calibration standard reference sample feature and correlating the electrical measurement with an SEM measurement thereof. The correlation of the electrical and SEM measurements provides a critical dimension (CD) for the reference sample feature which can then be used to correlate SEM measurements of workpiece features. The system provides a reference sample having a measurable feature electrically connected to a probe. The probe provides an electrical measurement of the reference sample feature. The system further comprises a scanning electron microscope (SEM) adapted to provide an optical measurement of the reference sample feature. A processor is provided to correlate the optical and electrical measurements of the reference sample feature, whereby a reference feature CD is obtained. The system may further correlate workpiece feature measurements with the reference feature CD in order to determine or obtain a workpiece feature CD.
摘要翻译：本发明涉及一种用于校准扫描电子显微镜（SEM）的系统和方法。该方法包括测量校准标准参考样本特征的电特性并将电测量与其SEM测量相关联。电和SEM测量的相关性为参考样品特征提供了临界尺寸（CD），然后可以将其用于关联工件特征的SEM测量。该系统提供具有电连接到探针的可测量特征的参考样本。探头提供参考样品特征的电气测量。该系统还包括适于提供参考样品特征的光学测量的扫描电子显微镜（SEM）。提供处理器以使参考样本特征的光学和电学测量相关，由此获得参考特征CD。该系统可以进一步将工件特征测量与参考特征CD相关联，以便确定或获得工件特征CD。

126. 发明授权

US06573497B1 Calibration of CD-SEM by e-beam induced current measurement 失效
标题翻译：通过电子束感应电流测量校正CD-SEM
公开(公告)号：US06573497B1
公开(公告)日：2003-06-03
申请号：US09607628
申请日：2000-06-30
申请人： Bharath Rangarajan , Bhanwar Singh , Khoi Phan , Michael K. Templeton
发明人： Bharath Rangarajan , Bhanwar Singh , Khoi Phan , Michael K. Templeton
IPC分类号： G01R3126
CPC分类号： H01J37/265 , H01J37/244 , H01J2237/24564 , H01J2237/2803 , H01J2237/2817 , H01J2237/2826
摘要： The present invention relates to a system and method for calibrating a scanning electron microscope (SEM). The method comprises measuring an electrical characteristic of a calibration standard reference sample feature via a current induced by an electron beam (e-beam) and correlating the e-beam induced current measurement with an SEM measurement thereof. The correlation of the e-beam induced current and SEM measurements provides a critical dimension (CD) for the reference sample feature which can then be used to correlate SEM measurements of workpiece features. The system provides a reference sample having a measurable feature electrically connected to a probe. The probe provides an electrical measurement of the reference sample feature based on an e-beam induced current. The system further comprises a scanning electron microscope (SEM) adapted to provide an optical measurement of the reference sample feature and workpiece features. A processor is provided to correlate the optical and e-beam induced current measurements of the reference sample feature, whereby a reference feature CD is obtained. The system may further correlate workpiece feature measurements with the reference feature CD in order to determine or obtain a workpiece feature CD.
摘要翻译：本发明涉及一种用于校准扫描电子显微镜（SEM）的系统和方法。该方法包括通过由电子束（电子束）感应的电流测量校准标准参考样本特征的电特性，并将电子束感应电流测量与其SEM测量相关联。电子束感应电流和SEM测量的相关性为参考样品特征提供了临界尺寸（CD），然后可以将其用于关联工件特征的SEM测量。该系统提供具有电连接到探针的可测量特征的参考样本。探针基于电子束感应电流提供参考样品特征的电测量。该系统还包括适于提供参考样品特征和工件特征的光学测量的扫描电子显微镜（SEM）。提供处理器以使参考样本特征的光束和电子束感应电流测量值相关，从而获得参考特征CD。该系统可以进一步将工件特征测量与参考特征CD相关联，以便确定或获得工件特征CD。

127. 发明授权

US06559457B1 System and method for facilitating detection of defects on a wafer 失效
标题翻译：便于检测晶片缺陷的系统和方法
公开(公告)号：US06559457B1
公开(公告)日：2003-05-06
申请号：US09534410
申请日：2000-03-23
申请人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
发明人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
IPC分类号： H01J3720
CPC分类号： H01L21/67288 , G01N21/9501 , H01J37/3045 , H01J2237/20292 , H01J2237/2817
摘要： The present invention relates to detecting defects on a wafer. A wafer stage includes markings which are used to form a reference coordinate system. The wafer is positioned on the wafer stage and the wafer is scanned to detect a defect on the wafer. The position of the detected defect is mapped relative to the reference coordinate system of the stage. The location of a reference point on the wafer also is determined in the reference coordinate system. The position of the defect is determined relative to the reference point on the wafer so as to facilitate repeatedly locating the defect on the wafer as the wafer is loaded and reloaded into inspection and processing tools.
摘要翻译：本发明涉及检测晶片上的缺陷。晶片台包括用于形成参考坐标系的标记。将晶片定位在晶片台上，并扫描晶片以检测晶片上的缺陷。检测到的缺陷的位置相对于舞台的参考坐标系映射。参考点在晶片上的位置也在参考坐标系中确定。缺陷的位置相对于晶片上的参考点确定，以便当晶片被装载并重新加载到检查和处理工具中时便于将缺陷重新定位在晶片上。

128. 发明授权

US06329124B1 Method to produce high density memory cells and small spaces by using nitride spacer 有权
标题翻译：通过使用氮化物间隔物生产高密度存储单元和小空间的方法
公开(公告)号：US06329124B1
公开(公告)日：2001-12-11
申请号：US09320417
申请日：1999-05-26
申请人： Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton
发明人： Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton
IPC分类号： G03F726
CPC分类号： H01L21/3088 , H01L21/0337 , H01L21/0338 , H01L21/3086
摘要： The present invention relates to a method for forming an etch mask. A photoresist layer is patterned, wherein d1 is a smallest space dimension of an exposed area of a layer underlying the photoresist layer. An ARC layer under the photoresist layer is etched. A nitride layer is formed to be conformal to the patterned ARC layer and exposed portions of an underlayer underying the patterned ARC layer. The nitride layer is etched to form nitride sidewalls, the nitride sidewalls reducing the smallest space dimension of the exposed underlayer area to d2, wherein d2
摘要翻译：本发明涉及一种形成蚀刻掩模的方法。图案化光致抗蚀剂层，其中d1是光致抗蚀剂层下面的层的暴露区域的最小空间尺寸。蚀刻光刻胶层下方的ARC层。氮化物层形成为与图案化的ARC层一致，并且曝光部分的底层在图案化的ARC层下面。蚀刻氮化物层以形成氮化物侧壁，氮化物侧壁将暴露的底层区域的最小空间尺寸减小到d2，其中d2

129. 发明授权

US06291135B1 Ionization technique to reduce defects on next generation lithography mask during exposure 有权
标题翻译：电离技术可减少曝光期间下一代光刻掩模的缺陷
公开(公告)号：US06291135B1
公开(公告)日：2001-09-18
申请号：US09494592
申请日：2000-01-31
申请人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
发明人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
IPC分类号： G03F738
CPC分类号： G03F7/168 , Y10S438/906 , Y10S438/944 , Y10S438/949
摘要： In one embodiment, the present invention relates to a method of processing a semiconductor structure including a resist thereon, involving contacting the semiconductor structure including the resist with a plasma comprising at least one inert gas selected from the group consisting of nitrogen, helium, neon, argon, krypton and xenon; exposing the semiconductor structure including the resist to actinic radiation having a wavelength of about 160 nm or less through a lithography mask; and developing the resist with a developer.
摘要翻译：在一个实施方案中，本发明涉及一种处理包括其上的抗蚀剂的半导体结构的方法，包括使包含抗蚀剂的半导体结构与包含至少一种选自氮，氦，氖，氩，氪和氙; 通过光刻掩模将包括抗蚀剂的半导体结构暴露于具有约160nm或更小波长的光化辐射; 并用开发商开发抗蚀剂。

130. 发明授权

US6057914A Method for detecting and identifying a lens aberration by measurement of sidewall angles by atomic force microscopy 失效
标题翻译：通过原子力显微镜测量侧壁角度来检测和识别透镜像差的方法
公开(公告)号：US6057914A
公开(公告)日：2000-05-02
申请号：US289519
申请日：1999-04-09
申请人： Sanjay K. Yedur , Bhanwar Singh , Bharath Rangarajan
发明人： Sanjay K. Yedur , Bhanwar Singh , Bharath Rangarajan
IPC分类号： G01M11/02 , G01Q60/00 , G03F7/20 , G01B9/00
CPC分类号： G01Q60/38 , B82Y35/00 , G01M11/025 , G01Q30/04 , G03F7/706 , Y10S977/854
摘要： The present invention provides a method of detecting a lens aberration in a semiconductor production process, comprising the steps of:forming a feature on a substrate by a process including a step of exposing a radiation-sensitive material to radiation, wherein said radiation passes through a lens;obtaining data relating to a sidewall angle at a plurality of adjacent locations of said feature by scanning at least one surface of said feature with an atomic force microscope;calculating the sidewall angle at said plurality of adjacent locations of said feature based on the data obtained by the atomic force microscope;comparing the sidewall angle obtained from the calculation step to a design sidewall angle for a lens free of aberration, thereby detecting the lens aberration when the comparison reveals a substantial difference between the calculated side wall angle and the design sidewall angle; andidentifying a lens position of the lens aberration by extrapolating from the locations of said feature having said substantial difference.
摘要翻译：本发明提供了一种检测半导体制造工艺中的透镜像差的方法，包括以下步骤：通过包括将辐射敏感材料暴露于辐射的步骤的工艺在衬底上形成特征，其中所述辐射通过镜片; 通过用原子力显微镜扫描所述特征的至少一个表面来获得与所述特征的多个相邻位置处的侧壁角相关的数据; 基于由原子力显微镜获得的数据计算所述特征的所述多个相邻位置处的侧壁角度; 将从计算步骤获得的侧壁角度与没有像差的透镜的设计侧壁角度进行比较，从而当比较显示所计算的侧壁角度和设计侧壁角度之间的实质差异时，检测透镜像差; 以及通过从具有所述实质差异的所述特征的位置外推来识别透镜像差的透镜位置。

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