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101. 发明申请

US20090186736A1 AUTOMATIC OPENING-CLOSING DEVICE 有权
标题翻译：自动开启闭合装置
公开(公告)号：US20090186736A1
公开(公告)日：2009-07-23
申请号：US12356949
申请日：2009-01-21
申请人： Jingning TA , Zhiqiang Wu , Jicheng Pan
发明人： Jingning TA , Zhiqiang Wu , Jicheng Pan
IPC分类号： F16H59/50
CPC分类号： A47K13/10 , E05F1/1215 , E05F15/603 , E05F15/614 , E05Y2201/236 , E05Y2201/72 , E05Y2400/337 , E05Y2800/11 , E05Y2900/614 , F16D7/025 , F16H1/203 , F16H35/10 , H02K7/1166
摘要： An automatic opening-closing device, especially for a cover or seat of a toilet, has a motor having a motor shaft, a speed reducer connected to the motor shaft, a planetary gearbox driven by the speed reducer, an output axle for driving the cover between an open position and a closed position. A protection device limits the torque between the output axle and an output shaft of the planetary gearbox.
摘要翻译：一种自动开闭装置，特别是用于马桶盖或座椅的自动打开关闭装置，具有电动机轴，与电动机轴连接的减速器，由减速器驱动的行星齿轮箱，用于驱动罩的输出轴在打开位置和关闭位置之间。保护装置限制输出轴与行星齿轮箱的输出轴之间的转矩。

102. 发明授权

US06933203B2 Methods for improving well to well isolation 有权
标题翻译：改善井良好隔离的方法
公开(公告)号：US06933203B2
公开(公告)日：2005-08-23
申请号：US10299525
申请日：2002-11-19
申请人： Zhiqiang Wu , Shaoping Tang , Jau-Yuann Yang
发明人： Zhiqiang Wu , Shaoping Tang , Jau-Yuann Yang
IPC分类号： H01L21/761 , H01L21/762 , H01L21/8234 , H01L21/00
CPC分类号： H01L21/76237 , H01L21/761 , H01L21/823481
摘要： Methods are provided for forming wells in a semiconductor wafer, in which p-wells and n-wells are formed in a substrate, and first p-type dopants are implanted into n-well regions while an n-well mask remains over the wafer to selectively decrease a substrate resistivity in the n-well regions beneath the n-wells. A subsequent blanket implantation provides second p-type dopants into isolation regions of the substrate beneath isolation structures, where the first and second p-type dopants improve well to well isolation without addition of extra masks to the fabrication process.
摘要翻译：提供了用于在半导体晶片中形成阱的方法，其中在衬底中形成p阱和n阱，并且将第一p型掺杂剂注入到n阱区域中，同时n阱掩模保留在晶片上，选择性地降低n阱下面的n阱区中的衬底电阻率。随后的覆盖植入在隔离结构下方的衬底的隔离区域中提供第二p型掺杂剂，其中第一和第二p型掺杂剂改善了良好的良好隔离，而没有向制造工艺添加额外的掩模。

103. 发明授权

US06855984B1 Process to reduce gate edge drain leakage in semiconductor devices 有权
标题翻译：降低半导体器件漏极漏极的工艺
公开(公告)号：US06855984B1
公开(公告)日：2005-02-15
申请号：US10697510
申请日：2003-10-30
申请人： Zhiqiang Wu , Shaoping Tang , Song Zhao
发明人： Zhiqiang Wu , Shaoping Tang , Song Zhao
IPC分类号： H01L21/336 , H01L21/8238 , H01L29/10 , H01L29/78 , H01L29/76
CPC分类号： H01L29/6659 , H01L21/823807 , H01L21/823842 , H01L29/1045 , H01L29/105 , H01L29/1083 , H01L29/6656 , H01L29/7833
摘要： The present invention employs a no mask, blanket implant of an n-type implant after formation of active regions in NMOS devices. As a result, the implanted n-type dopants counteract portions of strongly p-type HALO or pocket regions creating a smoother dopant profile or transition from a portion of the active regions to the channel. However, the blanket implant is performed at a relatively low energy so as to not significantly alter one or more other portions of the active regions to other portions of the device.
摘要翻译：本发明在NMOS器件中形成有源区之后采用n型注入的无掩模，覆盖式注入。结果，注入的n型掺杂剂抵消了强p型HALO或凹坑区域的部分，从而产生了更平滑的掺杂物分布或从有源区域的一部分到沟道的转变。然而，橡皮布注入在相对较低的能量下进行，以便不会将活性区的一个或多个其它部分显着地改变到该装置的其它部分。

104. 发明授权

US06831337B2 Transistor circuit with varying resistance lightly doped diffused regions for electrostatic discharge (“ESD”) protection 有权
标题翻译：具有不同电阻的晶体管电路轻掺杂扩散区用于静电放电（“ESD”）保护
公开(公告)号：US06831337B2
公开(公告)日：2004-12-14
申请号：US10622052
申请日：2003-07-17
申请人： Zhiqiang Wu , David B. Scott
发明人： Zhiqiang Wu , David B. Scott
IPC分类号： H01L2972
CPC分类号： H01L29/66659 , H01L27/0266 , H01L29/0692 , H01L29/7835
摘要： A method of forming a transistor (70) in a semiconductor active area (78). The method forms a gate structure (G2) in a fixed relationship to the semiconductor active area thereby defining a first source/drain region (R1) adjacent a first gate structure sidewall and a second source/drain region (R2) adjacent a second sidewall gate structure. The method also forms a lightly doped diffused region (801) formed in the first source/drain region and extending under the gate structure, wherein the lightly doped diffused region comprises a varying resistance in a direction parallel to the gate structure.
摘要翻译：一种在半导体有源区（78）中形成晶体管（70）的方法。该方法形成与半导体有源区域固定关系的栅极结构（G2），从而限定与第一栅极结构侧壁相邻的第一源极/漏极区域（R1）和邻近第二侧壁栅极的第二源极/漏极区域（R2）结构体。该方法还形成在第一源极/漏极区域中形成并在栅极结构下方延伸的轻掺杂扩散区域（801），其中轻掺杂扩散区域包括与栅极结构平行的方向上的变化的电阻。

105. 发明授权

US06788552B1 Method and apparatus for reducing substrate bias voltage drop 有权
标题翻译：降低衬底偏置电压降的方法和装置
公开(公告)号：US06788552B1
公开(公告)日：2004-09-07
申请号：US09652216
申请日：2000-08-30
申请人： Tongbi Jiang , Zhiqiang Wu
发明人： Tongbi Jiang , Zhiqiang Wu
IPC分类号： H05K900
CPC分类号： H01L24/06 , H01L23/4827 , H01L23/4828 , H01L23/585 , H01L24/48 , H01L27/08 , H01L27/10882 , H01L27/10897 , H01L2223/665 , H01L2224/04042 , H01L2224/05093 , H01L2224/05553 , H01L2224/05554 , H01L2224/05599 , H01L2224/06136 , H01L2224/48091 , H01L2224/4826 , H01L2224/73215 , H01L2224/73265 , H01L2224/85424 , H01L2224/85439 , H01L2224/85444 , H01L2224/85447 , H01L2224/8546 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2224/45099 , H01L2924/00
摘要： A semiconductor device is provided with a conductive layer provided on a backside of a semiconductor substrate. The conductive layer helps maintain a uniform bias voltage over the substrate. The conductive layer can also be used to apply a bias voltage to the substrate and reduce the number of bias voltage distribution regions required.
摘要翻译：半导体器件设置有设置在半导体衬底的背面上的导电层。导电层有助于在衬底上保持均匀的偏置电压。导电层也可用于向衬底施加偏置电压并减少所需的偏置电压分布区域的数量。

106. 发明授权

US06787839B2 Capacitor structure 有权
公开(公告)号：US06787839B2
公开(公告)日：2004-09-07
申请号：US10145435
申请日：2002-05-14
申请人： Zhiqiang Wu , Kunal Parekh , Li Li
发明人： Zhiqiang Wu , Kunal Parekh , Li Li
IPC分类号： H01L27108
CPC分类号： H01L27/10852 , H01L28/82
摘要： The present invention is directed to fabrication of a capacitor formed with a substantially concave shape and having optional folded or convoluted surfaces. The concave shape optimizes surface area within a small volume and thereby enables the capacitor to hold a significant charge so as to assist in increased miniaturization efforts in the microelectronic field. The capacitor is fabricated in microelectronic fashion consistent with a dense DRAM array. Methods of fabrication include stack building with storage nodes that extend above a semiconductor substrate surface.

107. 发明授权

US06723616B2 Process of increasing screen dielectric thickness 有权
标题翻译：屏幕介电厚度增加的过程
公开(公告)号：US06723616B2
公开(公告)日：2004-04-20
申请号：US10253870
申请日：2002-09-24
申请人： Seetharaman Sridhar , Youngmin Kim , Zhiqiang Wu , Mark S. Rodder
发明人： Seetharaman Sridhar , Youngmin Kim , Zhiqiang Wu , Mark S. Rodder
IPC分类号： H01L2176
CPC分类号： H01L21/76232
摘要： A method of forming a semiconductor device using shallow trench isolation, includes forming a trench within a semiconductor substrate and forming a screen dielectric stack outwardly from the semiconductor substrate. The screen dielectric stack includes a first sacrificial dielectric layer disposed outwardly from the semiconductor substrate and a second sacrificial dielectric layer disposed outwardly from and in contact with the first sacrificial dielectric layer. In one embodiment, the first sacrificial dielectric layer is formed before forming the trench and the second sacrificial dielectric layer is formed after forming the trench.
摘要翻译：使用浅沟槽隔离来形成半导体器件的方法包括在半导体衬底内形成沟槽并从半导体衬底向外形成屏蔽电介质堆叠。屏幕电介质堆叠包括从半导体衬底向外设置的第一牺牲电介质层和从第一牺牲介电层向外设置并与之接触的第二牺牲电介质层。在一个实施例中，在形成沟槽之前形成第一牺牲电介质层，并且在形成沟槽之后形成第二牺牲绝缘层。

108. 发明授权

US06482691B2 Seismic imaging using omni-azimuth seismic energy sources and directional sensing 有权
标题翻译：形成场效应晶体管和相关场效应晶体管结构的方法
公开(公告)号：US06482691B2
公开(公告)日：2002-11-19
申请号：US09494974
申请日：2000-01-31
申请人： Zhiqiang Wu , Paul Hatab
发明人： Zhiqiang Wu , Paul Hatab
IPC分类号： H01L218238
CPC分类号： H01L29/66583 , H01L29/1045 , H01L29/105 , H01L29/41775 , H01L29/66537 , H01L29/66553 , H01L29/66606 , H01L29/7833 , Y10S257/917
摘要： Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate area over which a field effect transistor gate is to be formed. A dopant of a first conductivity type is provided through the opening and into the substrate. Sidewall spacers are formed over respective sidewaUs of the opening. Enhancement dopant of a second conductivity type which is different from the first conductivity type is provided through the opening and into the substrate. A transistor gate is formed within the opening proximate the sidewall spacers, and source/drain regions of the second conductivity type are diffused into the substrate operably proximate the transistor gate. The first conductivity type dopant forms a halo region proximate the source/drain regions and lightly doped drain (LDD) regions for the transistor.
摘要翻译：描述形成场效应晶体管和相关场效应晶体管结构的方法。在半导体衬底上形成掩模层，并且通过其形成具有侧壁的开口。开口限定了要在其上形成场效应晶体管栅极的衬底区域。通过开口提供第一导电类型的掺杂剂并进入衬底。侧壁间隔件形成在开口的各个侧壁上。通过开口和衬底提供与第一导电类型不同的第二导电类型的增强掺杂剂。晶体管栅极形成在靠近侧壁间隔物的开口内，并且第二导电类型的源极/漏极区域可操作地在晶体管栅极附近扩散到衬底中。第一导电类型掺杂剂在晶体管的源极/漏极区域和轻掺杂漏极（LDD）区域附近形成晕圈。

109. 发明授权

US06367685B1 Ultrasonic vibration mode for wire bonding 失效
标题翻译：超声波振动模式用于引线接合
公开(公告)号：US06367685B1
公开(公告)日：2002-04-09
申请号：US09819030
申请日：2000-11-15
申请人： Tongbi Jiang , Zhiqiang Wu
发明人： Tongbi Jiang , Zhiqiang Wu
IPC分类号： B23K106
CPC分类号： H01L24/85 , B23K20/004 , B23K2101/38 , H01L24/45 , H01L24/48 , H01L24/78 , H01L2224/05624 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/48624 , H01L2224/48724 , H01L2224/78301 , H01L2224/78347 , H01L2224/78822 , H01L2224/85045 , H01L2224/85181 , H01L2224/85205 , H01L2224/85206 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15747 , H01L2924/20303 , H01L2924/20305 , H01L2924/00 , H01L2224/45099 , H01L2924/00015
摘要： A method and apparatus for creating second order vibrational modes. The apparatus includes a signal generator, a piezoelectric transducer, a plurality of wave propagating beams and reflecting boards. An electric field applied by the signal generator to the piezoelectric transducer induces a unidirectional vibration of the transducer. The vibration is propagated through the beams and reflected by the reflecting boards in a closed polygonal loop. The final reflection direction is perpendicular to the original vibration. A circular or elliptical vibration of the apparatus results. The circular or elliptical vibrational energy can be imparted to the wire bond of an integrated circuit to add strength to the connection.
摘要翻译：一种用于产生二阶振动模式的方法和装置。该装置包括信号发生器，压电换能器，多个波传播光束和反射板。由信号发生器施加到压电换能器的电场引起换能器的单向振动。振动通过光束传播并被反射板以闭合的多边形回路反射。最终反射方向与原始振动垂直。该装置产生圆形或椭圆形的振动。可以将圆形或椭圆形振动能量赋予集成电路的引线键合，以增加连接的强度。

110. 发明授权

US06363796B1 High resolution pressure-sensing device having an insulating flexible matrix loaded with filler particles 失效
标题翻译：具有负载有填料颗粒的绝缘柔性基质的高分辨率压力传感装置
公开(公告)号：US06363796B1
公开(公告)日：2002-04-02
申请号：US09592737
申请日：2000-06-13
申请人： Tongbi Jiang , Zhiqiang Wu
发明人： Tongbi Jiang , Zhiqiang Wu
IPC分类号： G01D700
CPC分类号： G01L1/205
摘要： A high-resolution pressure-sensing device is disclosed. The device includes an insulating flexible matrix having a plurality of filler particles. Application of a force to the matrix causes compression of the matrix. This results in the filler particles occupying a greater amount of space within the matrix relative to when no force is applied. A detector attached to the matrix detects or measures the volume of the filler particles relative to the volume of the matrix, and therefore determines the force applied to the matrix. Preferably, the resistivity of the matrix is inversely proportional to the volume percent of the filler particles, in which case the detector is a resistance-measuring circuit.
摘要翻译：公开了一种高分辨率压力感测装置。该装置包括具有多个填料颗粒的绝缘柔性基质。对矩阵施加力会导致矩阵的压缩。这导致在没有施加力的情况下，填料颗粒在基质内占据更大量的空间。连接到基体的检测器检测或测量填料颗粒相对于基体体积的体积，因此确定施加到基质上的力。优选地，基质的电阻率与填料颗粒的体积百分比成反比，在这种情况下，检测器是电阻测量电路。

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