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101. 发明授权

US08811537B2 Signal receiving apparatus and method for wireless communication system using multiple antennas 有权
标题翻译：用于使用多个天线的无线通信系统的信号接收装置和方法
公开(公告)号：US08811537B2
公开(公告)日：2014-08-19
申请号：US12629454
申请日：2009-12-02
申请人： Il-Gu Lee , Jung-Bo Son , Je-Hun Lee , Eun-Young Choi , Sok-Kyu Lee
发明人： Il-Gu Lee , Jung-Bo Son , Je-Hun Lee , Eun-Young Choi , Sok-Kyu Lee
IPC分类号： H04L25/06
CPC分类号： H04B1/1036 , H04L25/03038 , H04L25/03305 , H04L27/2647 , H04L27/2655 , H04L27/2657 , H04L2025/03414 , H04L2025/0342 , H04L2025/03426
摘要： Provided are a receiving apparatus and method for a wireless communication system using multiple antennas. A receiving method for a wireless communication system using multiple paths, the receiving method comprising: receiving signals through a predetermined number of multiple paths; sensing a carrier according to saturation state degrees of the signals, and providing saturation state information; calculating automatic gain components of the received signals by using the received signals and the saturation state information of the received signals; and performing a noise matching process to amplify noises on the predetermined multiple paths according to the automatic gain components during a predetermined period.
摘要翻译：提供一种使用多个天线的无线通信系统的接收装置和方法。一种使用多个路径的无线通信系统的接收方法，所述接收方法包括：通过预定数量的多个路径接收信号; 根据信号的饱和状态度感测载波，并提供饱和状态信息; 通过使用接收信号和接收信号的饱和状态信息来计算接收信号的自动增益分量; 以及执行噪声匹配处理，以在预定周期内根据所述自动增益分量来放大所述预定多个路径上的噪声。

102. 发明授权

US08723179B2 Thin film transistor panel having an etch stopper on semiconductor 有权
标题翻译：薄膜晶体管板在半导体上具有蚀刻停止层
公开(公告)号：US08723179B2
公开(公告)日：2014-05-13
申请号：US12957743
申请日：2010-12-01
申请人： Pil-Sang Yun , Ki-Won Kim , Hye-Young Ryu , Woo-Geun Lee , Seung-Ha Choi , Jae-Hyoung Youn , Kyoung-Jae Chung , Young-Wook Lee , Je-Hun Lee , Kap-Soo Yoon , Do-Hyun Kim , Dong-Ju Yang , Young-Joo Choi
发明人： Pil-Sang Yun , Ki-Won Kim , Hye-Young Ryu , Woo-Geun Lee , Seung-Ha Choi , Jae-Hyoung Youn , Kyoung-Jae Chung , Young-Wook Lee , Je-Hun Lee , Kap-Soo Yoon , Do-Hyun Kim , Dong-Ju Yang , Young-Joo Choi
IPC分类号： H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20
CPC分类号： H01L29/41733 , H01L21/44 , H01L21/441 , H01L21/465 , H01L21/475 , H01L21/47573 , H01L21/47635 , H01L27/1214 , H01L27/1225 , H01L27/127 , H01L27/1288 , H01L29/66969 , H01L29/78606 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
摘要翻译：薄膜晶体管面板包括绝缘基板，设置在绝缘基板上的栅极绝缘层，设置在栅极绝缘层上的氧化物半导体层，设置在氧化物半导体层上的蚀刻停止器，以及设置在源极电极和漏极上的在蚀刻停止器上。

103. 发明授权

US08686426B2 Thin film transistor having plural semiconductive oxides, thin film transistor array panel and display device including the same, and manufacturing method of thin film transistor 有权
标题翻译：具有多个半导体氧化物的薄膜晶体管，薄膜晶体管阵列面板及包括该半导体氧化物的显示装置以及薄膜晶体管的制造方法
公开(公告)号：US08686426B2
公开(公告)日：2014-04-01
申请号：US13555889
申请日：2012-07-23
申请人： Byung Du Ahn , Ji Hun Lim , Gun Hee Kim , Kyoung Won Lee , Je Hun Lee
发明人： Byung Du Ahn , Ji Hun Lim , Gun Hee Kim , Kyoung Won Lee , Je Hun Lee
IPC分类号： H01L27/14
CPC分类号： H01L29/7869 , H01L29/78696
摘要： A plural semiconductive oxides TFT (sos-TFT) provides improved electrical functionality in terms of charge-carrier mobility and/or threshold voltage variability. The sos-TFT may be used to form a thin film transistor array panel for display devices. An example sos-TFT includes: an insulated gate electrode; a first semiconductive oxide layer having a composition including a first semiconductive oxide; and a second semiconductive oxide layer having a different composition that also includes a semiconductive oxide. The first and second semiconductive oxide layers have respective channel regions that are capacitively influenced by a control voltage applied to the gate electrode. In one embodiment, the second semiconductive oxide layer includes at least one additional element that is not included in the first semiconductive oxide layer where the additional element is one of gallium (Ga), silicon (Si), niobium (Nb), hafnium (Hf), and germanium (Ge).
摘要翻译：多个半导体氧化物TFT（sos-TFT）在电荷载流子迁移率和/或阈值电压变化性方面提供改进的电功能。 sos-TFT可以用于形成用于显示装置的薄膜晶体管阵列面板。示例sos-TFT包括：绝缘栅电极; 具有包含第一半导体氧化物的组成的第一半导体氧化物层; 以及具有不同组成的第二半导体氧化物层，其还包括半导体氧化物。第一和第二半导体氧化物层具有由施加到栅电极的控制电压的电容性影响的各个沟道区。在一个实施例中，第二半导体氧化物层包括至少一个附加元件，其不包括在第一半导体氧化物层中，其中附加元素是镓（Ga），硅（Si），铌（Nb），铪（Hf ）和锗（Ge）。

104. 发明申请

US20130248855A1 OXIDE FOR SEMICONDUCTOR LAYER OF THIN-FILM TRANSISTOR, SPUTTERING TARGET, AND THIN-FILM TRANSISTOR 有权
标题翻译：薄膜晶体管，溅射靶和薄膜晶体管半导体层的氧化物
公开(公告)号：US20130248855A1
公开(公告)日：2013-09-26
申请号：US13989944
申请日：2011-11-28
申请人： Aya Miki , Shinya Morita , Toshihiro Kugimiya , Satoshi Yasuno , Jae Woo Park , Je Hun Lee , Byung Du Ahn , Gun Hee Kim
发明人： Aya Miki , Shinya Morita , Toshihiro Kugimiya , Satoshi Yasuno , Jae Woo Park , Je Hun Lee , Byung Du Ahn , Gun Hee Kim
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , C01G19/006 , C01P2006/10 , C04B35/01 , C04B35/453 , C04B35/457 , C04B2235/3284 , C04B2235/3286 , C04B2235/3293 , C23C14/086 , C23C14/3407 , C23C14/548 , C23C14/5806 , C23C14/5873 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1225 , H01L29/78693
摘要： This oxide for a semiconductor layer of a thin-film transistor contains Zn, Sn and In, and the content (at %) of the metal elements contained in the oxide satisfies formulas (1) to (3) when denoted as [Zn], [Sn] and [In], respectively. [In]/([In]+[Zn]+[Sn])≧−0.53×[Zn]/([Zn]+[Sn])+0.36 (1) [In]/([In]+[Zn]+[Sn])≧2.28×[Zn]/([Zn]+[Sn])−2.01 (2) [In]/([In]+[Zn]+[Sn])≦1.1×[Zn]/([Zn]+[Sn])−0.32 (3) The present invention enables a thin-film transistor oxide that achieves high mobility and has excellent stress resistance (negligible threshold voltage shift before and after applying stress) to be provided.
摘要翻译：用于薄膜晶体管的半导体层的氧化物含有Zn，Sn和In，并且当表示为[Zn]时，包含在氧化物中的金属元素的含量（at％）满足式（1）至（3） [Sn]和[In]。 [In] /（[In] + [Zn] + [Sn]）> = - 0.53×[Zn] /（[Zn] + [Sn]）+ 0.36（1）[In] Zn] + [Sn]）> = 2.28×[Zn] /（[Zn] + [Sn]）-2.01（2）[In] /（[In] + [Zn] + [Sn] Zn] /（[Zn] + [Sn]） - 0.32（3）本发明使得能够提供实现高迁移率且具有优异的应力阻力（施加应力之前和之后的阈值电压偏移可忽略）的薄膜晶体管氧化物。

105. 发明授权

US08508521B2 Method of driving display panel and display apparatus using the same 有权
标题翻译：驱动显示面板的方法及使用其的显示装置
公开(公告)号：US08508521B2
公开(公告)日：2013-08-13
申请号：US12561155
申请日：2009-09-16
申请人： Jong-Moo Huh , Je-Hun Lee
发明人： Jong-Moo Huh , Je-Hun Lee
IPC分类号： G06F3/038
CPC分类号： G09G3/3677 , G09G3/3696
摘要： Disclosed are a method of driving a display panel and a display apparatus using the same, in which a driving voltage is applied to a transistor provided in each pixel of the display to drive the transistor. A voltage level of the driving voltage applied to the transistor is adjusted every predetermined period and the changed driving voltage is applied to the transistor to prevent the operational reliability of the transistor from being lowered by a shift in the threshold voltage of the transistor.
摘要翻译：公开了一种驱动显示面板的方法和使用该显示面板的显示装置，其中驱动电压被施加到设置在显示器的每个像素中的晶体管以驱动晶体管。每隔预定周期调整施加到晶体管的驱动电压的电压电平，并且将改变的驱动电压施加到晶体管，以通过晶体管的阈值电压的偏移来防止晶体管的操作可靠性降低。

106. 发明授权

US08288766B2 Thin film transistor array substrate and method of manufacturing the same 有权
标题翻译：薄膜晶体管阵列基板及其制造方法
公开(公告)号：US08288766B2
公开(公告)日：2012-10-16
申请号：US12555824
申请日：2009-09-09
申请人： Je-Hun Lee , Ki-Won Kim , Do-Hyun Kim , Woo-Geun Lee , Kap-Soo Yoon
发明人： Je-Hun Lee , Ki-Won Kim , Do-Hyun Kim , Woo-Geun Lee , Kap-Soo Yoon
IPC分类号： H01L29/10
CPC分类号： H01L27/1225 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02554 , H01L21/02565 , H01L23/53238 , H01L27/124 , H01L27/1248 , H01L27/1262 , H01L29/45 , H01L29/4908 , H01L29/513 , H01L29/518 , H01L29/66969 , H01L29/78603 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要： A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
摘要翻译： TFT阵列基板包括设置在绝缘基板上并包括沟道部分的半导体氧化物层，与半导体氧化物层重叠的栅极电极，插入在半导体氧化物层和栅电极之间的栅极绝缘层，以及设置在半导体氧化物层和栅电极。栅极绝缘层和钝化层中的至少一个包括氧氮化物层，并且氧氮化物层在氧氮化物层的位置更靠近半导体氧化物层的位置处具有比氮的浓度高的氧氮化物层。

107. 发明授权

US08241936B2 Display substrate, method of manufacturing the same and display panel having the same 有权
标题翻译：显示基板，其制造方法以及具有该基板的显示面板
公开(公告)号：US08241936B2
公开(公告)日：2012-08-14
申请号：US13230111
申请日：2011-09-12
申请人： Je-Hun Lee , Young-Min Kim , Bo-Sung Kim , Jun-Young Lee , Sung-Wook Kang
发明人： Je-Hun Lee , Young-Min Kim , Bo-Sung Kim , Jun-Young Lee , Sung-Wook Kang
IPC分类号： H01L20/00
CPC分类号： H01L51/102 , G02F1/13439 , H01L27/283 , H01L51/0541 , H01L51/0545
摘要： An improved display substrate is provided to reduce surface defects on insulating layers of organic thin film transistors. Related methods of manufacture are also provided. In one example, a display substrate includes a base, a plurality of data lines, a plurality of gate lines, a pixel defined by the data lines and the gate lines, an organic thin film transistor, and a pixel electrode. The data lines are on the base and are oriented in a first direction. The gate lines are oriented in a second direction that crosses the first direction. The organic thin film transistor includes a source electrode electrically connected to one of the data lines, a gate electrode electrically connected to one of the gate lines, and an organic semiconductor layer. The pixel electrode is disposed in the pixel and electrically connected to the organic thin film transistor. The pixel electrode comprises a transparent oxynitride.
摘要翻译：提供改进的显示基板以减少有机薄膜晶体管的绝缘层上的表面缺陷。还提供了相关的制造方法。在一个示例中，显示基板包括基底，多条数据线，多条栅极线，由数据线和栅极线限定的像素，有机薄膜晶体管和像素电极。数据线在基座上并且朝向第一方向。栅极线在与第一方向交叉的第二方向上取向。有机薄膜晶体管包括电连接到数据线之一的源电极，电连接到栅极线之一的栅电极和有机半导体层。像素电极设置在像素中并电连接到有机薄膜晶体管。像素电极包括透明氧氮化物。

108. 发明授权

US08207534B2 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US08207534B2
公开(公告)日：2012-06-26
申请号：US12417280
申请日：2009-04-02
申请人： Je-Hun Lee , Sung-Jin Kim , Hee-Joon Kim , Chang-Oh Jeong
发明人： Je-Hun Lee , Sung-Jin Kim , Hee-Joon Kim , Chang-Oh Jeong
IPC分类号： H01L29/786
CPC分类号： G02F1/13439 , G02F1/13458 , H01L27/12 , H01L27/124 , H01L29/458 , H01L29/4908
摘要： A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn in which the metal component is reduced in the IZO, ITO, or a-ITO is not produced on the surfaces of the common electrode.
摘要翻译：提供薄膜晶体管阵列面板，其包括基板，形成在基板上的多个栅极线，在基板上具有透明导电层的多个公共电极，覆盖栅极线和公共电极的栅极绝缘层形成在所述栅极绝缘层上的多个半导体层，形成在所述半导体层和所述栅极绝缘层上的多个源极电极的多条数据线，形成在所述半导体层上的多个漏电极和所述栅极绝缘体并且与公共电极重叠并连接到漏电极的多个像素电极。由于公共电极由ITON，IZON或者-IONON制成，或者是将双重层的ITO / ITON，IZO / IZON或者a-ITO / a-ITON，当注入H 2或SiH 4以形成氮化硅时 SiNX）层，在公共电极的表面上不产生在IZO，ITO或ITO中还原金属成分的不透明金属Sn或Zn。

109. 发明申请

US20120003796A1 DISPLAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME AND DISPLAY PANEL HAVING THE SAME 有权
标题翻译：显示基板，其制造方法和具有该基板的显示面板
公开(公告)号：US20120003796A1
公开(公告)日：2012-01-05
申请号：US13230111
申请日：2011-09-12
申请人： Je-Hun LEE , Young-Min KIM , Bo-Sung KIM , Jun-Young LEE , Sung-Wook KANG
发明人： Je-Hun LEE , Young-Min KIM , Bo-Sung KIM , Jun-Young LEE , Sung-Wook KANG
IPC分类号： H01L21/336
CPC分类号： H01L51/102 , G02F1/13439 , H01L27/283 , H01L51/0541 , H01L51/0545
摘要： An improved display substrate is provided to reduce surface defects on insulating layers of organic thin film transistors. Related methods of manufacture are also provided. In one example, a display substrate includes a base, a plurality of data lines, a plurality of gate lines, a pixel defined by the data lines and the gate lines, an organic thin film transistor, and a pixel electrode. The data lines are on the base and are oriented in a first direction. The gate lines are oriented in a second direction that crosses the first direction. The organic thin film transistor includes a source electrode electrically connected to one of the data lines, a gate electrode electrically connected to one of the gate lines, and an organic semiconductor layer. The pixel electrode is disposed in the pixel and electrically connected to the organic thin film transistor. The pixel electrode comprises a transparent oxynitride.
摘要翻译：提供改进的显示基板以减少有机薄膜晶体管的绝缘层上的表面缺陷。还提供了相关的制造方法。在一个示例中，显示基板包括基底，多条数据线，多条栅极线，由数据线和栅极线限定的像素，有机薄膜晶体管和像素电极。数据线在基座上并且朝向第一方向。栅极线在与第一方向交叉的第二方向上取向。有机薄膜晶体管包括电连接到数据线之一的源电极，电连接到栅极线之一的栅电极和有机半导体层。像素电极设置在像素中并电连接到有机薄膜晶体管。像素电极包括透明氧氮化物。

110. 发明申请

US20110284857A1 THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20110284857A1
公开(公告)日：2011-11-24
申请号：US13204553
申请日：2011-08-05
申请人： Je-Hun LEE , Sung-Jin Kim , Hee-Joon Kim , Chang-Oh Jeong
发明人： Je-Hun LEE , Sung-Jin Kim , Hee-Joon Kim , Chang-Oh Jeong
IPC分类号： H01L27/088 , H01L21/84
CPC分类号： G02F1/13439 , G02F1/13458 , H01L27/12 , H01L27/124 , H01L29/458 , H01L29/4908
摘要： A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn in which the rmetal component is reduced in the IZO, ITO, or a-ITO is not produced on the surfaces of the common electrode.
摘要翻译：提供薄膜晶体管阵列面板，其包括基板，形成在基板上的多个栅极线，在基板上具有透明导电层的多个公共电极，覆盖栅极线和公共电极的栅极绝缘层形成在所述栅极绝缘层上的多个半导体层，形成在所述半导体层和所述栅极绝缘层上的多个源极电极的多条数据线，形成在所述半导体层上的多个漏电极和所述栅极绝缘体并且与公共电极重叠并连接到漏电极的多个像素电极。由于公共电极由ITON，IZON或者-IONON制成，或者是将双重层的ITO / ITON，IZO / IZON或者a-ITO / a-ITON，当注入H 2或SiH 4以形成氮化硅时 SiNX）层，在公共电极的表面上不产生在IZO，ITO或ITO中还原金属成分的不透明金属Sn或Zn。

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