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1. 发明授权

US09070777B2 Semiconductor device and method for forming the same 有权
标题翻译：半导体装置及其形成方法
公开(公告)号：US09070777B2
公开(公告)日：2015-06-30
申请号：US13543235
申请日：2012-07-06
申请人： Gun Hee Kim , Jae Woo Park , Jin Hyun Park , Byung Du Ahn , Je Hun Lee , Yeon Hong Kim , Jung Hwa Kim , Sei-Yong Park , Jun Hyun Park , Kyoung Won Lee , Ji Hun Lim
发明人： Gun Hee Kim , Jae Woo Park , Jin Hyun Park , Byung Du Ahn , Je Hun Lee , Yeon Hong Kim , Jung Hwa Kim , Sei-Yong Park , Jun Hyun Park , Kyoung Won Lee , Ji Hun Lim
IPC分类号： H01L29/12 , H01L21/00 , H01L29/786 , H01L21/02
CPC分类号： H01L29/7869 , H01L21/02554
摘要： A semiconductor device includes: a substrate, a semiconductor layer including an oxide semiconductor disposed on the substrate, a barrier layer disposed on the semiconductor layer and an insulating layer disposed on the barrier layer. The semiconductor layer includes an oxide semiconductor, and the barrier layer includes a material having a lower standard electrode potential than a semiconductor material of the oxide semiconductor, a lower electron affinity than the semiconductor material of the oxide semiconductor, or a larger band gap than the semiconductor material of the oxide semiconductor. The insulating layer includes at least one of a silicon-based oxide or a silicon-based nitride, and the insulating layer includes a portion which contacts with an upper surface of the barrier layer.
摘要翻译：半导体器件包括：衬底，包括设置在衬底上的氧化物半导体的半导体层，设置在半导体层上的阻挡层和设置在阻挡层上的绝缘层。半导体层包括氧化物半导体，并且阻挡层包括具有比氧化物半导体的半导体材料低的标准电极电位的材料，比氧化物半导体的半导体材料低的电子亲和力或比氧化物半导体的半导体材料。绝缘层包括硅基氧化物或硅基氮化物中的至少一种，并且绝缘层包括与阻挡层的上表面接触的部分。

2. 发明授权

US08743307B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US08743307B2
公开(公告)日：2014-06-03
申请号：US13490978
申请日：2012-06-07
申请人： Jae Woo Park , Je Hun Lee , Byung Du Ahn , Sei-Yong Park , Jun Hyun Park , Gun Hee Kim , Ji Hun Lim , Kyoung Won Lee , Toshihiro Kugimiya , Aya Miki , Shinya Morita , Tomoya Kishi , Hiroaki Tao , Hiroshi Goto
发明人： Jae Woo Park , Je Hun Lee , Byung Du Ahn , Sei-Yong Park , Jun Hyun Park , Gun Hee Kim , Ji Hun Lim , Kyoung Won Lee , Toshihiro Kugimiya , Aya Miki , Shinya Morita , Tomoya Kishi , Hiroaki Tao , Hiroshi Goto
IPC分类号： G02F1/136
CPC分类号： H01L27/1225 , H01L29/7869
摘要： A display device includes a first substrate, a gate line disposed on the first substrate and including a gate electrode, a gate insulating layer disposed on the gate line, a semiconductor layer disposed on the gate insulating layer, a data line disposed on the semiconductor layer and connected to a source electrode, a drain electrode disposed on the semiconductor layer and facing the source electrode and a passivation layer disposed on the data line, in which the semiconductor layer is formed of an oxide semiconductor including indium, tin, and zinc. The indium is present in an amount of about 5 atomic percent (at %) to about 50 at %, and a ratio of the zinc to the tin is about 1.38 to about 3.88.
摘要翻译：显示装置包括：第一基板，设置在第一基板上的栅极线，包括栅电极，设置在栅极线上的栅极绝缘层，设置在栅极绝缘层上的半导体层，设置在半导体层上的数据线并连接到源电极，设置在半导体层上并面对源电极的漏电极和设置在数据线上的钝化层，其中半导体层由包含铟，锡和锌的氧化物半导体形成。铟以约5原子％（at％）至约50原子％的量存在，并且锌与锡的比例为约1.38至约3.88。

3. 发明申请

US20130114013A1 DISPLAY DEVICE 有权
标题翻译：显示设备
公开(公告)号：US20130114013A1
公开(公告)日：2013-05-09
申请号：US13490978
申请日：2012-06-07
申请人： Jae Woo Park , Je Hun Lee , Byung Du Ahn , Sei-Yong Park , Jun Hyun Park , Gun Hee Kim , Ji Hun Lim , Kyoung Won Lee
发明人： Jae Woo Park , Je Hun Lee , Byung Du Ahn , Sei-Yong Park , Jun Hyun Park , Gun Hee Kim , Ji Hun Lim , Kyoung Won Lee
IPC分类号： H01L33/08 , G02F1/136
CPC分类号： H01L27/1225 , H01L29/7869
摘要： A display device includes a first substrate, a gate line disposed on the first substrate and including a gate electrode, a gate insulating layer disposed on the gate line, a semiconductor layer disposed on the gate insulating layer, a data line disposed on the semiconductor layer and connected to a source electrode, a drain electrode disposed on the semiconductor layer and facing the source electrode and a passivation layer disposed on the data line, in which the semiconductor layer is formed of an oxide semiconductor including indium, tin, and zinc. The indium is present in an amount of about 5 atomic percent (at %) to about 50 at % , and a ratio of the zinc to the tin is about 1.38 to about 3.88.
摘要翻译：显示装置包括：第一基板，设置在第一基板上的栅极线，包括栅电极，设置在栅极线上的栅极绝缘层，设置在栅极绝缘层上的半导体层，设置在半导体层上的数据线并连接到源电极，设置在半导体层上并面对源电极的漏电极和设置在数据线上的钝化层，其中半导体层由包含铟，锡和锌的氧化物半导体形成。铟以约5原子％（at％）至约50原子％的量存在，并且锌与锡的比例为约1.38至约3.88。

4. 发明授权

US08686426B2 Thin film transistor having plural semiconductive oxides, thin film transistor array panel and display device including the same, and manufacturing method of thin film transistor 有权
标题翻译：具有多个半导体氧化物的薄膜晶体管，薄膜晶体管阵列面板及包括该半导体氧化物的显示装置以及薄膜晶体管的制造方法
公开(公告)号：US08686426B2
公开(公告)日：2014-04-01
申请号：US13555889
申请日：2012-07-23
申请人： Byung Du Ahn , Ji Hun Lim , Gun Hee Kim , Kyoung Won Lee , Je Hun Lee
发明人： Byung Du Ahn , Ji Hun Lim , Gun Hee Kim , Kyoung Won Lee , Je Hun Lee
IPC分类号： H01L27/14
CPC分类号： H01L29/7869 , H01L29/78696
摘要： A plural semiconductive oxides TFT (sos-TFT) provides improved electrical functionality in terms of charge-carrier mobility and/or threshold voltage variability. The sos-TFT may be used to form a thin film transistor array panel for display devices. An example sos-TFT includes: an insulated gate electrode; a first semiconductive oxide layer having a composition including a first semiconductive oxide; and a second semiconductive oxide layer having a different composition that also includes a semiconductive oxide. The first and second semiconductive oxide layers have respective channel regions that are capacitively influenced by a control voltage applied to the gate electrode. In one embodiment, the second semiconductive oxide layer includes at least one additional element that is not included in the first semiconductive oxide layer where the additional element is one of gallium (Ga), silicon (Si), niobium (Nb), hafnium (Hf), and germanium (Ge).
摘要翻译：多个半导体氧化物TFT（sos-TFT）在电荷载流子迁移率和/或阈值电压变化性方面提供改进的电功能。 sos-TFT可以用于形成用于显示装置的薄膜晶体管阵列面板。示例sos-TFT包括：绝缘栅电极; 具有包含第一半导体氧化物的组成的第一半导体氧化物层; 以及具有不同组成的第二半导体氧化物层，其还包括半导体氧化物。第一和第二半导体氧化物层具有由施加到栅电极的控制电压的电容性影响的各个沟道区。在一个实施例中，第二半导体氧化物层包括至少一个附加元件，其不包括在第一半导体氧化物层中，其中附加元素是镓（Ga），硅（Si），铌（Nb），铪（Hf ）和锗（Ge）。

5. 发明申请

US20130256653A1 THIN FILM TRANSISTOR HAVING PLURAL SEMICONDUCTIVE OXIDES, THIN FILM TRANSISTOR ARRAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME, AND MANUFACTURING METHOD OF THIN FILM TRANSISTOR 有权
标题翻译：具有多个半导体氧化物的薄膜晶体管，薄膜晶体管阵列和包括其的显示器件以及薄膜晶体管的制造方法
公开(公告)号：US20130256653A1
公开(公告)日：2013-10-03
申请号：US13555889
申请日：2012-07-23
申请人： Byung Du AHN , Ji Hun LIM , Gun Hee KIM , Kyoung Won LEE , Je Hun LEE
发明人： Byung Du AHN , Ji Hun LIM , Gun Hee KIM , Kyoung Won LEE , Je Hun LEE
IPC分类号： H01L29/786 , H01L27/15 , H01L21/363 , H01L27/12
CPC分类号： H01L29/7869 , H01L29/78696
摘要： A plural semiconductive oxides TFT (sos-TFT) provides improved electrical functionality in terms of charge-carrier mobility and/or threshold voltage variability. The sos-TFT may be used to form a thin film transistor array panel for display devices. An example sos-TFT includes: an insulated gate electrode; a first semiconductive oxide layer having a composition including a first semiconductive oxide; and a second semiconductive oxide layer having a different composition that also includes a semiconductive oxide. The first and second semiconductive oxide layers have respective channel regions that are capacitively influenced by a control voltage applied to the gate electrode. In one embodiment, the second semiconductive oxide layer includes at least one additional element that is not included in the first semiconductive oxide layer where the additional element is one of gallium (Ga), silicon (Si), niobium (Nb), hafnium (Hf), and germanium (Ge).
摘要翻译：多个半导体氧化物TFT（sos-TFT）在电荷载流子迁移率和/或阈值电压变化性方面提供改进的电功能。 sos-TFT可以用于形成用于显示装置的薄膜晶体管阵列面板。示例sos-TFT包括：绝缘栅电极; 具有包含第一半导体氧化物的组成的第一半导体氧化物层; 以及具有不同组成的第二半导体氧化物层，其还包括半导体氧化物。第一和第二半导体氧化物层具有由施加到栅电极的控制电压的电容性影响的各个沟道区。在一个实施例中，第二半导体氧化物层包括至少一个附加元件，其不包括在第一半导体氧化物层中，其中附加元素是镓（Ga），硅（Si），铌（Nb），铪（Hf ）和锗（Ge）。

6. 发明授权

US09190523B2 Oxide semiconductor, thin film transistor including the same, and thin film transistor array panel including the same 有权
标题翻译：氧化物半导体，包括该氧化物半导体的薄膜晶体管和包括该氧化物半导体的薄膜晶体管阵列面板
公开(公告)号：US09190523B2
公开(公告)日：2015-11-17
申请号：US13554393
申请日：2012-07-20
申请人： Byung Du Ahn , Je Hun Lee , Sei-Yong Park , Jun Hyun Park , Gun Hee Kim , Ji Hun Lim , Jae Woo Park , Jin Seong Park , Toshihiro Kugimiya , Aya Miki , Shinya Morita , Tomoya Kishi , Hiroaki Tao
发明人： Byung Du Ahn , Je Hun Lee , Sei-Yong Park , Jun Hyun Park , Gun Hee Kim , Ji Hun Lim , Jae Woo Park , Jin Seong Park , Toshihiro Kugimiya , Aya Miki , Shinya Morita , Tomoya Kishi , Hiroaki Tao
IPC分类号： H01L29/786 , H01L21/02 , H01L29/66 , H01L27/12
CPC分类号： H01L29/7869 , H01L21/02565 , H01L27/1225 , H01L29/66969
摘要： An oxide semiconductor includes a first material including at least one selected from the group consisting of zinc (Zn) and tin (Sn), and a second material, where a value acquired by subtracting an electronegativity difference value between the second material and oxygen (O) from the electronegativity difference value between the first material and oxygen (O) is less than about 1.3.
摘要翻译：氧化物半导体包括包含选自锌（Zn）和锡（Sn）中的至少一种的第一材料和第二材料，其中通过减去第二材料和氧之间的电负性差值获得的值（O ）从第一材料和氧（O）之间的电负性差值小于约1.3。

7. 发明申请

US20130181212A1 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME 有权
标题翻译：半导体器件及其形成方法
公开(公告)号：US20130181212A1
公开(公告)日：2013-07-18
申请号：US13543235
申请日：2012-07-06
申请人： Gun Hee KIM , Jae Woo PARK , Jin Hyun PARK , Byung Du AHN , Je Hun LEE , Yeon Hong KIM , Jung Hwa KIM , Sei-Yong PARK , Jun Hyun PARK , Kyoung Won LEE , Ji Hun LIM
发明人： Gun Hee KIM , Jae Woo PARK , Jin Hyun PARK , Byung Du AHN , Je Hun LEE , Yeon Hong KIM , Jung Hwa KIM , Sei-Yong PARK , Jun Hyun PARK , Kyoung Won LEE , Ji Hun LIM
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L21/02554
摘要： A semiconductor device includes: a substrate, a semiconductor layer including an oxide semiconductor disposed on the substrate, a barrier layer disposed on the semiconductor layer and an insulating layer disposed on the barrier layer. The semiconductor layer includes an oxide semiconductor, and the barrier layer includes a material having a lower standard electrode potential than a semiconductor material of the oxide semiconductor, a lower electron affinity than the semiconductor material of the oxide semiconductor, or a larger band gap than the semiconductor material of the oxide semiconductor. The insulating layer includes at least one of a silicon-based oxide or a silicon-based nitride, and the insulating layer includes a portion which contacts with an upper surface of the barrier layer.
摘要翻译：半导体器件包括：衬底，包括设置在衬底上的氧化物半导体的半导体层，设置在半导体层上的阻挡层和设置在阻挡层上的绝缘层。半导体层包括氧化物半导体，并且阻挡层包括具有比氧化物半导体的半导体材料低的标准电极电位的材料，比氧化物半导体的半导体材料低的电子亲和力或比氧化物半导体的半导体材料。绝缘层包括硅基氧化物或硅基氮化物中的至少一种，并且绝缘层包括与阻挡层的上表面接触的部分。

8. 发明申请

US20130075720A1 OXIDE SEMICONDUCTOR, THIN FILM TRANSISTOR INCLUDING THE SAME, AND THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME 有权
标题翻译：氧化物半导体，包括其的薄膜晶体管，以及包括其的薄膜晶体管阵列
公开(公告)号：US20130075720A1
公开(公告)日：2013-03-28
申请号：US13554393
申请日：2012-07-20
申请人： Byung Du AHN , Je Hun LEE , Sei-Yong PARK , Jun Hyun PARK , Gun Hee KIM , Ji Hun LIM , Jae Woo PARK , Jin Seong PARK , Toshihiro KUGIMIYA , Aya MIKI , Shinya MORITA , Tomoya KISHI , Hiroaki TAO
发明人： Byung Du AHN , Je Hun LEE , Sei-Yong PARK , Jun Hyun PARK , Gun Hee KIM , Ji Hun LIM , Jae Woo PARK , Jin Seong PARK , Toshihiro KUGIMIYA , Aya MIKI , Shinya MORITA , Tomoya KISHI , Hiroaki TAO
IPC分类号： H01L29/786 , H01L29/38
CPC分类号： H01L29/7869 , H01L21/02565 , H01L27/1225 , H01L29/66969
摘要： An oxide semiconductor includes a first material including at least one selected from the group consisting of zinc (Zn) and tin (Sn), and a second material, where a value acquired by subtracting an electronegativity difference value between the second material and oxygen (O) from the electronegativity difference value between the first material and oxygen (O) is less than about 1.3.
摘要翻译：氧化物半导体包括包含选自锌（Zn）和锡（Sn）中的至少一种的第一材料和第二材料，其中通过减去第二材料和氧之间的电负性差值获得的值（O ）从第一材料和氧（O）之间的电负性差值小于约1.3。

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