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91. 发明授权

US4145676A Input stage for a CTD low-pass filter 失效
标题翻译： CTD低通滤波器的输入级
公开(公告)号：US4145676A
公开(公告)日：1979-03-20
申请号：US788779
申请日：1977-04-19
申请人： Roger Benoit-Gonin , Jean L. Berger , Sylvain Fontanes
发明人： Roger Benoit-Gonin , Jean L. Berger , Sylvain Fontanes
IPC分类号： H01L21/339 , H01L29/76 , H01L29/762 , H01L29/768 , H01L29/772 , H01L29/78 , H03H15/02 , H03H7/28 , G11C19/28 , H01L27/10
CPC分类号： H01L29/76808 , H03H15/02
摘要： An input stage for a transversal charge transfer filter, which suppresses parasitic image frequencies. It comprises two parallel channels to which the input signal is applied simultaneously. Sampling of the signal is performed in each channel with a periodicity Te, and a relative phase-shift of Te/2. The two samples are then added in order to eliminate components having periodicities in the neighborhood of Te. The present invention relates to low-pass filters using the phenomenon of electrical charge transfer occurring in a semiconductor. It relates more particularly to an input stage for this kind of CTD (Charge Transfer Device) filter, which attenuates parasitic frequencies. The design of CTD low-pass filters, often referred to as transversal filters, poses a classic problem due to the fact that the input stage is a sampling stage. In other words, when the input signal contains a component of frequency Fs close to the sampling frequency Fe, by a process of frequency mixing, two parasitic signals at the image frequencies Fe + Fs and Fe - Fs are created. Since we are concerned with a low-pass filter, the top image frequency (Fe + Fs) is automatically eliminated but the bottom image frequency (Fe - Fs) can be transmitted by the filter and appear in the output signal if the condition Fe - Fs
摘要翻译：用于横向电荷转移滤波器的输入级，其抑制寄生图像频率。它包括同时施加输入信号的两个并行通道。在每个通道中以周期Te执行信号的采样，并且执行Te / 2的相对相移。然后添加两个样品以消除在Te附近具有周期性的组分。

92. 发明授权

US4142199A Bucket brigade device and process 失效
标题翻译：铲斗装置和过程
公开(公告)号：US4142199A
公开(公告)日：1979-02-27
申请号：US809876
申请日：1977-06-24
申请人： Victor M. Simi , Donald A. Soderman
发明人： Victor M. Simi , Donald A. Soderman
IPC分类号： H01L21/339 , H01L21/265 , H01L21/266 , H01L21/8234 , H01L27/07 , H01L27/105 , H01L29/76 , H01L29/762 , H01L29/772 , H01L29/78 , H01L29/06 , G11C19/28
CPC分类号： H01L21/823406 , H01L21/2652 , H01L21/266 , H01L27/0733 , H01L27/1055
摘要： The invention is the structure and process for making a bucket brigade device which comprises the merger of an MOS capacitor with an MOSFET device to form the charge transfer cell. A thin n-type region is implanted in a portion of the p-type channel region of an FET device adjacent to the drain diffusion. This structure increases the charge transfer efficiency for the cell and reduces its sensitivity of the threshold voltage to the source-drain voltage. The gate for the device has a substantial overlap over the drain and a minimal overlap over the source and the gate to drain capacitance per unit area is maximized by maintaining a uniformly thin oxide layer across the gate region.
摘要翻译：本发明是用于制造桶式装置的结构和工艺，其包括MOS电容器与MOSFET器件的合并以形成电荷转移电池。在与漏极扩散相邻的FET器件的p型沟道区域的一部分中注入薄的n型区域。这种结构增加了电池的电荷转移效率，并降低了其阈值电压对源极 - 漏极电压的灵敏度。用于器件的栅极在漏极上具有实质重叠，并且源极上的最小重叠，并且通过在栅极区域上保持均匀薄的氧化物层来最大化每单位面积的栅极至漏极电容。

93. 发明授权

US4139787A Line-addressable random-access memory decoupling apparatus 失效
标题翻译：线寻址随机存取存储器去耦装置
公开(公告)号：US4139787A
公开(公告)日：1979-02-13
申请号：US840871
申请日：1977-10-11
申请人： Gilbert F. Amelio
发明人： Gilbert F. Amelio
IPC分类号： G11C27/04 , G11C19/28 , H01L21/339 , H01L29/762 , H01L29/768 , H03H11/26 , G11C7/00 , H03K5/18
CPC分类号： G11C19/287 , H01L29/76816
摘要： A decoupling apparatus for a charge-coupled device line-addressable random-access memory includes a series of bipolar transistors, the bases of which are connected to output lines from the CCD LARAM. The emitters of the bipolar transistors, connected together, are connected to the source of a depletion-mode MOS reset transistor and to a comparator circuit.
摘要翻译：用于电荷耦合器件线路寻址随机存取存储器的去耦装置包括一系列双极晶体管，其基极连接到来自CCD LARAM的输出线。连接在一起的双极晶体管的发射极连接到耗尽型MOS复位晶体管的源极和比较器电路。

94. 发明授权

US4103347A Zig-zag SPS CCD memory 失效
标题翻译： ZIG-ZAG SPS CCD存储器
公开(公告)号：US4103347A
公开(公告)日：1978-07-25
申请号：US736904
申请日：1976-10-29
申请人： James Brockman Barton
发明人： James Brockman Barton
IPC分类号： G11C11/56 , G11C19/28 , G11C27/04 , H01L21/339 , H01L29/76 , H01L29/762 , H01L29/772 , H03H11/26 , G11C9/00 , G11C11/34
CPC分类号： G11C19/287
摘要： A CCD memory is comprised of an array of serial-parallel-serial memory blocks. Each block is comprised of an N-stage serial-parallel register, an M-stage stack, and an N-stage parallel-serial register. The serial-parallel register has N outputs which couple in parallel to N inputs of the stack. The parallel-serial register has N inputs which couple in parallel to N outputs of the stack. Both registers have a zig-zag shaped charge transfer path which reduces their linear dimension, and also reduces the width of the stack.

95. 发明授权

US4093872A Charge coupled device with input for direct injection of signal 失效
标题翻译：电荷耦合器件，具有直接注入信号的输入
公开(公告)号：US4093872A
公开(公告)日：1978-06-06
申请号：US609774
申请日：1975-09-02
申请人： John M. Hartman , Darrell M. Erb
发明人： John M. Hartman , Darrell M. Erb
IPC分类号： G11C19/28 , G11C27/04 , H01L21/339 , H01L27/148 , H01L29/423 , H01L29/762 , H01L29/768 , H01L27/14 , H01L29/78 , H01L31/00
CPC分类号： H01L29/76808 , G11C19/282 , H01L27/14881 , H01L29/42396
摘要： Signals generated by an infrared (I.R.) detector are injected directly into a charge coupled device (CCD) by means of a DC biased electrode structure interposed between the detector and one of the clocked transfer electrodes of the CCD.
摘要翻译：由红外线（I.R.）检测器产生的信号通过介于检测器和CCD的一个时钟传输电极之间的直流偏置电极结构直接注入电荷耦合器件（CCD）。

96. 发明授权

US4080718A Method of modifying electrical characteristics of MOS devices using ion implantation 失效
标题翻译：使用离子注入改善MOS器件的电气特性的方法
公开(公告)号：US4080718A
公开(公告)日：1978-03-28
申请号：US750368
申请日：1976-12-14
申请人： Paul Richman
发明人： Paul Richman
IPC分类号： H01L27/112 , G11C17/00 , G11C17/08 , H01L21/265 , H01L21/339 , H01L21/8236 , H01L21/8246 , H01L21/8247 , H01L27/10 , H01L29/762 , H01L29/78 , H01L29/788 , H01L29/792 , H01L21/96
CPC分类号： H01L27/1126 , H01L21/8236 , Y10S438/958
摘要： A method is disclosed for selectively modifying the electrical characteristics of MOS devices at a late stage in the fabrication process to form, for example, the "1" and "0" data locations of a ROM, or to form enhancement-and depletion-mode devices. In one embodiment of the method, in addition to forming openings in the passivation layer to define location of bonding pads, additional openings are formed in that layer at locations at which a data bit of one of the two levels is to be formed. Subsequently, an ion implantation is performed through the exposed underlying polysilicon gate structure to create an implantation layer at the channel regions of selected MOS devices, and thereby permanently alter the threshold voltages of these MOS devices. Other embodiments of the invention are disclosed in which ion implantation is performed through openings selectively formed in other layers, thereby to form implantation regions at selected locations to modify selected MOS devices at those locations.
摘要翻译：公开了一种方法，用于在制造过程中的后期选择性地修改MOS器件的电气特性，以形成例如ROM的“1”和“0”数据位置，或者形成增强和耗尽模式设备。在该方法的一个实施例中，除了在钝化层中形成开口以限定接合焊盘的位置之外，在要形成两个电平之一的数据位的位置处，在该层中形成另外的开口。随后，通过暴露的下面的多晶硅栅极结构进行离子注入，以在选定的MOS器件的沟道区产生注入层，从而永久地改变这些MOS器件的阈值电压。公开了本发明的其它实施例，其中通过在其它层中选择性地形成的开口进行离子注入，从而在选定位置形成注入区，以在这些位置修饰所选择的MOS器件。

97. 发明授权

US4051505A Two-dimensional transfer in charge transfer device 失效
标题翻译：充电传输器件的二维传输
公开(公告)号：US4051505A
公开(公告)日：1977-09-27
申请号：US342173
申请日：1973-03-16
申请人： Robert Harold Krambeck , Carlo Heinrich Sequin , Robert Henry Walden
发明人： Robert Harold Krambeck , Carlo Heinrich Sequin , Robert Henry Walden
IPC分类号： G11C27/04 , H01L21/33 , H01L21/339 , H01L27/105 , H01L27/146 , H01L27/148 , H01L29/10 , H01L29/423 , H01L29/70 , H01L29/762 , H01L29/78
CPC分类号： H01L29/1062 , H01L27/1057 , H01L29/42396
摘要： Charge transfer devices which permit movement of charge carriers in two noncollinear directions in the surface plane of the device. A network of electrodes in two levels of metallization is combined with an appropriate doping of the storage medium to define the charge transfer paths. The direction of charge transfer is determined by an appropriate pulsing of the network which may take the form of different driving sequences of a number of phases in various embodiments. This concept may be used for both charge coupled and bucket brigade devices.

98. 发明授权

US4047215A Uniphase charge coupled devices 失效
标题翻译：单相电荷耦合器件
公开(公告)号：US4047215A
公开(公告)日：1977-09-06
申请号：US545954
申请日：1975-01-31
申请人： Robert Charles Frye , Horng-Sen Fu , Al F. Tasch, Jr.
发明人： Robert Charles Frye , Horng-Sen Fu , Al F. Tasch, Jr.
IPC分类号： H01L29/762 , H01L21/339 , H01L29/10 , H01L29/768 , H01L29/78 , G11C19/28 , H01L29/04
CPC分类号： H01L29/66954 , H01L29/1062 , H01L29/76866
摘要： A continuous gate electrode overlies the channel of the CCD and is connected to a uniphase clock pulse source for operation of the CCD. Pairs of gate conductor-insulator-semiconductor regions are defined along the channel. In each pair of regions the surface potential-gate voltage characteristic of one region intersects that of the other region, such that in the OFF condition of a clock pulse the potential well at one region of each pair is deeper than that of the other region; in the ON condition of a clock pulse, this situation is reversed. In this manner, charge packets are propagated along the channel and unidirectionality is achieved by locally implanted potential wells or potential barriers in each of the aforesaid regions. The shift in surface potential gate voltage of one of the regions in each pair of regions, to produce the required intersection, is achieved by an implanted charge accumulation layer at the insulator-semiconductor interface at those regions which, in one embodiment, are defined at locally thickened areas of the insulating layer, so that the threshold voltage is greater than an intermediate regions at which the insulator layer is thinner. In a preferred embodiment, using a uniform thickness insulating layer, the threshold voltage difference is achieved by use of local, heavily doped semiconductor regions spaced along the channel with charge accumulation layers formed at the interface between those regions and the insulating layer. Fabrication techniques employing ion implantation are described for both embodiments.
摘要翻译：连续的栅电极覆盖在CCD的通道上，并连接到用于CCD操作的单相时钟脉冲源。栅极导体 - 绝缘体 - 半导体区域的对沿通道定义。在每对区域中，一个区域的表面电位栅极电压特性与另一个区域的表面电位栅极电压特性相交，使得在时钟脉冲的OFF状态下，每对的一个区域的电势阱比另一个区域的电势更深; 在时钟脉冲的ON状态下，这种情况相反。以这种方式，电荷分组沿着通道传播，并且单向性通过每个前述区域中的局部注入的势阱或势垒来实现。通过在这些区域处的绝缘体 - 半导体界面处的注入电荷累积层来实现每对区域中的一个区域中的一个区域的表面电位栅极电压的偏移以产生所需的交点，在一个实施例中，在绝缘层的局部加厚区域，使得阈值电压大于绝缘体层较薄的中间区域。在优选实施例中，使用均匀厚度的绝缘层，通过使用在沟道间隔开的局部重掺杂半导体区域，在这些区域和绝缘层之间的界面处形成电荷累积层来实现阈值电压差。对于两个实施例描述了使用离子注入的制造技术。

99. 发明授权

US4035667A Input circuit for inserting charge packets into a charge-transfer-device 失效
标题翻译：用于将电荷包插入电荷转移装置的输入电路
公开(公告)号：US4035667A
公开(公告)日：1977-07-12
申请号：US636862
申请日：1975-12-02
申请人： Lawrence Griffith Heller
发明人： Lawrence Griffith Heller
IPC分类号： G11C7/02 , G11C19/28 , G11C27/04 , H01L21/339 , H01L29/762 , H01L29/768 , H01L29/78
CPC分类号： H01L29/76808 , G11C19/285 , G11C27/04
摘要： An input circuit for a charge-transfer-device such as a bucket-brigade or charge-coupled-device incorporating an input terminal connected to an input diode source diffusion of the charge-transfer-device through a capacitor C. The nonlinear depletion capacitance C.sub.d associated with the input circuit is schematically shown connected in parallel with C at a first node. The non-linear capacitance C.sub.d, which is parasitic, is a basic cause of distortion of the input charge packets. The input circuit further includes an active device such as an IGFET connected in parallel with the input terminal to provide a supply of charge carriers. The gate of the active device is connected to a reset signal source.
摘要翻译：用于电荷转移装置的输入电路，例如桶式旅行或电荷耦合装置，其包括通过电容器C连接到电荷转移装置的输入二极管源极扩散的输入端子。非线性耗尽电容Cd 示意性地示出与输入电路相关联的与第一节点处的C并联。寄生的非线性电容Cd是输入电荷分组失真的基本原因。输入电路还包括有源器件，例如与输入端并联连接的IGFET，以提供电荷载体。有源器件的栅极连接到复位信号源。

100. 发明授权

US3967365A Process for the production of a two-phase charge shift assembly 失效
标题翻译：用于生产两相电荷位移组件的方法
公开(公告)号：US3967365A
公开(公告)日：1976-07-06
申请号：US496153
申请日：1974-08-09
申请人： Hans Friedrich
发明人： Hans Friedrich
IPC分类号： H01L29/762 , H01L21/339 , H01L29/49 , H01L29/768 , B01J17/00
CPC分类号： H01L29/76875 , H01L29/4916 , H01L29/4925 , H01L29/4983
摘要： A two-phase charge shift assembly is described, as well as the process for its production. The process consists of applying an insulating layer to a semiconductor substrate, applying a highly ohmic polycrystalline silicon layer to the insulating layer, forming metal electrodes on the polycrystalline layer to thereby protect the zones lying beneath the electrodes, implanting charge carriers by ion implantation in an oblique direction into zones of the layer of polycrystalline silicon to thereby form electrodes in the layer which serve as electrodes between the electrically insulating zones of polycrystalline material.
摘要翻译：描述了两相电荷移位组件，以及其生产过程。该工艺包括将绝缘层施加到半导体衬底，向绝缘层施加高欧姆多晶硅层，在多晶层上形成金属电极，从而保护位于电极下面的区域，通过离子注入将电荷载体注入到倾斜方向形成多晶硅层的区域，从而在层中形成用作多晶材料的电绝缘区域之间的电极的电极。

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