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    • 92. 发明授权
    • Driver circuitry adjusted to allow high speed driving and reduce
potential variations of interconnections
    • 驱动电路被调整以允许高速驱动并减少互连的潜在变化
    • US5686853A
    • 1997-11-11
    • US580485
    • 1995-12-29
    • Tomofumi IimaMasakazu YamashinaMasayuki Mizuno
    • Tomofumi IimaMasakazu YamashinaMasayuki Mizuno
    • H03K17/04H03K17/687H03K19/017H03K19/20
    • H03K19/01707
    • The present invention provides a driver circuitry having a single input terminal for receiving an input signal of binary digits consisting of high and low levels, and at least first and second output terminals, wherein the input signal is varied almost linearly in a first time period so as to be shifted between high and low levels, the driver circuitry comprises first and second control circuits. The first control circuit is coupled to the input terminal for receiving the input signal. The first control circuit is also coupled to the first output terminal for outputting a first output signal of binary digits via the first output terminal. The first control circuit is biased between a high voltage line which supplies a high level of voltage and a low voltage line which supplies a low level of voltage. The first control circuit is adjusted to shift the first output signal between the high and low levels within an initial period of the first time period and then keep the first output signal at the shifted one of the low and high levels until after the first time period expired. The second control circuit is coupled to the input terminal for receiving the input signal. The second control circuit is also coupled to the second output terminal for outputting a second output signal of binary digits via the second output terminal. The second control circuit is biased between the high voltage line and the low voltage line. The second control circuit is adjusted to keep the second output signal at one level of the low and high levels at least until the time approaches the termination of the first time period and then shift the second output signal from the one level to another level within a second time period which is short as the initial period of the first time period.
    • 本发明提供了一种驱动器电路,其具有用于接收由高电平和低电平组成的二进制数字的输入信号的单个输入端以及至少第一和第二输出端,其中输入信号在第一时间段内几乎线性地变化,因此 为了在高电平和低电平之间移动,驱动器电路包括第一和第二控制电路。 第一控制电路耦合到输入端以接收输入信号。 第一控制电路还耦合到第一输出端子,用于经由第一输出端子输出二进制数字的第一输出信号。 第一控制电路在提供高电平的高压线路和提供低电平的低电压线路之间被偏置。 调整第一控制电路以在第一时间周期的初始时段内将高电平和低电平之间的第一输出信号移位,然后将第一输出信号保持在低电平和高电平中的移位的一个,直到第一时间段 已过期 第二控制电路耦合到输入端以接收输入信号。 第二控制电路还耦合到第二输出端子,用于经由第二输出端子输出二进制数字的第二输出信号。 第二控制电路在高电压线路和低电压线路之间被偏置。 调整第二控制电路以将第二输出信号保持在低电平和高电平的一个电平,至少直到时间接近第一时间段的终止,然后将第二输出信号从一个电平移位到另一个电平内 作为第一时间段的初始期间的第二时间段。
    • 93. 发明授权
    • Voltage-controlled oscillator with reduced phase difference
    • 具有降低相位差的压控振荡器
    • US5592127A
    • 1997-01-07
    • US520988
    • 1995-08-30
    • Masayuki Mizuno
    • Masayuki Mizuno
    • H03K3/354H03K3/03H03B5/24
    • H03K3/0315
    • A voltage-controlled oscillator has ring oscillators R1, R2 and R3 which have three amplifier elements A1-A3, A4-A6 and A7-A9 respectively which are connected in the form of a ring. The way of connecting with the respective amplifier elements A10 to A18 is as follows: First, optionally selecting two output terminals from the 3.times.3 amplifier elements which form three ring oscillators, wherein the two output terminals are not selected from the input and output terminals of one amplifier element, and wherein the two output terminals are not selected from the output terminals belonging to the same ring oscillator. Next, connecting the input and output terminals of one of the amplifier elements A10 to A18 to the optionally selected two output terminals. Then repeating the above procedures one or more times to form a network between the ring oscillators R1 to R3. C1 to C9 are nodes for the connections. In the above connections, it is important that none of the two output terminals which are optionally selected from the output terminals of the 3.times.3 amplifier elements which form three ring oscillators have both in-phase and anti-phase paths through between them, on condition that all the signal paths between the two output terminals selected do not pass more than one time through the same output terminal.
    • 压控振荡器具有分别以环形连接的三个放大器元件A1-A3,A4-A6和A7-A9的环形振荡器R1,R2和R3。 与相应的放大器元件A10至A18连接的方式如下:首先,可选地从形成三个环形振荡器的3×3放大器元件中选择两个输出端子,其中两个输出端子不从一个输入和输出端子中选择 放大器元件,并且其中两个输出端子不是从属于相同环形振荡器的输出端子选择的。 接下来,将放大器元件A10至A18中的一个的输入和输出端子连接到可选择的两个输出端子。 然后重复上述过程一次或多次以在环形振荡器R1至R3之间形成网络。 C1到C9是连接的节点。 在上述连接中,重要的是,任意选择从形成三个环形振荡器的3×3放大器元件的输出端子中选出的两个输出端子都不具有穿过它们之间的同相和反相路径,条件是 所选择的两个输出端子之间的所有信号路径通过相同的输出端子不超过一次。